code-generator-s390.cc 164 KB
Newer Older
1 2 3 4
// Copyright 2015 the V8 project authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.

5
#include "src/codegen/assembler-inl.h"
6
#include "src/codegen/callable.h"
7 8
#include "src/codegen/macro-assembler.h"
#include "src/codegen/optimized-compilation-info.h"
9
#include "src/compiler/backend/code-generator-impl.h"
10
#include "src/compiler/backend/code-generator.h"
11
#include "src/compiler/backend/gap-resolver.h"
12 13
#include "src/compiler/node-matchers.h"
#include "src/compiler/osr.h"
14
#include "src/heap/memory-chunk.h"
15 16

#if V8_ENABLE_WEBASSEMBLY
17
#include "src/wasm/wasm-code-manager.h"
18
#include "src/wasm/wasm-objects.h"
19
#endif  // V8_ENABLE_WEBASSEMBLY
20 21 22 23 24

namespace v8 {
namespace internal {
namespace compiler {

25
#define __ tasm()->
26 27 28 29 30 31 32 33 34 35 36

#define kScratchReg ip

// Adds S390-specific methods to convert InstructionOperands.
class S390OperandConverter final : public InstructionOperandConverter {
 public:
  S390OperandConverter(CodeGenerator* gen, Instruction* instr)
      : InstructionOperandConverter(gen, instr) {}

  size_t OutputCount() { return instr_->OutputCount(); }

37 38 39 40 41 42 43 44 45 46
  bool Is64BitOperand(int index) {
    return LocationOperand::cast(instr_->InputAt(index))->representation() ==
           MachineRepresentation::kWord64;
  }

  bool Is32BitOperand(int index) {
    return LocationOperand::cast(instr_->InputAt(index))->representation() ==
           MachineRepresentation::kWord32;
  }

47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65
  bool CompareLogical() const {
    switch (instr_->flags_condition()) {
      case kUnsignedLessThan:
      case kUnsignedGreaterThanOrEqual:
      case kUnsignedLessThanOrEqual:
      case kUnsignedGreaterThan:
        return true;
      default:
        return false;
    }
    UNREACHABLE();
  }

  Operand InputImmediate(size_t index) {
    Constant constant = ToConstant(instr_->InputAt(index));
    switch (constant.type()) {
      case Constant::kInt32:
        return Operand(constant.ToInt32());
      case Constant::kFloat32:
66
        return Operand::EmbeddedNumber(constant.ToFloat32());
67
      case Constant::kFloat64:
68
        return Operand::EmbeddedNumber(constant.ToFloat64().value());
69 70 71 72 73
      case Constant::kInt64:
#if V8_TARGET_ARCH_S390X
        return Operand(constant.ToInt64());
#endif
      case Constant::kExternalReference:
74
        return Operand(constant.ToExternalReference());
75 76 77
      case Constant::kDelayedStringConstant:
        return Operand::EmbeddedStringConstant(
            constant.ToDelayedStringConstant());
78
      case Constant::kCompressedHeapObject:
79 80 81 82 83 84 85 86 87
      case Constant::kHeapObject:
      case Constant::kRpoNumber:
        break;
    }
    UNREACHABLE();
  }

  MemOperand MemoryOperand(AddressingMode* mode, size_t* first_index) {
    const size_t index = *first_index;
88 89
    if (mode) *mode = AddressingModeField::decode(instr_->opcode());
    switch (AddressingModeField::decode(instr_->opcode())) {
90 91
      case kMode_None:
        break;
92 93 94
      case kMode_MR:
        *first_index += 1;
        return MemOperand(InputRegister(index + 0), 0);
95 96 97 98 99 100
      case kMode_MRI:
        *first_index += 2;
        return MemOperand(InputRegister(index + 0), InputInt32(index + 1));
      case kMode_MRR:
        *first_index += 2;
        return MemOperand(InputRegister(index + 0), InputRegister(index + 1));
101 102 103 104
      case kMode_MRRI:
        *first_index += 3;
        return MemOperand(InputRegister(index + 0), InputRegister(index + 1),
                          InputInt32(index + 2));
105 106 107 108
    }
    UNREACHABLE();
  }

109
  MemOperand MemoryOperand(AddressingMode* mode = nullptr,
110
                           size_t first_index = 0) {
111 112 113 114 115
    return MemoryOperand(mode, &first_index);
  }

  MemOperand ToMemOperand(InstructionOperand* op) const {
    DCHECK_NOT_NULL(op);
116
    DCHECK(op->IsStackSlot() || op->IsFPStackSlot());
117 118 119
    return SlotToMemOperand(AllocatedOperand::cast(op)->index());
  }

120
  MemOperand SlotToMemOperand(int slot) const {
121
    FrameOffset offset = frame_access_state()->GetFrameOffset(slot);
122 123
    return MemOperand(offset.from_stack_pointer() ? sp : fp, offset.offset());
  }
124 125 126 127 128

  MemOperand InputStackSlot(size_t index) {
    InstructionOperand* op = instr_->InputAt(index);
    return SlotToMemOperand(AllocatedOperand::cast(op)->index());
  }
129 130 131 132 133

  MemOperand InputStackSlot32(size_t index) {
#if V8_TARGET_ARCH_S390X && !V8_TARGET_LITTLE_ENDIAN
    // We want to read the 32-bits directly from memory
    MemOperand mem = InputStackSlot(index);
134
    return MemOperand(mem.rx(), mem.rb(), mem.offset() + 4);
135 136 137 138
#else
    return InputStackSlot(index);
#endif
  }
139 140
};

jyan's avatar
jyan committed
141 142 143 144 145 146 147 148
static inline bool HasRegisterOutput(Instruction* instr, int index = 0) {
  return instr->OutputCount() > 0 && instr->OutputAt(index)->IsRegister();
}

static inline bool HasFPRegisterInput(Instruction* instr, int index) {
  return instr->InputAt(index)->IsFPRegister();
}

149 150 151
static inline bool HasRegisterInput(Instruction* instr, int index) {
  return instr->InputAt(index)->IsRegister() ||
         HasFPRegisterInput(instr, index);
152 153
}

154 155
static inline bool HasImmediateInput(Instruction* instr, size_t index) {
  return instr->InputAt(index)->IsImmediate();
156 157
}

jyan's avatar
jyan committed
158 159 160 161
static inline bool HasFPStackSlotInput(Instruction* instr, size_t index) {
  return instr->InputAt(index)->IsFPStackSlot();
}

162 163 164 165 166
static inline bool HasStackSlotInput(Instruction* instr, size_t index) {
  return instr->InputAt(index)->IsStackSlot() ||
         HasFPStackSlotInput(instr, index);
}

167 168 169 170 171 172
namespace {

class OutOfLineRecordWrite final : public OutOfLineCode {
 public:
  OutOfLineRecordWrite(CodeGenerator* gen, Register object, Register offset,
                       Register value, Register scratch0, Register scratch1,
173 174
                       RecordWriteMode mode, StubCallMode stub_mode,
                       UnwindingInfoWriter* unwinding_info_writer)
175 176 177 178 179 180 181
      : OutOfLineCode(gen),
        object_(object),
        offset_(offset),
        offset_immediate_(0),
        value_(value),
        scratch0_(scratch0),
        scratch1_(scratch1),
182
        mode_(mode),
183
#if V8_ENABLE_WEBASSEMBLY
184
        stub_mode_(stub_mode),
185
#endif  // V8_ENABLE_WEBASSEMBLY
186
        must_save_lr_(!gen->frame_access_state()->has_frame()),
187
        unwinding_info_writer_(unwinding_info_writer),
188
        zone_(gen->zone()) {
189 190
    DCHECK(!AreAliased(object, offset, scratch0, scratch1));
    DCHECK(!AreAliased(value, offset, scratch0, scratch1));
191
  }
192 193 194

  OutOfLineRecordWrite(CodeGenerator* gen, Register object, int32_t offset,
                       Register value, Register scratch0, Register scratch1,
195 196
                       RecordWriteMode mode, StubCallMode stub_mode,
                       UnwindingInfoWriter* unwinding_info_writer)
197 198 199 200 201 202 203
      : OutOfLineCode(gen),
        object_(object),
        offset_(no_reg),
        offset_immediate_(offset),
        value_(value),
        scratch0_(scratch0),
        scratch1_(scratch1),
204
        mode_(mode),
205
#if V8_ENABLE_WEBASSEMBLY
206
        stub_mode_(stub_mode),
207
#endif  // V8_ENABLE_WEBASSEMBLY
208
        must_save_lr_(!gen->frame_access_state()->has_frame()),
209
        unwinding_info_writer_(unwinding_info_writer),
210 211
        zone_(gen->zone()) {
  }
212 213

  void Generate() final {
214 215 216
    if (COMPRESS_POINTERS_BOOL) {
      __ DecompressTaggedPointer(value_, value_);
    }
217 218 219
    __ CheckPageFlag(value_, scratch0_,
                     MemoryChunk::kPointersToHereAreInterestingMask, eq,
                     exit());
220
    if (offset_ == no_reg) {
221
      __ AddS64(scratch1_, object_, Operand(offset_immediate_));
222 223
    } else {
      DCHECK_EQ(0, offset_immediate_);
224
      __ AddS64(scratch1_, object_, offset_);
225
    }
226
    RememberedSetAction const remembered_set_action =
227 228
        mode_ > RecordWriteMode::kValueIsMap ? RememberedSetAction::kEmit
                                             : RememberedSetAction::kOmit;
229 230 231
    SaveFPRegsMode const save_fp_mode = frame()->DidAllocateDoubleRegisters()
                                            ? SaveFPRegsMode::kSave
                                            : SaveFPRegsMode::kIgnore;
232
    if (must_save_lr_) {
233 234
      // We need to save and restore r14 if the frame was elided.
      __ Push(r14);
235
      unwinding_info_writer_->MarkLinkRegisterOnTopOfStack(__ pc_offset());
236
    }
237 238
    if (mode_ == RecordWriteMode::kValueIsEphemeronKey) {
      __ CallEphemeronKeyBarrier(object_, scratch1_, save_fp_mode);
239
#if V8_ENABLE_WEBASSEMBLY
240
    } else if (stub_mode_ == StubCallMode::kCallWasmRuntimeStub) {
241 242 243
      __ CallRecordWriteStubSaveRegisters(object_, scratch1_,
                                          remembered_set_action, save_fp_mode,
                                          StubCallMode::kCallWasmRuntimeStub);
244
#endif  // V8_ENABLE_WEBASSEMBLY
245
    } else {
246 247
      __ CallRecordWriteStubSaveRegisters(object_, scratch1_,
                                          remembered_set_action, save_fp_mode);
248
    }
249
    if (must_save_lr_) {
250 251
      // We need to save and restore r14 if the frame was elided.
      __ Pop(r14);
252
      unwinding_info_writer_->MarkPopLinkRegisterFromTopOfStack(__ pc_offset());
253 254 255 256 257 258
    }
  }

 private:
  Register const object_;
  Register const offset_;
259
  int32_t const offset_immediate_;  // Valid if offset_ == no_reg.
260 261 262 263
  Register const value_;
  Register const scratch0_;
  Register const scratch1_;
  RecordWriteMode const mode_;
264
#if V8_ENABLE_WEBASSEMBLY
265
  StubCallMode stub_mode_;
266
#endif  // V8_ENABLE_WEBASSEMBLY
267
  bool must_save_lr_;
268
  UnwindingInfoWriter* const unwinding_info_writer_;
269
  Zone* zone_;
270 271 272 273 274 275 276 277 278
};

Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
  switch (condition) {
    case kEqual:
      return eq;
    case kNotEqual:
      return ne;
    case kUnsignedLessThan:
jyan's avatar
jyan committed
279 280 281
      // unsigned number never less than 0
      if (op == kS390_LoadAndTestWord32 || op == kS390_LoadAndTestWord64)
        return CC_NOP;
282
      V8_FALLTHROUGH;
jyan's avatar
jyan committed
283
    case kSignedLessThan:
284 285
      return lt;
    case kUnsignedGreaterThanOrEqual:
jyan's avatar
jyan committed
286 287 288
      // unsigned number always greater than or equal 0
      if (op == kS390_LoadAndTestWord32 || op == kS390_LoadAndTestWord64)
        return CC_ALWAYS;
289
      V8_FALLTHROUGH;
jyan's avatar
jyan committed
290
    case kSignedGreaterThanOrEqual:
291 292
      return ge;
    case kUnsignedLessThanOrEqual:
jyan's avatar
jyan committed
293 294 295
      // unsigned number never less than 0
      if (op == kS390_LoadAndTestWord32 || op == kS390_LoadAndTestWord64)
        return CC_EQ;
296
      V8_FALLTHROUGH;
jyan's avatar
jyan committed
297
    case kSignedLessThanOrEqual:
298 299
      return le;
    case kUnsignedGreaterThan:
jyan's avatar
jyan committed
300 301 302
      // unsigned number always greater than or equal 0
      if (op == kS390_LoadAndTestWord32 || op == kS390_LoadAndTestWord64)
        return ne;
303
      V8_FALLTHROUGH;
jyan's avatar
jyan committed
304
    case kSignedGreaterThan:
305 306
      return gt;
    case kOverflow:
307
      // Overflow checked for AddS64/SubS64 only.
308
      switch (op) {
309 310 311 312
        case kS390_Add32:
        case kS390_Add64:
        case kS390_Sub32:
        case kS390_Sub64:
313 314
        case kS390_Abs64:
        case kS390_Abs32:
jyan's avatar
jyan committed
315
        case kS390_Mul32:
316
          return overflow;
317 318 319 320 321 322
        default:
          break;
      }
      break;
    case kNotOverflow:
      switch (op) {
323 324 325 326
        case kS390_Add32:
        case kS390_Add64:
        case kS390_Sub32:
        case kS390_Sub64:
jyan's avatar
jyan committed
327 328 329
        case kS390_Abs64:
        case kS390_Abs32:
        case kS390_Mul32:
330
          return nooverflow;
331 332 333 334 335 336 337 338 339 340
        default:
          break;
      }
      break;
    default:
      break;
  }
  UNREACHABLE();
}

341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368
#define GET_MEMOPERAND32(ret, fi)                                       \
  ([&](int& ret) {                                                      \
    AddressingMode mode = AddressingModeField::decode(instr->opcode()); \
    MemOperand mem(r0);                                                 \
    if (mode != kMode_None) {                                           \
      size_t first_index = (fi);                                        \
      mem = i.MemoryOperand(&mode, &first_index);                       \
      ret = first_index;                                                \
    } else {                                                            \
      mem = i.InputStackSlot32(fi);                                     \
    }                                                                   \
    return mem;                                                         \
  })(ret)

#define GET_MEMOPERAND(ret, fi)                                         \
  ([&](int& ret) {                                                      \
    AddressingMode mode = AddressingModeField::decode(instr->opcode()); \
    MemOperand mem(r0);                                                 \
    if (mode != kMode_None) {                                           \
      size_t first_index = (fi);                                        \
      mem = i.MemoryOperand(&mode, &first_index);                       \
      ret = first_index;                                                \
    } else {                                                            \
      mem = i.InputStackSlot(fi);                                       \
    }                                                                   \
    return mem;                                                         \
  })(ret)

369 370 371 372 373
#define RRInstr(instr)                                \
  [&]() {                                             \
    DCHECK(i.OutputRegister() == i.InputRegister(0)); \
    __ instr(i.OutputRegister(), i.InputRegister(1)); \
    return 2;                                         \
jyan's avatar
jyan committed
374
  }
375 376
#define RIInstr(instr)                                 \
  [&]() {                                              \
377
    DCHECK(i.OutputRegister() == i.InputRegister(0));  \
378 379 380
    __ instr(i.OutputRegister(), i.InputImmediate(1)); \
    return 2;                                          \
  }
381 382 383 384 385 386
#define RMInstr(instr, GETMEM)                        \
  [&]() {                                             \
    DCHECK(i.OutputRegister() == i.InputRegister(0)); \
    int ret = 2;                                      \
    __ instr(i.OutputRegister(), GETMEM(ret, 1));     \
    return ret;                                       \
387 388 389
  }
#define RM32Instr(instr) RMInstr(instr, GET_MEMOPERAND32)
#define RM64Instr(instr) RMInstr(instr, GET_MEMOPERAND)
jyan's avatar
jyan committed
390

391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409
#define RRRInstr(instr)                                                   \
  [&]() {                                                                 \
    __ instr(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); \
    return 2;                                                             \
  }
#define RRIInstr(instr)                                                    \
  [&]() {                                                                  \
    __ instr(i.OutputRegister(), i.InputRegister(0), i.InputImmediate(1)); \
    return 2;                                                              \
  }
#define RRMInstr(instr, GETMEM)                                       \
  [&]() {                                                             \
    int ret = 2;                                                      \
    __ instr(i.OutputRegister(), i.InputRegister(0), GETMEM(ret, 1)); \
    return ret;                                                       \
  }
#define RRM32Instr(instr) RRMInstr(instr, GET_MEMOPERAND32)
#define RRM64Instr(instr) RRMInstr(instr, GET_MEMOPERAND)

410 411 412 413 414
#define DDInstr(instr)                                            \
  [&]() {                                                         \
    DCHECK(i.OutputDoubleRegister() == i.InputDoubleRegister(0)); \
    __ instr(i.OutputDoubleRegister(), i.InputDoubleRegister(1)); \
    return 2;                                                     \
jyan's avatar
jyan committed
415 416
  }

417 418 419 420 421 422
#define DMInstr(instr)                                            \
  [&]() {                                                         \
    DCHECK(i.OutputDoubleRegister() == i.InputDoubleRegister(0)); \
    int ret = 2;                                                  \
    __ instr(i.OutputDoubleRegister(), GET_MEMOPERAND(ret, 1));   \
    return ret;                                                   \
jyan's avatar
jyan committed
423 424
  }

425 426 427 428 429 430 431
#define DMTInstr(instr)                                           \
  [&]() {                                                         \
    DCHECK(i.OutputDoubleRegister() == i.InputDoubleRegister(0)); \
    int ret = 2;                                                  \
    __ instr(i.OutputDoubleRegister(), GET_MEMOPERAND(ret, 1),    \
             kScratchDoubleReg);                                  \
    return ret;                                                   \
jyan's avatar
jyan committed
432 433
  }

434 435 436 437 438
#define R_MInstr(instr)                                   \
  [&]() {                                                 \
    int ret = 2;                                          \
    __ instr(i.OutputRegister(), GET_MEMOPERAND(ret, 0)); \
    return ret;                                           \
jyan's avatar
jyan committed
439 440
  }

441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457
#define R_DInstr(instr)                                     \
  [&]() {                                                   \
    __ instr(i.OutputRegister(), i.InputDoubleRegister(0)); \
    return 2;                                               \
  }

#define D_DInstr(instr)                                           \
  [&]() {                                                         \
    __ instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
    return 2;                                                     \
  }

#define D_MInstr(instr)                                         \
  [&]() {                                                       \
    int ret = 2;                                                \
    __ instr(i.OutputDoubleRegister(), GET_MEMOPERAND(ret, 0)); \
    return ret;                                                 \
jyan's avatar
jyan committed
458
  }
459 460 461 462 463 464 465 466 467

#define D_MTInstr(instr)                                       \
  [&]() {                                                      \
    int ret = 2;                                               \
    __ instr(i.OutputDoubleRegister(), GET_MEMOPERAND(ret, 0), \
             kScratchDoubleReg);                               \
    return ret;                                                \
  }

468
static int nullInstr() { UNREACHABLE(); }
jyan's avatar
jyan committed
469

470 471
template <int numOfOperand, class RType, class MType, class IType>
static inline int AssembleOp(Instruction* instr, RType r, MType m, IType i) {
jyan's avatar
jyan committed
472
  AddressingMode mode = AddressingModeField::decode(instr->opcode());
473 474 475 476 477 478
  if (mode != kMode_None || HasStackSlotInput(instr, numOfOperand - 1)) {
    return m();
  } else if (HasRegisterInput(instr, numOfOperand - 1)) {
    return r();
  } else if (HasImmediateInput(instr, numOfOperand - 1)) {
    return i();
jyan's avatar
jyan committed
479 480 481 482 483
  } else {
    UNREACHABLE();
  }
}

484 485 486 487
template <class _RR, class _RM, class _RI>
static inline int AssembleBinOp(Instruction* instr, _RR _rr, _RM _rm, _RI _ri) {
  return AssembleOp<2>(instr, _rr, _rm, _ri);
}
jyan's avatar
jyan committed
488

489 490 491 492
template <class _R, class _M, class _I>
static inline int AssembleUnaryOp(Instruction* instr, _R _r, _M _m, _I _i) {
  return AssembleOp<1>(instr, _r, _m, _i);
}
493

494 495 496 497
#define ASSEMBLE_BIN_OP(_rr, _rm, _ri) AssembleBinOp(instr, _rr, _rm, _ri)
#define ASSEMBLE_UNARY_OP(_r, _m, _i) AssembleUnaryOp(instr, _r, _m, _i)

#ifdef V8_TARGET_ARCH_S390X
jyan's avatar
jyan committed
498
#define CHECK_AND_ZERO_EXT_OUTPUT(num)                                \
499 500 501
  ([&](int index) {                                                   \
    DCHECK(HasImmediateInput(instr, (index)));                        \
    int doZeroExt = i.InputInt32(index);                              \
502
    if (doZeroExt) __ LoadU32(i.OutputRegister(), i.OutputRegister()); \
503 504 505 506
  })(num)

#define ASSEMBLE_BIN32_OP(_rr, _rm, _ri) \
  { CHECK_AND_ZERO_EXT_OUTPUT(AssembleBinOp(instr, _rr, _rm, _ri)); }
507 508 509 510
#else
#define ASSEMBLE_BIN32_OP ASSEMBLE_BIN_OP
#define CHECK_AND_ZERO_EXT_OUTPUT(num)
#endif
511 512

}  // namespace
jyan's avatar
jyan committed
513

514 515 516 517 518 519 520 521 522 523 524
#define ASSEMBLE_FLOAT_UNOP(asm_instr)                                \
  do {                                                                \
    __ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
  } while (0)

#define ASSEMBLE_FLOAT_BINOP(asm_instr)                              \
  do {                                                               \
    __ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0), \
                 i.InputDoubleRegister(1));                          \
  } while (0)

jyan's avatar
jyan committed
525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555
#define ASSEMBLE_COMPARE(cmp_instr, cmpl_instr)                         \
  do {                                                                  \
    AddressingMode mode = AddressingModeField::decode(instr->opcode()); \
    if (mode != kMode_None) {                                           \
      size_t first_index = 1;                                           \
      MemOperand operand = i.MemoryOperand(&mode, &first_index);        \
      if (i.CompareLogical()) {                                         \
        __ cmpl_instr(i.InputRegister(0), operand);                     \
      } else {                                                          \
        __ cmp_instr(i.InputRegister(0), operand);                      \
      }                                                                 \
    } else if (HasRegisterInput(instr, 1)) {                            \
      if (i.CompareLogical()) {                                         \
        __ cmpl_instr(i.InputRegister(0), i.InputRegister(1));          \
      } else {                                                          \
        __ cmp_instr(i.InputRegister(0), i.InputRegister(1));           \
      }                                                                 \
    } else if (HasImmediateInput(instr, 1)) {                           \
      if (i.CompareLogical()) {                                         \
        __ cmpl_instr(i.InputRegister(0), i.InputImmediate(1));         \
      } else {                                                          \
        __ cmp_instr(i.InputRegister(0), i.InputImmediate(1));          \
      }                                                                 \
    } else {                                                            \
      DCHECK(HasStackSlotInput(instr, 1));                              \
      if (i.CompareLogical()) {                                         \
        __ cmpl_instr(i.InputRegister(0), i.InputStackSlot(1));         \
      } else {                                                          \
        __ cmp_instr(i.InputRegister(0), i.InputStackSlot(1));          \
      }                                                                 \
    }                                                                   \
556 557
  } while (0)

jyan's avatar
jyan committed
558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600
#define ASSEMBLE_COMPARE32(cmp_instr, cmpl_instr)                       \
  do {                                                                  \
    AddressingMode mode = AddressingModeField::decode(instr->opcode()); \
    if (mode != kMode_None) {                                           \
      size_t first_index = 1;                                           \
      MemOperand operand = i.MemoryOperand(&mode, &first_index);        \
      if (i.CompareLogical()) {                                         \
        __ cmpl_instr(i.InputRegister(0), operand);                     \
      } else {                                                          \
        __ cmp_instr(i.InputRegister(0), operand);                      \
      }                                                                 \
    } else if (HasRegisterInput(instr, 1)) {                            \
      if (i.CompareLogical()) {                                         \
        __ cmpl_instr(i.InputRegister(0), i.InputRegister(1));          \
      } else {                                                          \
        __ cmp_instr(i.InputRegister(0), i.InputRegister(1));           \
      }                                                                 \
    } else if (HasImmediateInput(instr, 1)) {                           \
      if (i.CompareLogical()) {                                         \
        __ cmpl_instr(i.InputRegister(0), i.InputImmediate(1));         \
      } else {                                                          \
        __ cmp_instr(i.InputRegister(0), i.InputImmediate(1));          \
      }                                                                 \
    } else {                                                            \
      DCHECK(HasStackSlotInput(instr, 1));                              \
      if (i.CompareLogical()) {                                         \
        __ cmpl_instr(i.InputRegister(0), i.InputStackSlot32(1));       \
      } else {                                                          \
        __ cmp_instr(i.InputRegister(0), i.InputStackSlot32(1));        \
      }                                                                 \
    }                                                                   \
  } while (0)

#define ASSEMBLE_FLOAT_COMPARE(cmp_rr_instr, cmp_rm_instr, load_instr)     \
  do {                                                                     \
    AddressingMode mode = AddressingModeField::decode(instr->opcode());    \
    if (mode != kMode_None) {                                              \
      size_t first_index = 1;                                              \
      MemOperand operand = i.MemoryOperand(&mode, &first_index);           \
      __ cmp_rm_instr(i.InputDoubleRegister(0), operand);                  \
    } else if (HasFPRegisterInput(instr, 1)) {                             \
      __ cmp_rr_instr(i.InputDoubleRegister(0), i.InputDoubleRegister(1)); \
    } else {                                                               \
601
      USE(HasFPStackSlotInput);                                            \
jyan's avatar
jyan committed
602 603 604 605 606 607 608 609 610
      DCHECK(HasFPStackSlotInput(instr, 1));                               \
      MemOperand operand = i.InputStackSlot(1);                            \
      if (operand.offset() >= 0) {                                         \
        __ cmp_rm_instr(i.InputDoubleRegister(0), operand);                \
      } else {                                                             \
        __ load_instr(kScratchDoubleReg, operand);                         \
        __ cmp_rr_instr(i.InputDoubleRegister(0), kScratchDoubleReg);      \
      }                                                                    \
    }                                                                      \
611 612 613 614 615 616 617 618
  } while (0)

// Divide instruction dr will implicity use register pair
// r0 & r1 below.
// R0:R1 = R1 / divisor - R0 remainder
// Copy remainder to output reg
#define ASSEMBLE_MODULO(div_instr, shift_instr) \
  do {                                          \
619
    __ mov(r0, i.InputRegister(0));             \
620 621
    __ shift_instr(r0, Operand(32));            \
    __ div_instr(r0, i.InputRegister(1));       \
622
    __ LoadU32(i.OutputRegister(), r0);         \
623 624
  } while (0)

625 626 627 628 629 630 631 632
#define ASSEMBLE_FLOAT_MODULO()                                             \
  do {                                                                      \
    FrameScope scope(tasm(), StackFrame::MANUAL);                           \
    __ PrepareCallCFunction(0, 2, kScratchReg);                             \
    __ MovToFloatParameters(i.InputDoubleRegister(0),                       \
                            i.InputDoubleRegister(1));                      \
    __ CallCFunction(ExternalReference::mod_two_doubles_operation(), 0, 2); \
    __ MovFromFloatResult(i.OutputDoubleRegister());                        \
633 634
  } while (0)

635 636 637 638
#define ASSEMBLE_IEEE754_UNOP(name)                                            \
  do {                                                                         \
    /* TODO(bmeurer): We should really get rid of this special instruction, */ \
    /* and generate a CallAddress instruction instead. */                      \
639
    FrameScope scope(tasm(), StackFrame::MANUAL);                              \
640 641
    __ PrepareCallCFunction(0, 1, kScratchReg);                                \
    __ MovToFloatParameter(i.InputDoubleRegister(0));                          \
642
    __ CallCFunction(ExternalReference::ieee754_##name##_function(), 0, 1);    \
643 644 645 646 647 648 649 650
    /* Move the result in the double result register. */                       \
    __ MovFromFloatResult(i.OutputDoubleRegister());                           \
  } while (0)

#define ASSEMBLE_IEEE754_BINOP(name)                                           \
  do {                                                                         \
    /* TODO(bmeurer): We should really get rid of this special instruction, */ \
    /* and generate a CallAddress instruction instead. */                      \
651
    FrameScope scope(tasm(), StackFrame::MANUAL);                              \
652 653 654
    __ PrepareCallCFunction(0, 2, kScratchReg);                                \
    __ MovToFloatParameters(i.InputDoubleRegister(0),                          \
                            i.InputDoubleRegister(1));                         \
655
    __ CallCFunction(ExternalReference::ieee754_##name##_function(), 0, 2);    \
656 657 658 659
    /* Move the result in the double result register. */                       \
    __ MovFromFloatResult(i.OutputDoubleRegister());                           \
  } while (0)

jyan's avatar
jyan committed
660
//
661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677
// Only MRI mode for these instructions available
#define ASSEMBLE_LOAD_FLOAT(asm_instr)                \
  do {                                                \
    DoubleRegister result = i.OutputDoubleRegister(); \
    AddressingMode mode = kMode_None;                 \
    MemOperand operand = i.MemoryOperand(&mode);      \
    __ asm_instr(result, operand);                    \
  } while (0)

#define ASSEMBLE_LOAD_INTEGER(asm_instr)         \
  do {                                           \
    Register result = i.OutputRegister();        \
    AddressingMode mode = kMode_None;            \
    MemOperand operand = i.MemoryOperand(&mode); \
    __ asm_instr(result, operand);               \
  } while (0)

jyan's avatar
jyan committed
678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709
#define ASSEMBLE_LOADANDTEST64(asm_instr_rr, asm_instr_rm)              \
  {                                                                     \
    AddressingMode mode = AddressingModeField::decode(instr->opcode()); \
    Register dst = HasRegisterOutput(instr) ? i.OutputRegister() : r0;  \
    if (mode != kMode_None) {                                           \
      size_t first_index = 0;                                           \
      MemOperand operand = i.MemoryOperand(&mode, &first_index);        \
      __ asm_instr_rm(dst, operand);                                    \
    } else if (HasRegisterInput(instr, 0)) {                            \
      __ asm_instr_rr(dst, i.InputRegister(0));                         \
    } else {                                                            \
      DCHECK(HasStackSlotInput(instr, 0));                              \
      __ asm_instr_rm(dst, i.InputStackSlot(0));                        \
    }                                                                   \
  }

#define ASSEMBLE_LOADANDTEST32(asm_instr_rr, asm_instr_rm)              \
  {                                                                     \
    AddressingMode mode = AddressingModeField::decode(instr->opcode()); \
    Register dst = HasRegisterOutput(instr) ? i.OutputRegister() : r0;  \
    if (mode != kMode_None) {                                           \
      size_t first_index = 0;                                           \
      MemOperand operand = i.MemoryOperand(&mode, &first_index);        \
      __ asm_instr_rm(dst, operand);                                    \
    } else if (HasRegisterInput(instr, 0)) {                            \
      __ asm_instr_rr(dst, i.InputRegister(0));                         \
    } else {                                                            \
      DCHECK(HasStackSlotInput(instr, 0));                              \
      __ asm_instr_rm(dst, i.InputStackSlot32(0));                      \
    }                                                                   \
  }

710 711 712 713 714 715
#define ASSEMBLE_STORE_FLOAT32()                         \
  do {                                                   \
    size_t index = 0;                                    \
    AddressingMode mode = kMode_None;                    \
    MemOperand operand = i.MemoryOperand(&mode, &index); \
    DoubleRegister value = i.InputDoubleRegister(index); \
716
    __ StoreF32(value, operand);                         \
717 718 719 720 721 722 723 724
  } while (0)

#define ASSEMBLE_STORE_DOUBLE()                          \
  do {                                                   \
    size_t index = 0;                                    \
    AddressingMode mode = kMode_None;                    \
    MemOperand operand = i.MemoryOperand(&mode, &index); \
    DoubleRegister value = i.InputDoubleRegister(index); \
725
    __ StoreF64(value, operand);                         \
726 727 728 729 730 731 732 733 734 735 736
  } while (0)

#define ASSEMBLE_STORE_INTEGER(asm_instr)                \
  do {                                                   \
    size_t index = 0;                                    \
    AddressingMode mode = kMode_None;                    \
    MemOperand operand = i.MemoryOperand(&mode, &index); \
    Register value = i.InputRegister(index);             \
    __ asm_instr(value, operand);                        \
  } while (0)

737 738 739 740 741 742 743 744 745 746 747 748 749 750
#define ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_BYTE(load_and_ext)                   \
  do {                                                                        \
    Register old_value = i.InputRegister(0);                                  \
    Register new_value = i.InputRegister(1);                                  \
    Register output = i.OutputRegister();                                     \
    Register addr = kScratchReg;                                              \
    Register temp0 = r0;                                                      \
    Register temp1 = r1;                                                      \
    size_t index = 2;                                                         \
    AddressingMode mode = kMode_None;                                         \
    MemOperand op = i.MemoryOperand(&mode, &index);                           \
    __ lay(addr, op);                                                         \
    __ AtomicCmpExchangeU8(addr, output, old_value, new_value, temp0, temp1); \
    __ load_and_ext(output, output);                                          \
751 752
  } while (false)

753 754 755 756 757 758 759 760 761 762 763 764 765 766
#define ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_HALFWORD(load_and_ext)                \
  do {                                                                         \
    Register old_value = i.InputRegister(0);                                   \
    Register new_value = i.InputRegister(1);                                   \
    Register output = i.OutputRegister();                                      \
    Register addr = kScratchReg;                                               \
    Register temp0 = r0;                                                       \
    Register temp1 = r1;                                                       \
    size_t index = 2;                                                          \
    AddressingMode mode = kMode_None;                                          \
    MemOperand op = i.MemoryOperand(&mode, &index);                            \
    __ lay(addr, op);                                                          \
    __ AtomicCmpExchangeU16(addr, output, old_value, new_value, temp0, temp1); \
    __ load_and_ext(output, output);                                           \
767 768
  } while (false)

769 770 771 772 773 774 775 776 777 778
#define ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_WORD()       \
  do {                                                \
    Register new_val = i.InputRegister(1);            \
    Register output = i.OutputRegister();             \
    Register addr = kScratchReg;                      \
    size_t index = 2;                                 \
    AddressingMode mode = kMode_None;                 \
    MemOperand op = i.MemoryOperand(&mode, &index);   \
    __ lay(addr, op);                                 \
    __ CmpAndSwap(output, new_val, MemOperand(addr)); \
779
    __ LoadU32(output, output);                        \
780 781
  } while (false)

782 783 784 785 786 787 788 789 790
#define ASSEMBLE_ATOMIC_BINOP_WORD(load_and_op)      \
  do {                                               \
    Register value = i.InputRegister(2);             \
    Register result = i.OutputRegister(0);           \
    Register addr = r1;                              \
    AddressingMode mode = kMode_None;                \
    MemOperand op = i.MemoryOperand(&mode);          \
    __ lay(addr, op);                                \
    __ load_and_op(result, value, MemOperand(addr)); \
791
    __ LoadU32(result, result);                       \
792 793
  } while (false)

794 795 796 797 798 799 800 801 802
#define ASSEMBLE_ATOMIC_BINOP_WORD64(load_and_op)    \
  do {                                               \
    Register value = i.InputRegister(2);             \
    Register result = i.OutputRegister(0);           \
    Register addr = r1;                              \
    AddressingMode mode = kMode_None;                \
    MemOperand op = i.MemoryOperand(&mode);          \
    __ lay(addr, op);                                \
    __ load_and_op(result, value, MemOperand(addr)); \
803 804
  } while (false)

805 806 807
#define ATOMIC_BIN_OP(bin_inst, offset, shift_amount, start, end)           \
  do {                                                                      \
    Label do_cs;                                                            \
808
    __ LoadU32(prev, MemOperand(addr, offset));                              \
809 810 811 812 813 814 815 816 817 818
    __ bind(&do_cs);                                                        \
    __ RotateInsertSelectBits(temp, value, Operand(start), Operand(end),    \
                              Operand(static_cast<intptr_t>(shift_amount)), \
                              true);                                        \
    __ bin_inst(new_val, prev, temp);                                       \
    __ lr(temp, prev);                                                      \
    __ RotateInsertSelectBits(temp, new_val, Operand(start), Operand(end),  \
                              Operand::Zero(), false);                      \
    __ CmpAndSwap(prev, temp, MemOperand(addr, offset));                    \
    __ bne(&do_cs, Label::kNear);                                           \
819 820 821
  } while (false)

#ifdef V8_TARGET_BIG_ENDIAN
822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838
#define ATOMIC_BIN_OP_HALFWORD(bin_inst, index, extract_result) \
  {                                                             \
    constexpr int offset = -(2 * index);                        \
    constexpr int shift_amount = 16 - (index * 16);             \
    constexpr int start = 48 - shift_amount;                    \
    constexpr int end = start + 15;                             \
    ATOMIC_BIN_OP(bin_inst, offset, shift_amount, start, end);  \
    extract_result();                                           \
  }
#define ATOMIC_BIN_OP_BYTE(bin_inst, index, extract_result)    \
  {                                                            \
    constexpr int offset = -(index);                           \
    constexpr int shift_amount = 24 - (index * 8);             \
    constexpr int start = 56 - shift_amount;                   \
    constexpr int end = start + 7;                             \
    ATOMIC_BIN_OP(bin_inst, offset, shift_amount, start, end); \
    extract_result();                                          \
839 840
  }
#else
841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857
#define ATOMIC_BIN_OP_HALFWORD(bin_inst, index, extract_result) \
  {                                                             \
    constexpr int offset = -(2 * index);                        \
    constexpr int shift_amount = index * 16;                    \
    constexpr int start = 48 - shift_amount;                    \
    constexpr int end = start + 15;                             \
    ATOMIC_BIN_OP(bin_inst, offset, shift_amount, start, end);  \
    extract_result();                                           \
  }
#define ATOMIC_BIN_OP_BYTE(bin_inst, index, extract_result)    \
  {                                                            \
    constexpr int offset = -(index);                           \
    constexpr int shift_amount = index * 8;                    \
    constexpr int start = 56 - shift_amount;                   \
    constexpr int end = start + 7;                             \
    ATOMIC_BIN_OP(bin_inst, offset, shift_amount, start, end); \
    extract_result();                                          \
858 859 860
  }
#endif  // V8_TARGET_BIG_ENDIAN

861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881
#define ASSEMBLE_ATOMIC_BINOP_HALFWORD(bin_inst, extract_result) \
  do {                                                           \
    Register value = i.InputRegister(2);                         \
    Register result = i.OutputRegister(0);                       \
    Register prev = i.TempRegister(0);                           \
    Register new_val = r0;                                       \
    Register addr = r1;                                          \
    Register temp = kScratchReg;                                 \
    AddressingMode mode = kMode_None;                            \
    MemOperand op = i.MemoryOperand(&mode);                      \
    Label two, done;                                             \
    __ lay(addr, op);                                            \
    __ tmll(addr, Operand(3));                                   \
    __ b(Condition(2), &two);                                    \
    /* word boundary */                                          \
    ATOMIC_BIN_OP_HALFWORD(bin_inst, 0, extract_result);         \
    __ b(&done);                                                 \
    __ bind(&two);                                               \
    /* halfword boundary */                                      \
    ATOMIC_BIN_OP_HALFWORD(bin_inst, 1, extract_result);         \
    __ bind(&done);                                              \
882 883
  } while (false)

884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914
#define ASSEMBLE_ATOMIC_BINOP_BYTE(bin_inst, extract_result) \
  do {                                                       \
    Register value = i.InputRegister(2);                     \
    Register result = i.OutputRegister(0);                   \
    Register addr = i.TempRegister(0);                       \
    Register prev = r0;                                      \
    Register new_val = r1;                                   \
    Register temp = kScratchReg;                             \
    AddressingMode mode = kMode_None;                        \
    MemOperand op = i.MemoryOperand(&mode);                  \
    Label done, one, two, three;                             \
    __ lay(addr, op);                                        \
    __ tmll(addr, Operand(3));                               \
    __ b(Condition(1), &three);                              \
    __ b(Condition(2), &two);                                \
    __ b(Condition(4), &one);                                \
    /* ending with 0b00 (word boundary) */                   \
    ATOMIC_BIN_OP_BYTE(bin_inst, 0, extract_result);         \
    __ b(&done);                                             \
    /* ending with 0b01 */                                   \
    __ bind(&one);                                           \
    ATOMIC_BIN_OP_BYTE(bin_inst, 1, extract_result);         \
    __ b(&done);                                             \
    /* ending with 0b10 (hw boundary) */                     \
    __ bind(&two);                                           \
    ATOMIC_BIN_OP_BYTE(bin_inst, 2, extract_result);         \
    __ b(&done);                                             \
    /* ending with 0b11 */                                   \
    __ bind(&three);                                         \
    ATOMIC_BIN_OP_BYTE(bin_inst, 3, extract_result);         \
    __ bind(&done);                                          \
915 916
  } while (false)

917 918 919 920 921 922 923 924 925 926
#define ASSEMBLE_ATOMIC64_COMP_EXCHANGE_WORD64()        \
  do {                                                  \
    Register new_val = i.InputRegister(1);              \
    Register output = i.OutputRegister();               \
    Register addr = kScratchReg;                        \
    size_t index = 2;                                   \
    AddressingMode mode = kMode_None;                   \
    MemOperand op = i.MemoryOperand(&mode, &index);     \
    __ lay(addr, op);                                   \
    __ CmpAndSwap64(output, new_val, MemOperand(addr)); \
927 928
  } while (false)

929 930
void CodeGenerator::AssembleDeconstructFrame() {
  __ LeaveFrame(StackFrame::MANUAL);
931
  unwinding_info_writer_.MarkFrameDeconstructed(__ pc_offset());
932 933
}

934
void CodeGenerator::AssemblePrepareTailCall() {
935
  if (frame_access_state()->has_frame()) {
936 937 938 939 940
    __ RestoreFrameStateForTailCall();
  }
  frame_access_state()->SetFrameAccessToSP();
}

941 942
namespace {

943
void FlushPendingPushRegisters(TurboAssembler* tasm,
944 945 946 947 948 949
                               FrameAccessState* frame_access_state,
                               ZoneVector<Register>* pending_pushes) {
  switch (pending_pushes->size()) {
    case 0:
      break;
    case 1:
950
      tasm->Push((*pending_pushes)[0]);
951 952
      break;
    case 2:
953
      tasm->Push((*pending_pushes)[0], (*pending_pushes)[1]);
954 955
      break;
    case 3:
956
      tasm->Push((*pending_pushes)[0], (*pending_pushes)[1],
957 958 959 960 961 962
                 (*pending_pushes)[2]);
      break;
    default:
      UNREACHABLE();
  }
  frame_access_state->IncreaseSPDelta(pending_pushes->size());
963
  pending_pushes->clear();
964 965 966
}

void AdjustStackPointerForTailCall(
967
    TurboAssembler* tasm, FrameAccessState* state, int new_slot_above_sp,
968 969 970 971 972 973 974
    ZoneVector<Register>* pending_pushes = nullptr,
    bool allow_shrinkage = true) {
  int current_sp_offset = state->GetSPToFPSlotCount() +
                          StandardFrameConstants::kFixedSlotCountAboveFp;
  int stack_slot_delta = new_slot_above_sp - current_sp_offset;
  if (stack_slot_delta > 0) {
    if (pending_pushes != nullptr) {
975
      FlushPendingPushRegisters(tasm, state, pending_pushes);
976
    }
977
    tasm->AddS64(sp, sp, Operand(-stack_slot_delta * kSystemPointerSize));
978 979 980
    state->IncreaseSPDelta(stack_slot_delta);
  } else if (allow_shrinkage && stack_slot_delta < 0) {
    if (pending_pushes != nullptr) {
981
      FlushPendingPushRegisters(tasm, state, pending_pushes);
982
    }
983
    tasm->AddS64(sp, sp, Operand(-stack_slot_delta * kSystemPointerSize));
984 985 986 987 988 989 990
    state->IncreaseSPDelta(stack_slot_delta);
  }
}

}  // namespace

void CodeGenerator::AssembleTailCallBeforeGap(Instruction* instr,
991
                                              int first_unused_slot_offset) {
992
  ZoneVector<MoveOperands*> pushes(zone());
993
  GetPushCompatibleMoves(instr, kRegisterPush, &pushes);
994 995 996

  if (!pushes.empty() &&
      (LocationOperand::cast(pushes.back()->destination()).index() + 1 ==
997
       first_unused_slot_offset)) {
998 999 1000 1001 1002 1003 1004
    S390OperandConverter g(this, instr);
    ZoneVector<Register> pending_pushes(zone());
    for (auto move : pushes) {
      LocationOperand destination_location(
          LocationOperand::cast(move->destination()));
      InstructionOperand source(move->source());
      AdjustStackPointerForTailCall(
1005
          tasm(), frame_access_state(),
1006 1007
          destination_location.index() - pending_pushes.size(),
          &pending_pushes);
1008 1009 1010 1011 1012 1013 1014 1015 1016
      // Pushes of non-register data types are not supported.
      DCHECK(source.IsRegister());
      LocationOperand source_location(LocationOperand::cast(source));
      pending_pushes.push_back(source_location.GetRegister());
      // TODO(arm): We can push more than 3 registers at once. Add support in
      // the macro-assembler for pushing a list of registers.
      if (pending_pushes.size() == 3) {
        FlushPendingPushRegisters(tasm(), frame_access_state(),
                                  &pending_pushes);
1017 1018 1019
      }
      move->Eliminate();
    }
1020
    FlushPendingPushRegisters(tasm(), frame_access_state(), &pending_pushes);
1021
  }
1022
  AdjustStackPointerForTailCall(tasm(), frame_access_state(),
1023
                                first_unused_slot_offset, nullptr, false);
1024 1025 1026
}

void CodeGenerator::AssembleTailCallAfterGap(Instruction* instr,
1027
                                             int first_unused_slot_offset) {
1028
  AdjustStackPointerForTailCall(tasm(), frame_access_state(),
1029
                                first_unused_slot_offset);
1030 1031
}

1032 1033
// Check that {kJavaScriptCallCodeStartRegister} is correct.
void CodeGenerator::AssembleCodeStartRegisterCheck() {
1034
  Register scratch = r1;
1035
  __ ComputeCodeStartAddress(scratch);
1036
  __ CmpS64(scratch, kJavaScriptCallCodeStartRegister);
1037
  __ Assert(eq, AbortReason::kWrongFunctionCodeStart);
1038 1039
}

1040 1041 1042
// Check if the code object is marked for deoptimization. If it is, then it
// jumps to the CompileLazyDeoptimizedCode builtin. In order to do this we need
// to:
1043
//    1. read from memory the word that contains that bit, which can be found in
1044
//       the flags in the referenced {CodeDataContainer} object;
1045 1046
//    2. test kMarkedForDeoptimizationBit in those flags; and
//    3. if it is not zero then it jumps to the builtin.
1047
void CodeGenerator::BailoutIfDeoptimized() {
1048 1049
  if (FLAG_debug_code) {
    // Check that {kJavaScriptCallCodeStartRegister} is correct.
1050
    __ ComputeCodeStartAddress(ip);
1051
    __ CmpS64(ip, kJavaScriptCallCodeStartRegister);
1052 1053 1054 1055
    __ Assert(eq, AbortReason::kWrongFunctionCodeStart);
  }

  int offset = Code::kCodeDataContainerOffset - Code::kHeaderSize;
1056 1057
  __ LoadTaggedPointerField(
      ip, MemOperand(kJavaScriptCallCodeStartRegister, offset), r0);
1058
  __ LoadS32(ip,
1059
           FieldMemOperand(ip, CodeDataContainer::kKindSpecificFlagsOffset));
1060
  __ TestBit(ip, Code::kMarkedForDeoptimizationBit);
1061 1062
  __ Jump(BUILTIN_CODE(isolate(), CompileLazyDeoptimizedCode),
          RelocInfo::CODE_TARGET, ne);
1063 1064
}

1065
// Assembles an instruction after register allocation, producing machine code.
1066 1067
CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
    Instruction* instr) {
1068 1069 1070 1071
  S390OperandConverter i(this, instr);
  ArchOpcode opcode = ArchOpcodeField::decode(instr->opcode());

  switch (opcode) {
1072 1073 1074 1075 1076 1077
    case kArchComment:
#ifdef V8_TARGET_ARCH_S390X
      __ RecordComment(reinterpret_cast<const char*>(i.InputInt64(0)));
#else
      __ RecordComment(reinterpret_cast<const char*>(i.InputInt32(0)));
#endif
1078
      break;
1079 1080
    case kArchCallCodeObject: {
      if (HasRegisterInput(instr, 0)) {
1081 1082
        Register reg = i.InputRegister(0);
        DCHECK_IMPLIES(
1083
            instr->HasCallDescriptorFlag(CallDescriptor::kFixedTargetRegister),
1084
            reg == kJavaScriptCallCodeStartRegister);
1085
        __ CallCodeObject(reg);
1086
      } else {
1087
        __ Call(i.InputCode(0), RelocInfo::CODE_TARGET);
1088 1089
      }
      RecordCallPosition(instr);
1090 1091 1092 1093 1094
      frame_access_state()->ClearSPDelta();
      break;
    }
    case kArchCallBuiltinPointer: {
      DCHECK(!instr->InputAt(0)->IsImmediate());
1095 1096
      Register builtin_index = i.InputRegister(0);
      __ CallBuiltinByIndex(builtin_index);
1097
      RecordCallPosition(instr);
1098 1099 1100
      frame_access_state()->ClearSPDelta();
      break;
    }
1101
#if V8_ENABLE_WEBASSEMBLY
1102 1103 1104 1105
    case kArchCallWasmFunction: {
      // We must not share code targets for calls to builtins for wasm code, as
      // they might need to be patched individually.
      if (instr->InputAt(0)->IsImmediate()) {
1106 1107 1108
        Constant constant = i.ToConstant(instr->InputAt(0));
        Address wasm_code = static_cast<Address>(constant.ToInt64());
        __ Call(wasm_code, constant.rmode());
1109 1110 1111 1112 1113 1114 1115
      } else {
        __ Call(i.InputRegister(0));
      }
      RecordCallPosition(instr);
      frame_access_state()->ClearSPDelta();
      break;
    }
1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130
    case kArchTailCallWasm: {
      // We must not share code targets for calls to builtins for wasm code, as
      // they might need to be patched individually.
      if (instr->InputAt(0)->IsImmediate()) {
        Constant constant = i.ToConstant(instr->InputAt(0));
        Address wasm_code = static_cast<Address>(constant.ToInt64());
        __ Jump(wasm_code, constant.rmode());
      } else {
        __ Jump(i.InputRegister(0));
      }
      frame_access_state()->ClearSPDelta();
      frame_access_state()->SetFrameAccessToDefault();
      break;
    }
#endif  // V8_ENABLE_WEBASSEMBLY
1131 1132
    case kArchTailCallCodeObject: {
      if (HasRegisterInput(instr, 0)) {
1133 1134
        Register reg = i.InputRegister(0);
        DCHECK_IMPLIES(
1135
            instr->HasCallDescriptorFlag(CallDescriptor::kFixedTargetRegister),
1136
            reg == kJavaScriptCallCodeStartRegister);
1137
        __ JumpCodeObject(reg);
1138 1139 1140
      } else {
        // We cannot use the constant pool to load the target since
        // we've already restored the caller's frame.
1141
        ConstantPoolUnavailableScope constant_pool_unavailable(tasm());
1142
        __ Jump(i.InputCode(0), RelocInfo::CODE_TARGET);
1143 1144
      }
      frame_access_state()->ClearSPDelta();
1145
      frame_access_state()->SetFrameAccessToDefault();
1146 1147
      break;
    }
1148 1149
    case kArchTailCallAddress: {
      CHECK(!instr->InputAt(0)->IsImmediate());
1150 1151
      Register reg = i.InputRegister(0);
      DCHECK_IMPLIES(
1152
          instr->HasCallDescriptorFlag(CallDescriptor::kFixedTargetRegister),
1153 1154
          reg == kJavaScriptCallCodeStartRegister);
      __ Jump(reg);
1155
      frame_access_state()->ClearSPDelta();
1156
      frame_access_state()->SetFrameAccessToDefault();
1157 1158
      break;
    }
1159 1160 1161 1162
    case kArchCallJSFunction: {
      Register func = i.InputRegister(0);
      if (FLAG_debug_code) {
        // Check the function's context matches the context argument.
1163 1164
        __ LoadTaggedPointerField(
            kScratchReg, FieldMemOperand(func, JSFunction::kContextOffset));
1165
        __ CmpS64(cp, kScratchReg);
1166
        __ Assert(eq, AbortReason::kWrongFunctionContext);
1167
      }
1168
      static_assert(kJavaScriptCallCodeStartRegister == r4, "ABI mismatch");
1169 1170
      __ LoadTaggedPointerField(r4,
                                FieldMemOperand(func, JSFunction::kCodeOffset));
1171
      __ CallCodeObject(r4);
1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182
      RecordCallPosition(instr);
      frame_access_state()->ClearSPDelta();
      break;
    }
    case kArchPrepareCallCFunction: {
      int const num_parameters = MiscField::decode(instr->opcode());
      __ PrepareCallCFunction(num_parameters, kScratchReg);
      // Frame alignment requires using FP-relative frame addressing.
      frame_access_state()->SetFrameAccessToFP();
      break;
    }
1183
    case kArchSaveCallerRegisters: {
1184 1185
      fp_mode_ =
          static_cast<SaveFPRegsMode>(MiscField::decode(instr->opcode()));
1186 1187
      DCHECK(fp_mode_ == SaveFPRegsMode::kIgnore ||
             fp_mode_ == SaveFPRegsMode::kSave);
1188
      // kReturnRegister0 should have been saved before entering the stub.
1189
      int bytes = __ PushCallerSaved(fp_mode_, kReturnRegister0);
1190
      DCHECK(IsAligned(bytes, kSystemPointerSize));
1191
      DCHECK_EQ(0, frame_access_state()->sp_delta());
1192
      frame_access_state()->IncreaseSPDelta(bytes / kSystemPointerSize);
1193 1194
      DCHECK(!caller_registers_saved_);
      caller_registers_saved_ = true;
1195 1196 1197
      break;
    }
    case kArchRestoreCallerRegisters: {
1198 1199
      DCHECK(fp_mode_ ==
             static_cast<SaveFPRegsMode>(MiscField::decode(instr->opcode())));
1200 1201
      DCHECK(fp_mode_ == SaveFPRegsMode::kIgnore ||
             fp_mode_ == SaveFPRegsMode::kSave);
1202
      // Don't overwrite the returned value.
1203
      int bytes = __ PopCallerSaved(fp_mode_, kReturnRegister0);
1204
      frame_access_state()->IncreaseSPDelta(-(bytes / kSystemPointerSize));
1205
      DCHECK_EQ(0, frame_access_state()->sp_delta());
1206 1207
      DCHECK(caller_registers_saved_);
      caller_registers_saved_ = false;
1208 1209
      break;
    }
1210
    case kArchPrepareTailCall:
1211
      AssemblePrepareTailCall();
1212 1213 1214
      break;
    case kArchCallCFunction: {
      int const num_parameters = MiscField::decode(instr->opcode());
1215 1216
      Label return_location;
      // Put the return address in a stack slot.
1217
#if V8_ENABLE_WEBASSEMBLY
1218 1219 1220
      if (linkage()->GetIncomingDescriptor()->IsWasmCapiFunction()) {
        // Put the return address in a stack slot.
        __ larl(r0, &return_location);
1221 1222
        __ StoreU64(r0,
                    MemOperand(fp, WasmExitFrameConstants::kCallingPCOffset));
1223
      }
1224
#endif  // V8_ENABLE_WEBASSEMBLY
1225 1226 1227 1228 1229 1230 1231
      if (instr->InputAt(0)->IsImmediate()) {
        ExternalReference ref = i.InputExternalReference(0);
        __ CallCFunction(ref, num_parameters);
      } else {
        Register func = i.InputRegister(0);
        __ CallCFunction(func, num_parameters);
      }
1232
      __ bind(&return_location);
1233
#if V8_ENABLE_WEBASSEMBLY
1234
      if (linkage()->GetIncomingDescriptor()->IsWasmCapiFunction()) {
1235
        RecordSafepoint(instr->reference_map());
1236
      }
1237
#endif  // V8_ENABLE_WEBASSEMBLY
1238
      frame_access_state()->SetFrameAccessToDefault();
1239 1240 1241 1242 1243
      // Ideally, we should decrement SP delta to match the change of stack
      // pointer in CallCFunction. However, for certain architectures (e.g.
      // ARM), there may be more strict alignment requirement, causing old SP
      // to be saved on the stack. In those cases, we can not calculate the SP
      // delta statically.
1244
      frame_access_state()->ClearSPDelta();
1245 1246
      if (caller_registers_saved_) {
        // Need to re-sync SP delta introduced in kArchSaveCallerRegisters.
1247 1248 1249 1250
        // Here, we assume the sequence to be:
        //   kArchSaveCallerRegisters;
        //   kArchCallCFunction;
        //   kArchRestoreCallerRegisters;
1251
        int bytes =
1252
            __ RequiredStackSizeForCallerSaved(fp_mode_, kReturnRegister0);
1253
        frame_access_state()->IncreaseSPDelta(bytes / kSystemPointerSize);
1254
      }
1255 1256 1257 1258 1259
      break;
    }
    case kArchJmp:
      AssembleArchJump(i.InputRpo(0));
      break;
1260 1261 1262
    case kArchBinarySearchSwitch:
      AssembleArchBinarySearchSwitch(instr);
      break;
1263 1264 1265
    case kArchTableSwitch:
      AssembleArchTableSwitch(instr);
      break;
1266 1267
    case kArchAbortCSAAssert:
      DCHECK(i.InputRegister(0) == r3);
1268
      {
1269 1270 1271
        // We don't actually want to generate a pile of code for this, so just
        // claim there is a stack frame, without generating one.
        FrameScope scope(tasm(), StackFrame::NONE);
1272
        __ Call(isolate()->builtins()->code_handle(Builtin::kAbortCSAAssert),
1273
                RelocInfo::CODE_TARGET);
1274
      }
1275
      __ stop();
1276
      break;
1277
    case kArchDebugBreak:
1278
      __ DebugBreak();
1279
      break;
1280 1281 1282 1283 1284
    case kArchNop:
    case kArchThrowTerminator:
      // don't emit code for nops.
      break;
    case kArchDeoptimize: {
1285
      DeoptimizationExit* exit =
1286
          BuildTranslation(instr, -1, 0, 0, OutputFrameStateCombine::Ignore());
1287
      __ b(exit->label());
1288 1289 1290
      break;
    }
    case kArchRet:
1291
      AssembleReturn(instr->InputAt(0));
1292 1293
      break;
    case kArchFramePointer:
1294
      __ mov(i.OutputRegister(), fp);
1295 1296
      break;
    case kArchParentFramePointer:
1297
      if (frame_access_state()->has_frame()) {
1298
        __ LoadU64(i.OutputRegister(), MemOperand(fp, 0));
1299
      } else {
1300
        __ mov(i.OutputRegister(), fp);
1301 1302
      }
      break;
1303
    case kArchStackPointerGreaterThan: {
1304 1305 1306 1307 1308 1309 1310 1311 1312
      // Potentially apply an offset to the current stack pointer before the
      // comparison to consider the size difference of an optimized frame versus
      // the contained unoptimized frames.

      Register lhs_register = sp;
      uint32_t offset;

      if (ShouldApplyOffsetToStackCheck(instr, &offset)) {
        lhs_register = i.TempRegister(0);
1313
        __ SubS64(lhs_register, sp, Operand(offset));
1314 1315
      }

1316 1317
      constexpr size_t kValueIndex = 0;
      DCHECK(instr->InputAt(kValueIndex)->IsRegister());
1318
      __ CmpU64(lhs_register, i.InputRegister(kValueIndex));
1319 1320
      break;
    }
1321 1322 1323 1324
    case kArchStackCheckOffset:
      __ LoadSmiLiteral(i.OutputRegister(),
                        Smi::FromInt(GetStackCheckOffset()));
      break;
1325
    case kArchTruncateDoubleToI:
1326
      __ TruncateDoubleToI(isolate(), zone(), i.OutputRegister(),
1327
                           i.InputDoubleRegister(0), DetermineStubCallMode());
1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341
      break;
    case kArchStoreWithWriteBarrier: {
      RecordWriteMode mode =
          static_cast<RecordWriteMode>(MiscField::decode(instr->opcode()));
      Register object = i.InputRegister(0);
      Register value = i.InputRegister(2);
      Register scratch0 = i.TempRegister(0);
      Register scratch1 = i.TempRegister(1);
      OutOfLineRecordWrite* ool;

      AddressingMode addressing_mode =
          AddressingModeField::decode(instr->opcode());
      if (addressing_mode == kMode_MRI) {
        int32_t offset = i.InputInt32(1);
1342
        ool = zone()->New<OutOfLineRecordWrite>(
1343 1344
            this, object, offset, value, scratch0, scratch1, mode,
            DetermineStubCallMode(), &unwinding_info_writer_);
1345
        __ StoreTaggedField(value, MemOperand(object, offset), r0);
1346 1347 1348
      } else {
        DCHECK_EQ(kMode_MRR, addressing_mode);
        Register offset(i.InputRegister(1));
1349
        ool = zone()->New<OutOfLineRecordWrite>(
1350 1351
            this, object, offset, value, scratch0, scratch1, mode,
            DetermineStubCallMode(), &unwinding_info_writer_);
1352
        __ StoreTaggedField(value, MemOperand(object, offset));
1353
      }
1354 1355 1356
      if (mode > RecordWriteMode::kValueIsPointer) {
        __ JumpIfSmi(value, ool->exit());
      }
1357 1358 1359 1360 1361 1362 1363 1364 1365
      __ CheckPageFlag(object, scratch0,
                       MemoryChunk::kPointersFromHereAreInterestingMask, ne,
                       ool->entry());
      __ bind(ool->exit());
      break;
    }
    case kArchStackSlot: {
      FrameOffset offset =
          frame_access_state()->GetFrameOffset(i.InputInt32(0));
1366 1367
      __ AddS64(i.OutputRegister(), offset.from_stack_pointer() ? sp : fp,
                Operand(offset.offset()));
1368 1369
      break;
    }
1370
    case kS390_Peek: {
1371
      int reverse_slot = i.InputInt32(0);
1372 1373 1374 1375 1376
      int offset =
          FrameSlotToFPOffset(frame()->GetTotalFrameSlotCount() - reverse_slot);
      if (instr->OutputAt(0)->IsFPRegister()) {
        LocationOperand* op = LocationOperand::cast(instr->OutputAt(0));
        if (op->representation() == MachineRepresentation::kFloat64) {
1377
          __ LoadF64(i.OutputDoubleRegister(), MemOperand(fp, offset));
1378
        } else if (op->representation() == MachineRepresentation::kFloat32) {
1379
          __ LoadF32(i.OutputFloatRegister(), MemOperand(fp, offset));
1380 1381
        } else {
          DCHECK_EQ(MachineRepresentation::kSimd128, op->representation());
1382 1383
          __ LoadV128(i.OutputSimd128Register(), MemOperand(fp, offset),
                      kScratchReg);
1384 1385
        }
      } else {
1386
        __ LoadU64(i.OutputRegister(), MemOperand(fp, offset));
1387 1388 1389
      }
      break;
    }
1390 1391 1392 1393 1394 1395 1396
    case kS390_Abs32:
      // TODO(john.yan): zero-ext
      __ lpr(i.OutputRegister(0), i.InputRegister(0));
      break;
    case kS390_Abs64:
      __ lpgr(i.OutputRegister(0), i.InputRegister(0));
      break;
1397
    case kS390_And32:
1398
      // zero-ext
jyan's avatar
jyan committed
1399
      if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
1400
        ASSEMBLE_BIN32_OP(RRRInstr(nrk), RM32Instr(And), RIInstr(nilf));
jyan's avatar
jyan committed
1401
      } else {
1402
        ASSEMBLE_BIN32_OP(RRInstr(nr), RM32Instr(And), RIInstr(nilf));
jyan's avatar
jyan committed
1403
      }
1404 1405
      break;
    case kS390_And64:
1406 1407 1408 1409 1410
      if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
        ASSEMBLE_BIN_OP(RRRInstr(ngrk), RM64Instr(ng), nullInstr);
      } else {
        ASSEMBLE_BIN_OP(RRInstr(ngr), RM64Instr(ng), nullInstr);
      }
1411
      break;
1412
    case kS390_Or32:
1413
      // zero-ext
jyan's avatar
jyan committed
1414
      if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
1415
        ASSEMBLE_BIN32_OP(RRRInstr(ork), RM32Instr(Or), RIInstr(oilf));
jyan's avatar
jyan committed
1416
      } else {
1417
        ASSEMBLE_BIN32_OP(RRInstr(or_z), RM32Instr(Or), RIInstr(oilf));
jyan's avatar
jyan committed
1418 1419
      }
      break;
1420
    case kS390_Or64:
1421 1422 1423 1424 1425
      if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
        ASSEMBLE_BIN_OP(RRRInstr(ogrk), RM64Instr(og), nullInstr);
      } else {
        ASSEMBLE_BIN_OP(RRInstr(ogr), RM64Instr(og), nullInstr);
      }
1426
      break;
1427
    case kS390_Xor32:
1428
      // zero-ext
jyan's avatar
jyan committed
1429
      if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
1430
        ASSEMBLE_BIN32_OP(RRRInstr(xrk), RM32Instr(Xor), RIInstr(xilf));
jyan's avatar
jyan committed
1431
      } else {
1432
        ASSEMBLE_BIN32_OP(RRInstr(xr), RM32Instr(Xor), RIInstr(xilf));
jyan's avatar
jyan committed
1433
      }
1434 1435
      break;
    case kS390_Xor64:
1436 1437 1438 1439 1440
      if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
        ASSEMBLE_BIN_OP(RRRInstr(xgrk), RM64Instr(xg), nullInstr);
      } else {
        ASSEMBLE_BIN_OP(RRInstr(xgr), RM64Instr(xg), nullInstr);
      }
1441 1442
      break;
    case kS390_ShiftLeft32:
1443
      // zero-ext
jyan's avatar
jyan committed
1444
      if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
1445 1446
        ASSEMBLE_BIN32_OP(RRRInstr(ShiftLeftU32), nullInstr,
                          RRIInstr(ShiftLeftU32));
1447
      } else {
1448
        ASSEMBLE_BIN32_OP(RRInstr(sll), nullInstr, RIInstr(sll));
1449 1450 1451
      }
      break;
    case kS390_ShiftLeft64:
1452
      ASSEMBLE_BIN_OP(RRRInstr(sllg), nullInstr, RRIInstr(sllg));
1453 1454
      break;
    case kS390_ShiftRight32:
1455
      // zero-ext
jyan's avatar
jyan committed
1456
      if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
1457
        ASSEMBLE_BIN32_OP(RRRInstr(srlk), nullInstr, RRIInstr(srlk));
1458
      } else {
1459
        ASSEMBLE_BIN32_OP(RRInstr(srl), nullInstr, RIInstr(srl));
1460 1461 1462
      }
      break;
    case kS390_ShiftRight64:
1463
      ASSEMBLE_BIN_OP(RRRInstr(srlg), nullInstr, RRIInstr(srlg));
1464
      break;
1465
    case kS390_ShiftRightArith32:
1466
      // zero-ext
jyan's avatar
jyan committed
1467
      if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
1468
        ASSEMBLE_BIN32_OP(RRRInstr(srak), nullInstr, RRIInstr(srak));
1469
      } else {
1470
        ASSEMBLE_BIN32_OP(RRInstr(sra), nullInstr, RIInstr(sra));
1471 1472
      }
      break;
1473
    case kS390_ShiftRightArith64:
1474
      ASSEMBLE_BIN_OP(RRRInstr(srag), nullInstr, RRIInstr(srag));
1475
      break;
jyan's avatar
jyan committed
1476
    case kS390_RotRight32: {
1477
      // zero-ext
1478
      if (HasRegisterInput(instr, 1)) {
1479
        __ lcgr(kScratchReg, i.InputRegister(1));
1480 1481 1482 1483 1484
        __ rll(i.OutputRegister(), i.InputRegister(0), kScratchReg);
      } else {
        __ rll(i.OutputRegister(), i.InputRegister(0),
               Operand(32 - i.InputInt32(1)));
      }
jyan's avatar
jyan committed
1485
      CHECK_AND_ZERO_EXT_OUTPUT(2);
1486
      break;
jyan's avatar
jyan committed
1487
    }
1488 1489
    case kS390_RotRight64:
      if (HasRegisterInput(instr, 1)) {
1490
        __ lcgr(kScratchReg, i.InputRegister(1));
joransiu's avatar
joransiu committed
1491
        __ rllg(i.OutputRegister(), i.InputRegister(0), kScratchReg);
1492
      } else {
1493
        DCHECK(HasImmediateInput(instr, 1));
joransiu's avatar
joransiu committed
1494 1495
        __ rllg(i.OutputRegister(), i.InputRegister(0),
                Operand(64 - i.InputInt32(1)));
1496 1497
      }
      break;
1498
    // TODO(john.yan): clean up kS390_RotLeftAnd...
1499
    case kS390_RotLeftAndClear64:
1500 1501 1502 1503
      if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
        int shiftAmount = i.InputInt32(1);
        int endBit = 63 - shiftAmount;
        int startBit = 63 - i.InputInt32(2);
1504
        __ RotateInsertSelectBits(i.OutputRegister(), i.InputRegister(0),
1505 1506
                                  Operand(startBit), Operand(endBit),
                                  Operand(shiftAmount), true);
1507 1508 1509 1510 1511 1512 1513 1514 1515
      } else {
        int shiftAmount = i.InputInt32(1);
        int clearBit = 63 - i.InputInt32(2);
        __ rllg(i.OutputRegister(), i.InputRegister(0), Operand(shiftAmount));
        __ sllg(i.OutputRegister(), i.OutputRegister(), Operand(clearBit));
        __ srlg(i.OutputRegister(), i.OutputRegister(),
                Operand(clearBit + shiftAmount));
        __ sllg(i.OutputRegister(), i.OutputRegister(), Operand(shiftAmount));
      }
1516 1517 1518 1519 1520 1521
      break;
    case kS390_RotLeftAndClearLeft64:
      if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
        int shiftAmount = i.InputInt32(1);
        int endBit = 63;
        int startBit = 63 - i.InputInt32(2);
1522
        __ RotateInsertSelectBits(i.OutputRegister(), i.InputRegister(0),
1523 1524
                                  Operand(startBit), Operand(endBit),
                                  Operand(shiftAmount), true);
1525
      } else {
1526 1527 1528 1529 1530
        int shiftAmount = i.InputInt32(1);
        int clearBit = 63 - i.InputInt32(2);
        __ rllg(i.OutputRegister(), i.InputRegister(0), Operand(shiftAmount));
        __ sllg(i.OutputRegister(), i.OutputRegister(), Operand(clearBit));
        __ srlg(i.OutputRegister(), i.OutputRegister(), Operand(clearBit));
1531 1532 1533 1534 1535 1536 1537
      }
      break;
    case kS390_RotLeftAndClearRight64:
      if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
        int shiftAmount = i.InputInt32(1);
        int endBit = 63 - i.InputInt32(2);
        int startBit = 0;
1538
        __ RotateInsertSelectBits(i.OutputRegister(), i.InputRegister(0),
1539 1540
                                  Operand(startBit), Operand(endBit),
                                  Operand(shiftAmount), true);
1541
      } else {
1542 1543 1544 1545 1546
        int shiftAmount = i.InputInt32(1);
        int clearBit = i.InputInt32(2);
        __ rllg(i.OutputRegister(), i.InputRegister(0), Operand(shiftAmount));
        __ srlg(i.OutputRegister(), i.OutputRegister(), Operand(clearBit));
        __ sllg(i.OutputRegister(), i.OutputRegister(), Operand(clearBit));
1547 1548
      }
      break;
jyan's avatar
jyan committed
1549
    case kS390_Add32: {
1550
      // zero-ext
jyan's avatar
jyan committed
1551
      if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
1552
        ASSEMBLE_BIN32_OP(RRRInstr(ark), RM32Instr(AddS32), RRIInstr(AddS32));
jyan's avatar
jyan committed
1553
      } else {
1554
        ASSEMBLE_BIN32_OP(RRInstr(ar), RM32Instr(AddS32), RIInstr(AddS32));
jyan's avatar
jyan committed
1555
      }
1556
      break;
jyan's avatar
jyan committed
1557
    }
1558
    case kS390_Add64:
1559
      if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
1560
        ASSEMBLE_BIN_OP(RRRInstr(agrk), RM64Instr(ag), RRIInstr(AddS64));
1561
      } else {
1562
        ASSEMBLE_BIN_OP(RRInstr(agr), RM64Instr(ag), RIInstr(agfi));
1563 1564
      }
      break;
1565 1566 1567
    case kS390_AddFloat:
      ASSEMBLE_BIN_OP(DDInstr(aebr), DMTInstr(AddFloat32), nullInstr);
      break;
1568
    case kS390_AddDouble:
1569
      ASSEMBLE_BIN_OP(DDInstr(adbr), DMTInstr(AddFloat64), nullInstr);
1570
      break;
1571
    case kS390_Sub32:
1572
      // zero-ext
jyan's avatar
jyan committed
1573
      if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
1574
        ASSEMBLE_BIN32_OP(RRRInstr(srk), RM32Instr(SubS32), RRIInstr(SubS32));
jyan's avatar
jyan committed
1575
      } else {
1576
        ASSEMBLE_BIN32_OP(RRInstr(sr), RM32Instr(SubS32), RIInstr(SubS32));
jyan's avatar
jyan committed
1577
      }
1578
      break;
1579
    case kS390_Sub64:
1580
      if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
1581
        ASSEMBLE_BIN_OP(RRRInstr(sgrk), RM64Instr(sg), RRIInstr(SubS64));
1582
      } else {
1583
        ASSEMBLE_BIN_OP(RRInstr(sgr), RM64Instr(sg), RIInstr(SubS64));
1584 1585
      }
      break;
1586 1587 1588
    case kS390_SubFloat:
      ASSEMBLE_BIN_OP(DDInstr(sebr), DMTInstr(SubFloat32), nullInstr);
      break;
1589
    case kS390_SubDouble:
1590
      ASSEMBLE_BIN_OP(DDInstr(sdbr), DMTInstr(SubFloat64), nullInstr);
1591 1592
      break;
    case kS390_Mul32:
1593
      // zero-ext
jyan's avatar
jyan committed
1594
      if (CpuFeatures::IsSupported(MISC_INSTR_EXT2)) {
1595
        ASSEMBLE_BIN32_OP(RRRInstr(msrkc), RM32Instr(msc), RIInstr(MulS32));
jyan's avatar
jyan committed
1596
      } else {
1597
        ASSEMBLE_BIN32_OP(RRInstr(MulS32), RM32Instr(MulS32), RIInstr(MulS32));
jyan's avatar
jyan committed
1598
      }
jyan's avatar
jyan committed
1599 1600
      break;
    case kS390_Mul32WithOverflow:
1601
      // zero-ext
1602 1603 1604
      ASSEMBLE_BIN32_OP(RRRInstr(Mul32WithOverflowIfCCUnequal),
                        RRM32Instr(Mul32WithOverflowIfCCUnequal),
                        RRIInstr(Mul32WithOverflowIfCCUnequal));
1605 1606
      break;
    case kS390_Mul64:
1607
      ASSEMBLE_BIN_OP(RRInstr(MulS64), RM64Instr(MulS64), RIInstr(MulS64));
1608 1609
      break;
    case kS390_MulHigh32:
1610
      // zero-ext
1611 1612
      ASSEMBLE_BIN_OP(RRRInstr(MulHighS32), RRM32Instr(MulHighS32),
                      RRIInstr(MulHighS32));
1613 1614
      break;
    case kS390_MulHighU32:
1615 1616 1617
      // zero-ext
      ASSEMBLE_BIN_OP(RRRInstr(MulHighU32), RRM32Instr(MulHighU32),
                      RRIInstr(MulHighU32));
1618 1619
      break;
    case kS390_MulFloat:
1620
      ASSEMBLE_BIN_OP(DDInstr(meebr), DMTInstr(MulFloat32), nullInstr);
1621 1622
      break;
    case kS390_MulDouble:
1623
      ASSEMBLE_BIN_OP(DDInstr(mdbr), DMTInstr(MulFloat64), nullInstr);
1624 1625
      break;
    case kS390_Div64:
1626
      ASSEMBLE_BIN_OP(RRRInstr(DivS64), RRM64Instr(DivS64), nullInstr);
1627
      break;
jyan's avatar
jyan committed
1628
    case kS390_Div32: {
1629
      // zero-ext
1630
      ASSEMBLE_BIN_OP(RRRInstr(DivS32), RRM32Instr(DivS32), nullInstr);
1631
      break;
jyan's avatar
jyan committed
1632
    }
1633
    case kS390_DivU64:
1634
      ASSEMBLE_BIN_OP(RRRInstr(DivU64), RRM64Instr(DivU64), nullInstr);
1635
      break;
jyan's avatar
jyan committed
1636
    case kS390_DivU32: {
1637 1638
      // zero-ext
      ASSEMBLE_BIN_OP(RRRInstr(DivU32), RRM32Instr(DivU32), nullInstr);
1639
      break;
jyan's avatar
jyan committed
1640
    }
1641
    case kS390_DivFloat:
1642
      ASSEMBLE_BIN_OP(DDInstr(debr), DMTInstr(DivFloat32), nullInstr);
1643 1644
      break;
    case kS390_DivDouble:
1645
      ASSEMBLE_BIN_OP(DDInstr(ddbr), DMTInstr(DivFloat64), nullInstr);
1646 1647
      break;
    case kS390_Mod32:
1648
      // zero-ext
1649
      ASSEMBLE_BIN_OP(RRRInstr(ModS32), RRM32Instr(ModS32), nullInstr);
1650 1651
      break;
    case kS390_ModU32:
1652 1653
      // zero-ext
      ASSEMBLE_BIN_OP(RRRInstr(ModU32), RRM32Instr(ModU32), nullInstr);
1654 1655
      break;
    case kS390_Mod64:
1656
      ASSEMBLE_BIN_OP(RRRInstr(ModS64), RRM64Instr(ModS64), nullInstr);
1657 1658
      break;
    case kS390_ModU64:
1659
      ASSEMBLE_BIN_OP(RRRInstr(ModU64), RRM64Instr(ModU64), nullInstr);
1660 1661 1662 1663 1664
      break;
    case kS390_AbsFloat:
      __ lpebr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
      break;
    case kS390_SqrtFloat:
1665 1666 1667 1668
      ASSEMBLE_UNARY_OP(D_DInstr(sqebr), nullInstr, nullInstr);
      break;
    case kS390_SqrtDouble:
      ASSEMBLE_UNARY_OP(D_DInstr(sqdbr), nullInstr, nullInstr);
1669 1670
      break;
    case kS390_FloorFloat:
1671
      __ FloorF32(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
1672 1673
      break;
    case kS390_CeilFloat:
1674
      __ CeilF32(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
1675 1676
      break;
    case kS390_TruncateFloat:
1677
      __ TruncF32(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
1678 1679 1680 1681 1682
      break;
    //  Double operations
    case kS390_ModDouble:
      ASSEMBLE_FLOAT_MODULO();
      break;
1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697
    case kIeee754Float64Acos:
      ASSEMBLE_IEEE754_UNOP(acos);
      break;
    case kIeee754Float64Acosh:
      ASSEMBLE_IEEE754_UNOP(acosh);
      break;
    case kIeee754Float64Asin:
      ASSEMBLE_IEEE754_UNOP(asin);
      break;
    case kIeee754Float64Asinh:
      ASSEMBLE_IEEE754_UNOP(asinh);
      break;
    case kIeee754Float64Atanh:
      ASSEMBLE_IEEE754_UNOP(atanh);
      break;
1698 1699 1700 1701 1702 1703
    case kIeee754Float64Atan:
      ASSEMBLE_IEEE754_UNOP(atan);
      break;
    case kIeee754Float64Atan2:
      ASSEMBLE_IEEE754_BINOP(atan2);
      break;
1704 1705 1706
    case kIeee754Float64Tan:
      ASSEMBLE_IEEE754_UNOP(tan);
      break;
1707 1708 1709
    case kIeee754Float64Tanh:
      ASSEMBLE_IEEE754_UNOP(tanh);
      break;
1710 1711 1712 1713 1714 1715
    case kIeee754Float64Cbrt:
      ASSEMBLE_IEEE754_UNOP(cbrt);
      break;
    case kIeee754Float64Sin:
      ASSEMBLE_IEEE754_UNOP(sin);
      break;
1716 1717 1718
    case kIeee754Float64Sinh:
      ASSEMBLE_IEEE754_UNOP(sinh);
      break;
1719 1720 1721
    case kIeee754Float64Cos:
      ASSEMBLE_IEEE754_UNOP(cos);
      break;
1722 1723 1724
    case kIeee754Float64Cosh:
      ASSEMBLE_IEEE754_UNOP(cosh);
      break;
1725 1726 1727
    case kIeee754Float64Exp:
      ASSEMBLE_IEEE754_UNOP(exp);
      break;
1728 1729 1730
    case kIeee754Float64Expm1:
      ASSEMBLE_IEEE754_UNOP(expm1);
      break;
1731 1732 1733 1734 1735
    case kIeee754Float64Log:
      ASSEMBLE_IEEE754_UNOP(log);
      break;
    case kIeee754Float64Log1p:
      ASSEMBLE_IEEE754_UNOP(log1p);
1736
      break;
1737 1738 1739 1740 1741 1742
    case kIeee754Float64Log2:
      ASSEMBLE_IEEE754_UNOP(log2);
      break;
    case kIeee754Float64Log10:
      ASSEMBLE_IEEE754_UNOP(log10);
      break;
1743 1744
    case kIeee754Float64Pow:
      ASSEMBLE_IEEE754_BINOP(pow);
1745
      break;
1746 1747
    case kS390_Neg32:
      __ lcr(i.OutputRegister(), i.InputRegister(0));
jyan's avatar
jyan committed
1748
      CHECK_AND_ZERO_EXT_OUTPUT(1);
1749 1750 1751
      break;
    case kS390_Neg64:
      __ lcgr(i.OutputRegister(), i.InputRegister(0));
1752
      break;
1753
    case kS390_MaxFloat:
1754 1755
      __ FloatMax(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
                  i.InputDoubleRegister(1));
1756
      break;
1757
    case kS390_MaxDouble:
1758 1759
      __ DoubleMax(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
                   i.InputDoubleRegister(1));
1760 1761
      break;
    case kS390_MinFloat:
1762 1763
      __ FloatMin(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
                  i.InputDoubleRegister(1));
1764
      break;
1765 1766 1767
    case kS390_FloatNearestInt:
      __ NearestIntF32(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
      break;
1768
    case kS390_MinDouble:
1769 1770
      __ DoubleMin(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
                   i.InputDoubleRegister(1));
1771
      break;
1772 1773 1774 1775
    case kS390_AbsDouble:
      __ lpdbr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
      break;
    case kS390_FloorDouble:
1776
      __ FloorF64(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
1777 1778
      break;
    case kS390_CeilDouble:
1779
      __ CeilF64(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
1780 1781
      break;
    case kS390_TruncateDouble:
1782
      __ TruncF64(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
1783 1784
      break;
    case kS390_RoundDouble:
1785 1786
      __ fidbra(ROUND_TO_NEAREST_AWAY_FROM_0, i.OutputDoubleRegister(),
                i.InputDoubleRegister(0));
1787
      break;
1788 1789 1790
    case kS390_DoubleNearestInt:
      __ NearestIntF64(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
      break;
1791
    case kS390_NegFloat:
1792
      ASSEMBLE_UNARY_OP(D_DInstr(lcebr), nullInstr, nullInstr);
1793
      break;
1794
    case kS390_NegDouble:
1795
      ASSEMBLE_UNARY_OP(D_DInstr(lcdbr), nullInstr, nullInstr);
1796 1797
      break;
    case kS390_Cntlz32: {
1798
      __ CountLeadingZerosU32(i.OutputRegister(), i.InputRegister(0), r0);
1799 1800
      break;
    }
1801 1802
#if V8_TARGET_ARCH_S390X
    case kS390_Cntlz64: {
1803
      __ CountLeadingZerosU64(i.OutputRegister(), i.InputRegister(0), r0);
1804 1805
      break;
    }
1806 1807 1808 1809 1810 1811 1812 1813 1814 1815
#endif
    case kS390_Popcnt32:
      __ Popcnt32(i.OutputRegister(), i.InputRegister(0));
      break;
#if V8_TARGET_ARCH_S390X
    case kS390_Popcnt64:
      __ Popcnt64(i.OutputRegister(), i.InputRegister(0));
      break;
#endif
    case kS390_Cmp32:
1816
      ASSEMBLE_COMPARE32(CmpS32, CmpU32);
1817 1818 1819
      break;
#if V8_TARGET_ARCH_S390X
    case kS390_Cmp64:
1820
      ASSEMBLE_COMPARE(CmpS64, CmpU64);
1821 1822 1823
      break;
#endif
    case kS390_CmpFloat:
jyan's avatar
jyan committed
1824 1825
      ASSEMBLE_FLOAT_COMPARE(cebr, ceb, ley);
      // __ cebr(i.InputDoubleRegister(0), i.InputDoubleRegister(1));
1826 1827
      break;
    case kS390_CmpDouble:
jyan's avatar
jyan committed
1828 1829
      ASSEMBLE_FLOAT_COMPARE(cdbr, cdb, ldy);
      // __ cdbr(i.InputDoubleRegister(0), i.InputDoubleRegister(1));
1830 1831 1832
      break;
    case kS390_Tst32:
      if (HasRegisterInput(instr, 1)) {
jyan's avatar
jyan committed
1833
        __ And(r0, i.InputRegister(0), i.InputRegister(1));
1834
      } else {
1835
        // detect tmlh/tmhl/tmhh case
1836 1837 1838 1839 1840 1841 1842
        Operand opnd = i.InputImmediate(1);
        if (is_uint16(opnd.immediate())) {
          __ tmll(i.InputRegister(0), opnd);
        } else {
          __ lr(r0, i.InputRegister(0));
          __ nilf(r0, opnd);
        }
1843 1844 1845 1846 1847 1848
      }
      break;
    case kS390_Tst64:
      if (HasRegisterInput(instr, 1)) {
        __ AndP(r0, i.InputRegister(0), i.InputRegister(1));
      } else {
1849 1850 1851 1852 1853 1854
        Operand opnd = i.InputImmediate(1);
        if (is_uint16(opnd.immediate())) {
          __ tmll(i.InputRegister(0), opnd);
        } else {
          __ AndP(r0, i.InputRegister(0), opnd);
        }
1855 1856
      }
      break;
1857 1858 1859 1860 1861 1862
    case kS390_Float64SilenceNaN: {
      DoubleRegister value = i.InputDoubleRegister(0);
      DoubleRegister result = i.OutputDoubleRegister();
      __ CanonicalizeNaN(result, value);
      break;
    }
1863 1864
    case kS390_Push: {
      int stack_decrement = i.InputInt32(0);
1865 1866 1867 1868 1869 1870 1871
      int slots = stack_decrement / kSystemPointerSize;
      LocationOperand* op = LocationOperand::cast(instr->InputAt(1));
      MachineRepresentation rep = op->representation();
      int pushed_slots = ElementSizeInPointers(rep);
      // Slot-sized arguments are never padded but there may be a gap if
      // the slot allocator reclaimed other padding slots. Adjust the stack
      // here to skip any gap.
1872
      __ AllocateStackSpace((slots - pushed_slots) * kSystemPointerSize);
1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888
      switch (rep) {
        case MachineRepresentation::kFloat32:
          __ lay(sp, MemOperand(sp, -kSystemPointerSize));
          __ StoreF32(i.InputDoubleRegister(1), MemOperand(sp));
          break;
        case MachineRepresentation::kFloat64:
          __ lay(sp, MemOperand(sp, -kDoubleSize));
          __ StoreF64(i.InputDoubleRegister(1), MemOperand(sp));
          break;
        case MachineRepresentation::kSimd128:
          __ lay(sp, MemOperand(sp, -kSimd128Size));
          __ StoreV128(i.InputDoubleRegister(1), MemOperand(sp), kScratchReg);
          break;
        default:
          __ Push(i.InputRegister(1));
          break;
1889
      }
1890 1891 1892
      frame_access_state()->IncreaseSPDelta(slots);
      break;
    }
1893 1894
    case kS390_PushFrame: {
      int num_slots = i.InputInt32(1);
1895
      __ lay(sp, MemOperand(sp, -num_slots * kSystemPointerSize));
1896
      if (instr->InputAt(0)->IsFPRegister()) {
1897 1898
        LocationOperand* op = LocationOperand::cast(instr->InputAt(0));
        if (op->representation() == MachineRepresentation::kFloat64) {
1899
          __ StoreF64(i.InputDoubleRegister(0), MemOperand(sp));
1900
        } else {
1901
          DCHECK_EQ(MachineRepresentation::kFloat32, op->representation());
1902
          __ StoreF32(i.InputDoubleRegister(0), MemOperand(sp));
1903
        }
1904
      } else {
1905
        __ StoreU64(i.InputRegister(0), MemOperand(sp));
1906 1907 1908 1909 1910
      }
      break;
    }
    case kS390_StoreToStackSlot: {
      int slot = i.InputInt32(1);
1911
      if (instr->InputAt(0)->IsFPRegister()) {
1912 1913
        LocationOperand* op = LocationOperand::cast(instr->InputAt(0));
        if (op->representation() == MachineRepresentation::kFloat64) {
1914 1915
          __ StoreF64(i.InputDoubleRegister(0),
                      MemOperand(sp, slot * kSystemPointerSize));
1916
        } else if (op->representation() == MachineRepresentation::kFloat32) {
1917 1918
          __ StoreF32(i.InputDoubleRegister(0),
                      MemOperand(sp, slot * kSystemPointerSize));
1919 1920
        } else {
          DCHECK_EQ(MachineRepresentation::kSimd128, op->representation());
1921 1922
          __ StoreV128(i.InputDoubleRegister(0),
                       MemOperand(sp, slot * kSystemPointerSize), kScratchReg);
1923
        }
1924
      } else {
1925 1926
        __ StoreU64(i.InputRegister(0),
                    MemOperand(sp, slot * kSystemPointerSize));
1927 1928 1929
      }
      break;
    }
1930
    case kS390_SignExtendWord8ToInt32:
1931
      __ lbr(i.OutputRegister(), i.InputRegister(0));
jyan's avatar
jyan committed
1932
      CHECK_AND_ZERO_EXT_OUTPUT(1);
1933
      break;
1934
    case kS390_SignExtendWord16ToInt32:
1935
      __ lhr(i.OutputRegister(), i.InputRegister(0));
jyan's avatar
jyan committed
1936
      CHECK_AND_ZERO_EXT_OUTPUT(1);
1937
      break;
1938 1939 1940 1941 1942 1943 1944
    case kS390_SignExtendWord8ToInt64:
      __ lgbr(i.OutputRegister(), i.InputRegister(0));
      break;
    case kS390_SignExtendWord16ToInt64:
      __ lghr(i.OutputRegister(), i.InputRegister(0));
      break;
    case kS390_SignExtendWord32ToInt64:
1945 1946 1947 1948 1949 1950 1951 1952 1953 1954
      __ lgfr(i.OutputRegister(), i.InputRegister(0));
      break;
    case kS390_Uint32ToUint64:
      // Zero extend
      __ llgfr(i.OutputRegister(), i.InputRegister(0));
      break;
    case kS390_Int64ToInt32:
      // sign extend
      __ lgfr(i.OutputRegister(), i.InputRegister(0));
      break;
1955
    // Convert Fixed to Floating Point
1956
    case kS390_Int64ToFloat32:
1957
      __ ConvertInt64ToFloat(i.OutputDoubleRegister(), i.InputRegister(0));
1958 1959
      break;
    case kS390_Int64ToDouble:
1960
      __ ConvertInt64ToDouble(i.OutputDoubleRegister(), i.InputRegister(0));
1961 1962
      break;
    case kS390_Uint64ToFloat32:
1963 1964
      __ ConvertUnsignedInt64ToFloat(i.OutputDoubleRegister(),
                                     i.InputRegister(0));
1965 1966
      break;
    case kS390_Uint64ToDouble:
1967 1968
      __ ConvertUnsignedInt64ToDouble(i.OutputDoubleRegister(),
                                      i.InputRegister(0));
1969 1970
      break;
    case kS390_Int32ToFloat32:
1971
      __ ConvertIntToFloat(i.OutputDoubleRegister(), i.InputRegister(0));
1972 1973
      break;
    case kS390_Int32ToDouble:
1974
      __ ConvertIntToDouble(i.OutputDoubleRegister(), i.InputRegister(0));
1975 1976
      break;
    case kS390_Uint32ToFloat32:
1977 1978
      __ ConvertUnsignedIntToFloat(i.OutputDoubleRegister(),
                                   i.InputRegister(0));
1979 1980
      break;
    case kS390_Uint32ToDouble:
1981 1982 1983 1984 1985 1986 1987
      __ ConvertUnsignedIntToDouble(i.OutputDoubleRegister(),
                                    i.InputRegister(0));
      break;
    case kS390_DoubleToInt32: {
      Label done;
      __ ConvertDoubleToInt32(i.OutputRegister(0), i.InputDoubleRegister(0),
                              kRoundToNearest);
1988
      __ b(Condition(0xE), &done, Label::kNear);  // normal case
1989
      __ mov(i.OutputRegister(0), Operand::Zero());
1990 1991 1992 1993 1994 1995 1996
      __ bind(&done);
      break;
    }
    case kS390_DoubleToUint32: {
      Label done;
      __ ConvertDoubleToUnsignedInt32(i.OutputRegister(0),
                                      i.InputDoubleRegister(0));
1997
      __ b(Condition(0xE), &done, Label::kNear);  // normal case
1998
      __ mov(i.OutputRegister(0), Operand::Zero());
1999
      __ bind(&done);
2000
      break;
2001
    }
2002
    case kS390_DoubleToInt64: {
2003 2004
      Label done;
      if (i.OutputCount() > 1) {
2005
        __ mov(i.OutputRegister(1), Operand(1));
2006
      }
2007
      __ ConvertDoubleToInt64(i.OutputRegister(0), i.InputDoubleRegister(0));
2008
      __ b(Condition(0xE), &done, Label::kNear);  // normal case
2009
      if (i.OutputCount() > 1) {
2010
        __ mov(i.OutputRegister(1), Operand::Zero());
2011
      } else {
2012
        __ mov(i.OutputRegister(0), Operand::Zero());
2013 2014
      }
      __ bind(&done);
2015 2016
      break;
    }
2017 2018 2019
    case kS390_DoubleToUint64: {
      Label done;
      if (i.OutputCount() > 1) {
2020
        __ mov(i.OutputRegister(1), Operand(1));
2021 2022 2023
      }
      __ ConvertDoubleToUnsignedInt64(i.OutputRegister(0),
                                      i.InputDoubleRegister(0));
2024
      __ b(Condition(0xE), &done, Label::kNear);  // normal case
2025
      if (i.OutputCount() > 1) {
2026
        __ mov(i.OutputRegister(1), Operand::Zero());
2027
      } else {
2028
        __ mov(i.OutputRegister(0), Operand::Zero());
2029
      }
2030 2031 2032 2033 2034 2035 2036
      __ bind(&done);
      break;
    }
    case kS390_Float32ToInt32: {
      Label done;
      __ ConvertFloat32ToInt32(i.OutputRegister(0), i.InputDoubleRegister(0),
                               kRoundToZero);
2037 2038 2039 2040 2041 2042 2043
      bool set_overflow_to_min_i32 = MiscField::decode(instr->opcode());
      if (set_overflow_to_min_i32) {
        // Avoid INT32_MAX as an overflow indicator and use INT32_MIN instead,
        // because INT32_MIN allows easier out-of-bounds detection.
        __ b(Condition(0xE), &done, Label::kNear);  // normal case
        __ llilh(i.OutputRegister(0), Operand(0x8000));
      }
2044
      __ bind(&done);
2045 2046 2047
      break;
    }
    case kS390_Float32ToUint32: {
2048 2049 2050
      Label done;
      __ ConvertFloat32ToUnsignedInt32(i.OutputRegister(0),
                                       i.InputDoubleRegister(0));
2051 2052 2053 2054 2055
      bool set_overflow_to_min_u32 = MiscField::decode(instr->opcode());
      if (set_overflow_to_min_u32) {
        // Avoid UINT32_MAX as an overflow indicator and use 0 instead,
        // because 0 allows easier out-of-bounds detection.
        __ b(Condition(0xE), &done, Label::kNear);  // normal case
2056
        __ mov(i.OutputRegister(0), Operand::Zero());
2057
      }
2058
      __ bind(&done);
2059 2060 2061
      break;
    }
    case kS390_Float32ToUint64: {
2062 2063
      Label done;
      if (i.OutputCount() > 1) {
2064
        __ mov(i.OutputRegister(1), Operand(1));
2065 2066 2067
      }
      __ ConvertFloat32ToUnsignedInt64(i.OutputRegister(0),
                                       i.InputDoubleRegister(0));
2068
      __ b(Condition(0xE), &done, Label::kNear);  // normal case
2069
      if (i.OutputCount() > 1) {
2070
        __ mov(i.OutputRegister(1), Operand::Zero());
2071
      } else {
2072
        __ mov(i.OutputRegister(0), Operand::Zero());
2073
      }
2074
      __ bind(&done);
2075 2076 2077
      break;
    }
    case kS390_Float32ToInt64: {
2078 2079
      Label done;
      if (i.OutputCount() > 1) {
2080
        __ mov(i.OutputRegister(1), Operand(1));
2081
      }
2082
      __ ConvertFloat32ToInt64(i.OutputRegister(0), i.InputDoubleRegister(0));
2083
      __ b(Condition(0xE), &done, Label::kNear);  // normal case
2084
      if (i.OutputCount() > 1) {
2085
        __ mov(i.OutputRegister(1), Operand::Zero());
2086
      } else {
2087
        __ mov(i.OutputRegister(0), Operand::Zero());
2088
      }
2089
      __ bind(&done);
2090 2091 2092
      break;
    }
    case kS390_DoubleToFloat32:
2093
      ASSEMBLE_UNARY_OP(D_DInstr(ledbr), nullInstr, nullInstr);
2094 2095
      break;
    case kS390_Float32ToDouble:
2096
      ASSEMBLE_UNARY_OP(D_DInstr(ldebr), D_MTInstr(LoadF32AsF64), nullInstr);
2097 2098
      break;
    case kS390_DoubleExtractLowWord32:
2099 2100
      __ lgdr(i.OutputRegister(), i.InputDoubleRegister(0));
      __ llgfr(i.OutputRegister(), i.OutputRegister());
2101 2102
      break;
    case kS390_DoubleExtractHighWord32:
2103 2104
      __ lgdr(i.OutputRegister(), i.InputDoubleRegister(0));
      __ srlg(i.OutputRegister(), i.OutputRegister(), Operand(32));
2105 2106
      break;
    case kS390_DoubleInsertLowWord32:
2107
      __ lgdr(kScratchReg, i.InputDoubleRegister(0));
2108 2109
      __ lr(kScratchReg, i.InputRegister(1));
      __ ldgr(i.OutputDoubleRegister(), kScratchReg);
2110 2111
      break;
    case kS390_DoubleInsertHighWord32:
2112
      __ sllg(kScratchReg, i.InputRegister(1), Operand(32));
2113
      __ lgdr(r0, i.InputDoubleRegister(0));
2114 2115
      __ lr(kScratchReg, r0);
      __ ldgr(i.OutputDoubleRegister(), kScratchReg);
2116 2117
      break;
    case kS390_DoubleConstruct:
2118 2119 2120 2121 2122
      __ sllg(kScratchReg, i.InputRegister(0), Operand(32));
      __ lr(kScratchReg, i.InputRegister(1));

      // Bitwise convert from GPR to FPR
      __ ldgr(i.OutputDoubleRegister(), kScratchReg);
2123 2124
      break;
    case kS390_LoadWordS8:
2125
      ASSEMBLE_LOAD_INTEGER(LoadS8);
2126 2127
      break;
    case kS390_BitcastFloat32ToInt32:
2128
      ASSEMBLE_UNARY_OP(R_DInstr(MovFloatToInt), R_MInstr(LoadU32), nullInstr);
2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139 2140 2141
      break;
    case kS390_BitcastInt32ToFloat32:
      __ MovIntToFloat(i.OutputDoubleRegister(), i.InputRegister(0));
      break;
#if V8_TARGET_ARCH_S390X
    case kS390_BitcastDoubleToInt64:
      __ MovDoubleToInt64(i.OutputRegister(), i.InputDoubleRegister(0));
      break;
    case kS390_BitcastInt64ToDouble:
      __ MovInt64ToDouble(i.OutputDoubleRegister(), i.InputRegister(0));
      break;
#endif
    case kS390_LoadWordU8:
2142
      ASSEMBLE_LOAD_INTEGER(LoadU8);
2143 2144
      break;
    case kS390_LoadWordU16:
2145
      ASSEMBLE_LOAD_INTEGER(LoadU16);
2146 2147
      break;
    case kS390_LoadWordS16:
2148
      ASSEMBLE_LOAD_INTEGER(LoadS16);
2149
      break;
2150
    case kS390_LoadWordU32:
2151
      ASSEMBLE_LOAD_INTEGER(LoadU32);
2152
      break;
2153
    case kS390_LoadWordS32:
2154
      ASSEMBLE_LOAD_INTEGER(LoadS32);
2155
      break;
2156 2157 2158 2159 2160 2161 2162 2163 2164 2165 2166 2167 2168 2169 2170 2171 2172 2173 2174
    case kS390_LoadReverse16:
      ASSEMBLE_LOAD_INTEGER(lrvh);
      break;
    case kS390_LoadReverse32:
      ASSEMBLE_LOAD_INTEGER(lrv);
      break;
    case kS390_LoadReverse64:
      ASSEMBLE_LOAD_INTEGER(lrvg);
      break;
    case kS390_LoadReverse16RR:
      __ lrvr(i.OutputRegister(), i.InputRegister(0));
      __ rll(i.OutputRegister(), i.OutputRegister(), Operand(16));
      break;
    case kS390_LoadReverse32RR:
      __ lrvr(i.OutputRegister(), i.InputRegister(0));
      break;
    case kS390_LoadReverse64RR:
      __ lrvgr(i.OutputRegister(), i.InputRegister(0));
      break;
2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185
    case kS390_LoadReverseSimd128RR:
      __ vlgv(r0, i.InputSimd128Register(0), MemOperand(r0, 0), Condition(3));
      __ vlgv(r1, i.InputSimd128Register(0), MemOperand(r0, 1), Condition(3));
      __ lrvgr(r0, r0);
      __ lrvgr(r1, r1);
      __ vlvg(i.OutputSimd128Register(), r0, MemOperand(r0, 1), Condition(3));
      __ vlvg(i.OutputSimd128Register(), r1, MemOperand(r0, 0), Condition(3));
      break;
    case kS390_LoadReverseSimd128: {
      AddressingMode mode = kMode_None;
      MemOperand operand = i.MemoryOperand(&mode);
2186
      Simd128Register dst = i.OutputSimd128Register();
2187 2188
      if (CpuFeatures::IsSupported(VECTOR_ENHANCE_FACILITY_2) &&
          is_uint12(operand.offset())) {
2189
        __ vlbr(dst, operand, Condition(4));
2190 2191 2192
      } else {
        __ lrvg(r0, operand);
        __ lrvg(r1, MemOperand(operand.rx(), operand.rb(),
2193
                               operand.offset() + kSystemPointerSize));
2194
        __ vlvgp(dst, r1, r0);
2195 2196 2197
      }
      break;
    }
2198 2199 2200
    case kS390_LoadWord64:
      ASSEMBLE_LOAD_INTEGER(lg);
      break;
jyan's avatar
jyan committed
2201 2202 2203 2204 2205 2206 2207 2208
    case kS390_LoadAndTestWord32: {
      ASSEMBLE_LOADANDTEST32(ltr, lt_z);
      break;
    }
    case kS390_LoadAndTestWord64: {
      ASSEMBLE_LOADANDTEST64(ltgr, ltg);
      break;
    }
2209
    case kS390_LoadFloat32:
2210
      ASSEMBLE_LOAD_FLOAT(LoadF32);
2211 2212
      break;
    case kS390_LoadDouble:
2213
      ASSEMBLE_LOAD_FLOAT(LoadF64);
2214
      break;
2215 2216 2217 2218 2219 2220
    case kS390_LoadSimd128: {
      AddressingMode mode = kMode_None;
      MemOperand operand = i.MemoryOperand(&mode);
      __ vl(i.OutputSimd128Register(), operand, Condition(0));
      break;
    }
2221
    case kS390_StoreWord8:
2222
      ASSEMBLE_STORE_INTEGER(StoreU8);
2223 2224
      break;
    case kS390_StoreWord16:
2225
      ASSEMBLE_STORE_INTEGER(StoreU16);
2226 2227
      break;
    case kS390_StoreWord32:
2228
      ASSEMBLE_STORE_INTEGER(StoreU32);
2229 2230 2231
      break;
#if V8_TARGET_ARCH_S390X
    case kS390_StoreWord64:
2232
      ASSEMBLE_STORE_INTEGER(StoreU64);
2233 2234
      break;
#endif
2235 2236 2237 2238 2239 2240 2241 2242 2243
    case kS390_StoreReverse16:
      ASSEMBLE_STORE_INTEGER(strvh);
      break;
    case kS390_StoreReverse32:
      ASSEMBLE_STORE_INTEGER(strv);
      break;
    case kS390_StoreReverse64:
      ASSEMBLE_STORE_INTEGER(strvg);
      break;
2244 2245 2246 2247
    case kS390_StoreReverseSimd128: {
      size_t index = 0;
      AddressingMode mode = kMode_None;
      MemOperand operand = i.MemoryOperand(&mode, &index);
2248 2249
      if (CpuFeatures::IsSupported(VECTOR_ENHANCE_FACILITY_2) &&
          is_uint12(operand.offset())) {
2250 2251 2252 2253 2254 2255 2256 2257
        __ vstbr(i.InputSimd128Register(index), operand, Condition(4));
      } else {
        __ vlgv(r0, i.InputSimd128Register(index), MemOperand(r0, 1),
                Condition(3));
        __ vlgv(r1, i.InputSimd128Register(index), MemOperand(r0, 0),
                Condition(3));
        __ strvg(r0, operand);
        __ strvg(r1, MemOperand(operand.rx(), operand.rb(),
2258
                                operand.offset() + kSystemPointerSize));
2259 2260 2261
      }
      break;
    }
2262 2263 2264 2265 2266 2267
    case kS390_StoreFloat32:
      ASSEMBLE_STORE_FLOAT32();
      break;
    case kS390_StoreDouble:
      ASSEMBLE_STORE_DOUBLE();
      break;
2268 2269 2270 2271 2272 2273 2274
    case kS390_StoreSimd128: {
      size_t index = 0;
      AddressingMode mode = kMode_None;
      MemOperand operand = i.MemoryOperand(&mode, &index);
      __ vst(i.InputSimd128Register(index), operand, Condition(0));
      break;
    }
2275 2276 2277 2278 2279 2280 2281 2282 2283 2284
    case kS390_Lay: {
      MemOperand mem = i.MemoryOperand();
      if (!is_int20(mem.offset())) {
        // Add directly to the base register in case the index register (rx) is
        // r0.
        DCHECK(is_int32(mem.offset()));
        __ AddS64(ip, mem.rb(), Operand(mem.offset()));
        mem = MemOperand(mem.rx(), ip);
      }
      __ lay(i.OutputRegister(), mem);
jyan's avatar
jyan committed
2285
      break;
2286
    }
2287 2288
    case kAtomicExchangeInt8:
    case kAtomicExchangeUint8: {
2289 2290 2291 2292 2293
      Register base = i.InputRegister(0);
      Register index = i.InputRegister(1);
      Register value = i.InputRegister(2);
      Register output = i.OutputRegister();
      __ la(r1, MemOperand(base, index));
2294
      __ AtomicExchangeU8(r1, value, output, r0);
2295
      if (opcode == kAtomicExchangeInt8) {
2296
        __ LoadS8(output, output);
2297
      } else {
2298
        __ LoadU8(output, output);
2299 2300 2301
      }
      break;
    }
2302 2303
    case kAtomicExchangeInt16:
    case kAtomicExchangeUint16: {
2304 2305 2306 2307 2308
      Register base = i.InputRegister(0);
      Register index = i.InputRegister(1);
      Register value = i.InputRegister(2);
      Register output = i.OutputRegister();
      __ la(r1, MemOperand(base, index));
2309
      __ AtomicExchangeU16(r1, value, output, r0);
2310
      if (opcode == kAtomicExchangeInt16) {
2311
        __ lghr(output, output);
2312
      } else {
2313
        __ llghr(output, output);
2314
      }
2315
      break;
2316
    }
2317
    case kAtomicExchangeWord32: {
2318 2319 2320 2321 2322 2323
      Register base = i.InputRegister(0);
      Register index = i.InputRegister(1);
      Register value = i.InputRegister(2);
      Register output = i.OutputRegister();
      Label do_cs;
      __ lay(r1, MemOperand(base, index));
2324
      __ LoadU32(output, MemOperand(r1));
2325 2326 2327 2328 2329
      __ bind(&do_cs);
      __ cs(output, value, MemOperand(r1));
      __ bne(&do_cs, Label::kNear);
      break;
    }
2330
    case kAtomicCompareExchangeInt8:
2331
      ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_BYTE(LoadS8);
2332
      break;
2333
    case kAtomicCompareExchangeUint8:
2334
      ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_BYTE(LoadU8);
2335
      break;
2336
    case kAtomicCompareExchangeInt16:
2337
      ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_HALFWORD(LoadS16);
2338
      break;
2339
    case kAtomicCompareExchangeUint16:
2340
      ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_HALFWORD(LoadU16);
2341
      break;
2342
    case kAtomicCompareExchangeWord32:
2343 2344
      ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_WORD();
      break;
2345
#define ATOMIC_BINOP_CASE(op, inst)                                          \
2346
  case kAtomic##op##Int8:                                                    \
2347 2348 2349
    ASSEMBLE_ATOMIC_BINOP_BYTE(inst, [&]() {                                 \
      intptr_t shift_right = static_cast<intptr_t>(shift_amount);            \
      __ srlk(result, prev, Operand(shift_right));                           \
2350
      __ LoadS8(result, result);                                             \
2351 2352
    });                                                                      \
    break;                                                                   \
2353
  case kAtomic##op##Uint8:                                                   \
2354 2355 2356 2357 2358 2359 2360
    ASSEMBLE_ATOMIC_BINOP_BYTE(inst, [&]() {                                 \
      int rotate_left = shift_amount == 0 ? 0 : 64 - shift_amount;           \
      __ RotateInsertSelectBits(result, prev, Operand(56), Operand(63),      \
                                Operand(static_cast<intptr_t>(rotate_left)), \
                                true);                                       \
    });                                                                      \
    break;                                                                   \
2361
  case kAtomic##op##Int16:                                                   \
2362 2363 2364
    ASSEMBLE_ATOMIC_BINOP_HALFWORD(inst, [&]() {                             \
      intptr_t shift_right = static_cast<intptr_t>(shift_amount);            \
      __ srlk(result, prev, Operand(shift_right));                           \
2365
      __ LoadS16(result, result);                                            \
2366 2367
    });                                                                      \
    break;                                                                   \
2368
  case kAtomic##op##Uint16:                                                  \
2369 2370 2371 2372 2373 2374
    ASSEMBLE_ATOMIC_BINOP_HALFWORD(inst, [&]() {                             \
      int rotate_left = shift_amount == 0 ? 0 : 64 - shift_amount;           \
      __ RotateInsertSelectBits(result, prev, Operand(48), Operand(63),      \
                                Operand(static_cast<intptr_t>(rotate_left)), \
                                true);                                       \
    });                                                                      \
2375
    break;
2376 2377
      ATOMIC_BINOP_CASE(Add, AddS32)
      ATOMIC_BINOP_CASE(Sub, SubS32)
2378 2379 2380 2381
      ATOMIC_BINOP_CASE(And, And)
      ATOMIC_BINOP_CASE(Or, Or)
      ATOMIC_BINOP_CASE(Xor, Xor)
#undef ATOMIC_BINOP_CASE
2382
    case kAtomicAddWord32:
2383 2384
      ASSEMBLE_ATOMIC_BINOP_WORD(laa);
      break;
2385
    case kAtomicSubWord32:
2386 2387
      ASSEMBLE_ATOMIC_BINOP_WORD(LoadAndSub32);
      break;
2388
    case kAtomicAndWord32:
2389 2390
      ASSEMBLE_ATOMIC_BINOP_WORD(lan);
      break;
2391
    case kAtomicOrWord32:
2392 2393
      ASSEMBLE_ATOMIC_BINOP_WORD(lao);
      break;
2394
    case kAtomicXorWord32:
2395 2396
      ASSEMBLE_ATOMIC_BINOP_WORD(lax);
      break;
2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407 2408 2409 2410 2411 2412 2413 2414 2415 2416 2417 2418 2419 2420
    case kS390_Word64AtomicAddUint64:
      ASSEMBLE_ATOMIC_BINOP_WORD64(laag);
      break;
    case kS390_Word64AtomicSubUint64:
      ASSEMBLE_ATOMIC_BINOP_WORD64(LoadAndSub64);
      break;
    case kS390_Word64AtomicAndUint64:
      ASSEMBLE_ATOMIC_BINOP_WORD64(lang);
      break;
    case kS390_Word64AtomicOrUint64:
      ASSEMBLE_ATOMIC_BINOP_WORD64(laog);
      break;
    case kS390_Word64AtomicXorUint64:
      ASSEMBLE_ATOMIC_BINOP_WORD64(laxg);
      break;
    case kS390_Word64AtomicExchangeUint64: {
      Register base = i.InputRegister(0);
      Register index = i.InputRegister(1);
      Register value = i.InputRegister(2);
      Register output = i.OutputRegister();
      Label do_cs;
      __ la(r1, MemOperand(base, index));
      __ lg(output, MemOperand(r1));
      __ bind(&do_cs);
2421
      __ csg(output, value, MemOperand(r1));
2422 2423 2424 2425 2426 2427
      __ bne(&do_cs, Label::kNear);
      break;
    }
    case kS390_Word64AtomicCompareExchangeUint64:
      ASSEMBLE_ATOMIC64_COMP_EXCHANGE_WORD64();
      break;
2428
      // Simd Support.
2429 2430 2431 2432 2433 2434 2435 2436 2437 2438 2439 2440 2441 2442 2443 2444 2445 2446 2447 2448 2449 2450 2451 2452 2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465 2466 2467 2468 2469 2470 2471 2472 2473 2474 2475 2476 2477 2478 2479 2480 2481 2482 2483 2484 2485 2486 2487 2488 2489 2490 2491 2492 2493 2494 2495 2496 2497 2498 2499 2500 2501 2502 2503 2504 2505 2506 2507 2508
#define SIMD_BINOP_LIST(V)      \
  V(F64x2Add, Simd128Register)  \
  V(F64x2Sub, Simd128Register)  \
  V(F64x2Mul, Simd128Register)  \
  V(F64x2Div, Simd128Register)  \
  V(F64x2Min, Simd128Register)  \
  V(F64x2Max, Simd128Register)  \
  V(F64x2Eq, Simd128Register)   \
  V(F64x2Ne, Simd128Register)   \
  V(F64x2Lt, Simd128Register)   \
  V(F64x2Le, Simd128Register)   \
  V(F32x4Add, Simd128Register)  \
  V(F32x4Sub, Simd128Register)  \
  V(F32x4Mul, Simd128Register)  \
  V(F32x4Div, Simd128Register)  \
  V(F32x4Min, Simd128Register)  \
  V(F32x4Max, Simd128Register)  \
  V(F32x4Eq, Simd128Register)   \
  V(F32x4Ne, Simd128Register)   \
  V(F32x4Lt, Simd128Register)   \
  V(F32x4Le, Simd128Register)   \
  V(I64x2Add, Simd128Register)  \
  V(I64x2Sub, Simd128Register)  \
  V(I64x2Mul, Simd128Register)  \
  V(I64x2Eq, Simd128Register)   \
  V(I64x2Ne, Simd128Register)   \
  V(I64x2GtS, Simd128Register)  \
  V(I64x2GeS, Simd128Register)  \
  V(I64x2Shl, Register)         \
  V(I64x2ShrS, Register)        \
  V(I64x2ShrU, Register)        \
  V(I32x4Add, Simd128Register)  \
  V(I32x4Sub, Simd128Register)  \
  V(I32x4Mul, Simd128Register)  \
  V(I32x4Eq, Simd128Register)   \
  V(I32x4Ne, Simd128Register)   \
  V(I32x4GtS, Simd128Register)  \
  V(I32x4GeS, Simd128Register)  \
  V(I32x4GtU, Simd128Register)  \
  V(I32x4GeU, Simd128Register)  \
  V(I32x4MinS, Simd128Register) \
  V(I32x4MinU, Simd128Register) \
  V(I32x4MaxS, Simd128Register) \
  V(I32x4MaxU, Simd128Register) \
  V(I32x4Shl, Register)         \
  V(I32x4ShrS, Register)        \
  V(I32x4ShrU, Register)        \
  V(I16x8Add, Simd128Register)  \
  V(I16x8Sub, Simd128Register)  \
  V(I16x8Mul, Simd128Register)  \
  V(I16x8Eq, Simd128Register)   \
  V(I16x8Ne, Simd128Register)   \
  V(I16x8GtS, Simd128Register)  \
  V(I16x8GeS, Simd128Register)  \
  V(I16x8GtU, Simd128Register)  \
  V(I16x8GeU, Simd128Register)  \
  V(I16x8MinS, Simd128Register) \
  V(I16x8MinU, Simd128Register) \
  V(I16x8MaxS, Simd128Register) \
  V(I16x8MaxU, Simd128Register) \
  V(I16x8Shl, Register)         \
  V(I16x8ShrS, Register)        \
  V(I16x8ShrU, Register)        \
  V(I8x16Add, Simd128Register)  \
  V(I8x16Sub, Simd128Register)  \
  V(I8x16Eq, Simd128Register)   \
  V(I8x16Ne, Simd128Register)   \
  V(I8x16GtS, Simd128Register)  \
  V(I8x16GeS, Simd128Register)  \
  V(I8x16GtU, Simd128Register)  \
  V(I8x16GeU, Simd128Register)  \
  V(I8x16MinS, Simd128Register) \
  V(I8x16MinU, Simd128Register) \
  V(I8x16MaxS, Simd128Register) \
  V(I8x16MaxU, Simd128Register) \
  V(I8x16Shl, Register)         \
  V(I8x16ShrS, Register)        \
  V(I8x16ShrU, Register)

#define EMIT_SIMD_BINOP(name, stype)                              \
2509 2510
  case kS390_##name: {                                            \
    __ name(i.OutputSimd128Register(), i.InputSimd128Register(0), \
2511
            i.Input##stype(1));                                   \
2512 2513 2514 2515 2516 2517
    break;                                                        \
  }
      SIMD_BINOP_LIST(EMIT_SIMD_BINOP)
#undef EMIT_SIMD_BINOP
#undef SIMD_BINOP_LIST

2518 2519 2520 2521 2522 2523 2524 2525 2526 2527 2528 2529 2530 2531 2532 2533
#define SIMD_UNOP_LIST(V)                                    \
  V(F64x2Splat, F64x2Splat, Simd128Register, DoubleRegister) \
  V(F32x4Splat, F32x4Splat, Simd128Register, DoubleRegister) \
  V(I64x2Splat, I64x2Splat, Simd128Register, Register)       \
  V(I32x4Splat, I32x4Splat, Simd128Register, Register)       \
  V(I16x8Splat, I16x8Splat, Simd128Register, Register)       \
  V(I8x16Splat, I8x16Splat, Simd128Register, Register)

#define EMIT_SIMD_UNOP(name, op, dtype, stype)   \
  case kS390_##name: {                           \
    __ op(i.Output##dtype(), i.Input##stype(0)); \
    break;                                       \
  }
      SIMD_UNOP_LIST(EMIT_SIMD_UNOP)
#undef EMIT_SIMD_UNOP
#undef SIMD_UNOP_LIST
2534 2535 2536 2537 2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 2549 2550 2551 2552

#define SIMD_EXTRACT_LANE_LIST(V)     \
  V(F64x2ExtractLane, DoubleRegister) \
  V(F32x4ExtractLane, DoubleRegister) \
  V(I64x2ExtractLane, Register)       \
  V(I32x4ExtractLane, Register)       \
  V(I16x8ExtractLaneU, Register)      \
  V(I16x8ExtractLaneS, Register)      \
  V(I8x16ExtractLaneU, Register)      \
  V(I8x16ExtractLaneS, Register)

#define EMIT_SIMD_EXTRACT_LANE(name, dtype)                                \
  case kS390_##name: {                                                     \
    __ name(i.Output##dtype(), i.InputSimd128Register(0), i.InputInt8(1)); \
    break;                                                                 \
  }
      SIMD_EXTRACT_LANE_LIST(EMIT_SIMD_EXTRACT_LANE)
#undef EMIT_SIMD_EXTRACT_LANE
#undef SIMD_EXTRACT_LANE_LIST
2553 2554 2555 2556 2557 2558 2559 2560 2561 2562 2563 2564 2565 2566 2567 2568 2569 2570 2571

#define SIMD_REPLACE_LANE_LIST(V)     \
  V(F64x2ReplaceLane, DoubleRegister) \
  V(F32x4ReplaceLane, DoubleRegister) \
  V(I64x2ReplaceLane, Register)       \
  V(I32x4ReplaceLane, Register)       \
  V(I16x8ReplaceLane, Register)       \
  V(I8x16ReplaceLane, Register)

#define EMIT_SIMD_REPLACE_LANE(name, stype)                       \
  case kS390_##name: {                                            \
    __ name(i.OutputSimd128Register(), i.InputSimd128Register(0), \
            i.Input##stype(2), i.InputInt8(1));                   \
    break;                                                        \
  }
      SIMD_REPLACE_LANE_LIST(EMIT_SIMD_REPLACE_LANE)
#undef EMIT_SIMD_REPLACE_LANE
#undef SIMD_REPLACE_LANE_LIST
      // vector binops
2572 2573 2574 2575 2576 2577 2578 2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591 2592 2593 2594 2595 2596 2597 2598 2599 2600 2601
    case kS390_F64x2Qfma: {
      Simd128Register src0 = i.InputSimd128Register(0);
      Simd128Register src1 = i.InputSimd128Register(1);
      Simd128Register src2 = i.InputSimd128Register(2);
      Simd128Register dst = i.OutputSimd128Register();
      __ vfma(dst, src1, src2, src0, Condition(3), Condition(0));
      break;
    }
    case kS390_F64x2Qfms: {
      Simd128Register src0 = i.InputSimd128Register(0);
      Simd128Register src1 = i.InputSimd128Register(1);
      Simd128Register src2 = i.InputSimd128Register(2);
      Simd128Register dst = i.OutputSimd128Register();
      __ vfnms(dst, src1, src2, src0, Condition(3), Condition(0));
      break;
    }
    case kS390_F32x4Qfma: {
      Simd128Register src0 = i.InputSimd128Register(0);
      Simd128Register src1 = i.InputSimd128Register(1);
      Simd128Register src2 = i.InputSimd128Register(2);
      Simd128Register dst = i.OutputSimd128Register();
      __ vfma(dst, src1, src2, src0, Condition(2), Condition(0));
      break;
    }
    case kS390_F32x4Qfms: {
      Simd128Register src0 = i.InputSimd128Register(0);
      Simd128Register src1 = i.InputSimd128Register(1);
      Simd128Register src2 = i.InputSimd128Register(2);
      Simd128Register dst = i.OutputSimd128Register();
      __ vfnms(dst, src1, src2, src0, Condition(2), Condition(0));
2602 2603
      break;
    }
2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 2614 2615
    case kS390_I16x8RoundingAverageU: {
      __ vavgl(i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputSimd128Register(1), Condition(0), Condition(0),
               Condition(1));
      break;
    }
    case kS390_I8x16RoundingAverageU: {
      __ vavgl(i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputSimd128Register(1), Condition(0), Condition(0),
               Condition(0));
      break;
    }
2616
    // vector unary ops
2617 2618 2619 2620 2621 2622 2623 2624 2625 2626 2627 2628 2629 2630 2631
    case kS390_F64x2Abs: {
      __ vfpso(i.OutputSimd128Register(), i.InputSimd128Register(0),
               Condition(2), Condition(0), Condition(3));
      break;
    }
    case kS390_F64x2Neg: {
      __ vfpso(i.OutputSimd128Register(), i.InputSimd128Register(0),
               Condition(0), Condition(0), Condition(3));
      break;
    }
    case kS390_F64x2Sqrt: {
      __ vfsq(i.OutputSimd128Register(), i.InputSimd128Register(0),
              Condition(0), Condition(0), Condition(3));
      break;
    }
2632 2633 2634 2635 2636 2637 2638 2639 2640 2641
    case kS390_F32x4Abs: {
      __ vfpso(i.OutputSimd128Register(), i.InputSimd128Register(0),
               Condition(2), Condition(0), Condition(2));
      break;
    }
    case kS390_F32x4Neg: {
      __ vfpso(i.OutputSimd128Register(), i.InputSimd128Register(0),
               Condition(0), Condition(0), Condition(2));
      break;
    }
2642 2643 2644 2645 2646
    case kS390_I64x2Neg: {
      __ vlc(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(0),
             Condition(0), Condition(3));
      break;
    }
2647 2648 2649 2650 2651 2652 2653 2654 2655 2656 2657 2658 2659 2660 2661 2662
    case kS390_I32x4Neg: {
      __ vlc(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(0),
             Condition(0), Condition(2));
      break;
    }
    case kS390_I16x8Neg: {
      __ vlc(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(0),
             Condition(0), Condition(1));
      break;
    }
    case kS390_I8x16Neg: {
      __ vlc(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(0),
             Condition(0), Condition(0));
      break;
    }
    case kS390_F32x4RecipApprox: {
2663
      __ mov(kScratchReg, Operand(1));
2664 2665 2666 2667 2668 2669 2670 2671
      __ ConvertIntToFloat(kScratchDoubleReg, kScratchReg);
      __ vrep(kScratchDoubleReg, kScratchDoubleReg, Operand(0), Condition(2));
      __ vfd(i.OutputSimd128Register(), kScratchDoubleReg,
             i.InputSimd128Register(0), Condition(0), Condition(0),
             Condition(2));
      break;
    }
    case kS390_F32x4RecipSqrtApprox: {
2672 2673
      Simd128Register dst = i.OutputSimd128Register();
      __ vfsq(dst, i.InputSimd128Register(0), Condition(0), Condition(0),
2674
              Condition(2));
2675
      __ mov(kScratchReg, Operand(1));
2676 2677
      __ ConvertIntToFloat(kScratchDoubleReg, kScratchReg);
      __ vrep(kScratchDoubleReg, kScratchDoubleReg, Operand(0), Condition(2));
2678 2679
      __ vfd(dst, kScratchDoubleReg, dst, Condition(0), Condition(0),
             Condition(2));
2680 2681
      break;
    }
2682 2683 2684 2685 2686
    case kS390_F32x4Sqrt: {
      __ vfsq(i.OutputSimd128Register(), i.InputSimd128Register(0),
              Condition(0), Condition(0), Condition(2));
      break;
    }
2687 2688 2689 2690 2691 2692
    case kS390_S128Not: {
      Simd128Register src = i.InputSimd128Register(0);
      Simd128Register dst = i.OutputSimd128Register();
      __ vno(dst, src, src, Condition(0), Condition(0), Condition(0));
      break;
    }
2693 2694 2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705 2706 2707
    case kS390_I8x16Abs: {
      __ vlp(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(0),
             Condition(0), Condition(0));
      break;
    }
    case kS390_I16x8Abs: {
      __ vlp(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(0),
             Condition(0), Condition(1));
      break;
    }
    case kS390_I32x4Abs: {
      __ vlp(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(0),
             Condition(0), Condition(2));
      break;
    }
2708 2709 2710 2711 2712
    case kS390_I64x2Abs: {
      __ vlp(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(0),
             Condition(0), Condition(3));
      break;
    }
2713
    // vector boolean unops
2714
    case kS390_V128AnyTrue: {
2715 2716
      Simd128Register src = i.InputSimd128Register(0);
      Register dst = i.OutputRegister();
2717
      __ mov(dst, Operand(1));
2718
      __ xgr(kScratchReg, kScratchReg);
2719
      __ vtm(src, src, Condition(0), Condition(0), Condition(0));
2720
      __ locgr(Condition(8), dst, kScratchReg);
2721 2722
      break;
    }
2723 2724 2725
#define SIMD_ALL_TRUE(mode)                                                    \
  Simd128Register src = i.InputSimd128Register(0);                             \
  Register dst = i.OutputRegister();                                           \
2726
  __ mov(kScratchReg, Operand(1));                                             \
2727 2728 2729 2730 2731 2732 2733
  __ xgr(dst, dst);                                                            \
  __ vx(kScratchDoubleReg, kScratchDoubleReg, kScratchDoubleReg, Condition(0), \
        Condition(0), Condition(2));                                           \
  __ vceq(kScratchDoubleReg, src, kScratchDoubleReg, Condition(0),             \
          Condition(mode));                                                    \
  __ vtm(kScratchDoubleReg, kScratchDoubleReg, Condition(0), Condition(0),     \
         Condition(0));                                                        \
2734
  __ locgr(Condition(8), dst, kScratchReg);
2735
    case kS390_I64x2AllTrue: {
2736 2737 2738
      SIMD_ALL_TRUE(3)
      break;
    }
2739
    case kS390_I32x4AllTrue: {
2740 2741 2742
      SIMD_ALL_TRUE(2)
      break;
    }
2743
    case kS390_I16x8AllTrue: {
2744 2745 2746
      SIMD_ALL_TRUE(1)
      break;
    }
2747
    case kS390_I8x16AllTrue: {
2748
      SIMD_ALL_TRUE(0)
2749 2750
      break;
    }
2751
#undef SIMD_ALL_TRUE
2752 2753 2754 2755 2756 2757 2758 2759 2760 2761 2762 2763 2764 2765 2766 2767 2768 2769 2770 2771 2772 2773
    // vector bitwise ops
    case kS390_S128And: {
      Simd128Register dst = i.OutputSimd128Register();
      Simd128Register src = i.InputSimd128Register(1);
      __ vn(dst, i.InputSimd128Register(0), src, Condition(0), Condition(0),
            Condition(0));
      break;
    }
    case kS390_S128Or: {
      Simd128Register dst = i.OutputSimd128Register();
      Simd128Register src = i.InputSimd128Register(1);
      __ vo(dst, i.InputSimd128Register(0), src, Condition(0), Condition(0),
            Condition(0));
      break;
    }
    case kS390_S128Xor: {
      Simd128Register dst = i.OutputSimd128Register();
      Simd128Register src = i.InputSimd128Register(1);
      __ vx(dst, i.InputSimd128Register(0), src, Condition(0), Condition(0),
            Condition(0));
      break;
    }
2774
    case kS390_S128Const: {
2775 2776 2777 2778 2779
      uint64_t low = make_uint64(i.InputUint32(1), i.InputUint32(0));
      uint64_t high = make_uint64(i.InputUint32(3), i.InputUint32(2));
      __ mov(r0, Operand(low));
      __ mov(ip, Operand(high));
      __ vlvgp(i.OutputSimd128Register(), ip, r0);
2780 2781
      break;
    }
2782 2783
    case kS390_S128Zero: {
      Simd128Register dst = i.OutputSimd128Register();
2784
      __ vx(dst, dst, dst, Condition(0), Condition(0), Condition(0));
2785 2786
      break;
    }
2787 2788 2789 2790 2791
    case kS390_S128AllOnes: {
      Simd128Register dst = i.OutputSimd128Register();
      __ vceq(dst, dst, dst, Condition(0), Condition(3));
      break;
    }
2792 2793 2794 2795 2796 2797 2798 2799
    case kS390_S128Select: {
      Simd128Register dst = i.OutputSimd128Register();
      Simd128Register mask = i.InputSimd128Register(0);
      Simd128Register src1 = i.InputSimd128Register(1);
      Simd128Register src2 = i.InputSimd128Register(2);
      __ vsel(dst, src1, src2, mask, Condition(0), Condition(0));
      break;
    }
2800 2801 2802 2803 2804 2805 2806
    case kS390_S128AndNot: {
      Simd128Register dst = i.OutputSimd128Register();
      Simd128Register src = i.InputSimd128Register(1);
      __ vnc(dst, i.InputSimd128Register(0), src, Condition(0), Condition(0),
             Condition(0));
      break;
    }
2807 2808 2809 2810 2811 2812 2813 2814 2815
    // vector conversions
#define CONVERT_FLOAT_TO_INT32(convert)                             \
  for (int index = 0; index < 4; index++) {                         \
    __ vlgv(kScratchReg, kScratchDoubleReg, MemOperand(r0, index),  \
            Condition(2));                                          \
    __ MovIntToFloat(tempFPReg1, kScratchReg);                      \
    __ convert(kScratchReg, tempFPReg1, kRoundToZero);              \
    __ vlvg(dst, kScratchReg, MemOperand(r0, index), Condition(2)); \
  }
2816 2817
    case kS390_I32x4SConvertF32x4: {
      Simd128Register src = i.InputSimd128Register(0);
2818
      Simd128Register dst = i.OutputSimd128Register();
2819
      Simd128Register tempFPReg1 = i.ToDoubleRegister(instr->TempAt(0));
2820
      DCHECK_NE(dst, tempFPReg1);
2821 2822 2823 2824 2825 2826
      // NaN to 0
      __ vlr(kScratchDoubleReg, src, Condition(0), Condition(0), Condition(0));
      __ vfce(kScratchDoubleReg, kScratchDoubleReg, kScratchDoubleReg,
              Condition(0), Condition(0), Condition(2));
      __ vn(kScratchDoubleReg, src, kScratchDoubleReg, Condition(0),
            Condition(0), Condition(0));
2827 2828 2829 2830 2831 2832
      if (CpuFeatures::IsSupported(VECTOR_ENHANCE_FACILITY_2)) {
        __ vcgd(i.OutputSimd128Register(), kScratchDoubleReg, Condition(5),
                Condition(0), Condition(2));
      } else {
        CONVERT_FLOAT_TO_INT32(ConvertFloat32ToInt32)
      }
2833 2834 2835 2836
      break;
    }
    case kS390_I32x4UConvertF32x4: {
      Simd128Register src = i.InputSimd128Register(0);
2837
      Simd128Register dst = i.OutputSimd128Register();
2838
      Simd128Register tempFPReg1 = i.ToDoubleRegister(instr->TempAt(0));
2839
      DCHECK_NE(dst, tempFPReg1);
2840 2841 2842 2843 2844
      // NaN to 0, negative to 0
      __ vx(kScratchDoubleReg, kScratchDoubleReg, kScratchDoubleReg,
            Condition(0), Condition(0), Condition(0));
      __ vfmax(kScratchDoubleReg, src, kScratchDoubleReg, Condition(1),
               Condition(0), Condition(2));
2845 2846 2847 2848 2849 2850
      if (CpuFeatures::IsSupported(VECTOR_ENHANCE_FACILITY_2)) {
        __ vclgd(i.OutputSimd128Register(), kScratchDoubleReg, Condition(5),
                 Condition(0), Condition(2));
      } else {
        CONVERT_FLOAT_TO_INT32(ConvertFloat32ToUnsignedInt32)
      }
2851 2852
      break;
    }
2853 2854 2855 2856 2857 2858 2859 2860 2861 2862
#undef CONVERT_FLOAT_TO_INT32
#define CONVERT_INT32_TO_FLOAT(convert, double_index)               \
  Simd128Register src = i.InputSimd128Register(0);                  \
  Simd128Register dst = i.OutputSimd128Register();                  \
  for (int index = 0; index < 4; index++) {                         \
    __ vlgv(kScratchReg, src, MemOperand(r0, index), Condition(2)); \
    __ convert(kScratchDoubleReg, kScratchReg);                     \
    __ MovFloatToInt(kScratchReg, kScratchDoubleReg);               \
    __ vlvg(dst, kScratchReg, MemOperand(r0, index), Condition(2)); \
  }
2863
    case kS390_F32x4SConvertI32x4: {
2864 2865 2866 2867 2868 2869
      if (CpuFeatures::IsSupported(VECTOR_ENHANCE_FACILITY_2)) {
        __ vcdg(i.OutputSimd128Register(), i.InputSimd128Register(0),
                Condition(4), Condition(0), Condition(2));
      } else {
        CONVERT_INT32_TO_FLOAT(ConvertIntToFloat, 0)
      }
2870 2871 2872
      break;
    }
    case kS390_F32x4UConvertI32x4: {
2873 2874 2875 2876 2877 2878
      if (CpuFeatures::IsSupported(VECTOR_ENHANCE_FACILITY_2)) {
        __ vcdlg(i.OutputSimd128Register(), i.InputSimd128Register(0),
                 Condition(4), Condition(0), Condition(2));
      } else {
        CONVERT_INT32_TO_FLOAT(ConvertUnsignedIntToFloat, 0)
      }
2879 2880
      break;
    }
2881
#undef CONVERT_INT32_TO_FLOAT
2882 2883 2884
#define VECTOR_UNPACK(op, mode)                                             \
  __ op(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(0), \
        Condition(0), Condition(mode));
2885 2886 2887 2888 2889 2890 2891 2892 2893 2894 2895 2896 2897 2898 2899 2900
    case kS390_I64x2SConvertI32x4Low: {
      VECTOR_UNPACK(vupl, 2)
      break;
    }
    case kS390_I64x2SConvertI32x4High: {
      VECTOR_UNPACK(vuph, 2)
      break;
    }
    case kS390_I64x2UConvertI32x4Low: {
      VECTOR_UNPACK(vupll, 2)
      break;
    }
    case kS390_I64x2UConvertI32x4High: {
      VECTOR_UNPACK(vuplh, 2)
      break;
    }
2901
    case kS390_I32x4SConvertI16x8Low: {
2902
      VECTOR_UNPACK(vupl, 1)
2903 2904 2905
      break;
    }
    case kS390_I32x4SConvertI16x8High: {
2906
      VECTOR_UNPACK(vuph, 1)
2907 2908 2909
      break;
    }
    case kS390_I32x4UConvertI16x8Low: {
2910
      VECTOR_UNPACK(vupll, 1)
2911 2912 2913
      break;
    }
    case kS390_I32x4UConvertI16x8High: {
2914
      VECTOR_UNPACK(vuplh, 1)
2915 2916 2917
      break;
    }
    case kS390_I16x8SConvertI8x16Low: {
2918
      VECTOR_UNPACK(vupl, 0)
2919 2920 2921
      break;
    }
    case kS390_I16x8SConvertI8x16High: {
2922
      VECTOR_UNPACK(vuph, 0)
2923 2924 2925
      break;
    }
    case kS390_I16x8UConvertI8x16Low: {
2926
      VECTOR_UNPACK(vupll, 0)
2927 2928 2929
      break;
    }
    case kS390_I16x8UConvertI8x16High: {
2930
      VECTOR_UNPACK(vuplh, 0)
2931 2932 2933 2934
      break;
    }
#undef VECTOR_UNPACK
    case kS390_I16x8SConvertI32x4:
2935 2936
      __ vpks(i.OutputSimd128Register(), i.InputSimd128Register(1),
              i.InputSimd128Register(0), Condition(0), Condition(2));
2937 2938
      break;
    case kS390_I8x16SConvertI16x8:
2939 2940
      __ vpks(i.OutputSimd128Register(), i.InputSimd128Register(1),
              i.InputSimd128Register(0), Condition(0), Condition(1));
2941 2942 2943 2944 2945 2946 2947 2948
      break;
#define VECTOR_PACK_UNSIGNED(mode)                                             \
  Simd128Register tempFPReg = i.ToSimd128Register(instr->TempAt(0));           \
  __ vx(kScratchDoubleReg, kScratchDoubleReg, kScratchDoubleReg, Condition(0), \
        Condition(0), Condition(mode));                                        \
  __ vmx(tempFPReg, i.InputSimd128Register(0), kScratchDoubleReg,              \
         Condition(0), Condition(0), Condition(mode));                         \
  __ vmx(kScratchDoubleReg, i.InputSimd128Register(1), kScratchDoubleReg,      \
2949
         Condition(0), Condition(0), Condition(mode));
2950 2951 2952
    case kS390_I16x8UConvertI32x4: {
      // treat inputs as signed, and saturate to unsigned (negative to 0)
      VECTOR_PACK_UNSIGNED(2)
2953 2954
      __ vpkls(i.OutputSimd128Register(), kScratchDoubleReg, tempFPReg,
               Condition(0), Condition(2));
2955 2956 2957 2958 2959
      break;
    }
    case kS390_I8x16UConvertI16x8: {
      // treat inputs as signed, and saturate to unsigned (negative to 0)
      VECTOR_PACK_UNSIGNED(1)
2960 2961
      __ vpkls(i.OutputSimd128Register(), kScratchDoubleReg, tempFPReg,
               Condition(0), Condition(1));
2962 2963 2964
      break;
    }
#undef VECTOR_PACK_UNSIGNED
2965 2966 2967 2968 2969
#define BINOP_EXTRACT(op, extract_high, extract_low, mode)              \
  Simd128Register src1 = i.InputSimd128Register(0);                     \
  Simd128Register src2 = i.InputSimd128Register(1);                     \
  Simd128Register tempFPReg1 = i.ToSimd128Register(instr->TempAt(0));   \
  Simd128Register tempFPReg2 = i.ToSimd128Register(instr->TempAt(1));   \
2970 2971
  DCHECK_NE(src1, tempFPReg1);                                          \
  DCHECK_NE(src2, tempFPReg1);                                          \
2972 2973 2974 2975 2976 2977 2978 2979 2980 2981 2982 2983
  __ extract_high(kScratchDoubleReg, src1, Condition(0), Condition(0),  \
                  Condition(mode));                                     \
  __ extract_high(tempFPReg1, src2, Condition(0), Condition(0),         \
                  Condition(mode));                                     \
  __ op(kScratchDoubleReg, kScratchDoubleReg, tempFPReg1, Condition(0), \
        Condition(0), Condition(mode + 1));                             \
  __ extract_low(tempFPReg1, src1, Condition(0), Condition(0),          \
                 Condition(mode));                                      \
  __ extract_low(tempFPReg2, src2, Condition(0), Condition(0),          \
                 Condition(mode));                                      \
  __ op(tempFPReg1, tempFPReg1, tempFPReg2, Condition(0), Condition(0), \
        Condition(mode + 1));
2984
    case kS390_I16x8AddSatS: {
2985 2986 2987 2988 2989
      BINOP_EXTRACT(va, vuph, vupl, 1)
      __ vpks(i.OutputSimd128Register(), kScratchDoubleReg, tempFPReg1,
              Condition(0), Condition(2));
      break;
    }
2990
    case kS390_I16x8SubSatS: {
2991 2992 2993 2994 2995
      BINOP_EXTRACT(vs, vuph, vupl, 1)
      __ vpks(i.OutputSimd128Register(), kScratchDoubleReg, tempFPReg1,
              Condition(0), Condition(2));
      break;
    }
2996
    case kS390_I16x8AddSatU: {
2997 2998 2999 3000 3001
      BINOP_EXTRACT(va, vuplh, vupll, 1)
      __ vpkls(i.OutputSimd128Register(), kScratchDoubleReg, tempFPReg1,
               Condition(0), Condition(2));
      break;
    }
3002
    case kS390_I16x8SubSatU: {
3003 3004 3005 3006 3007 3008 3009 3010 3011 3012 3013 3014
      BINOP_EXTRACT(vs, vuplh, vupll, 1)
      // negative to 0
      __ vx(tempFPReg2, tempFPReg2, tempFPReg2, Condition(0), Condition(0),
            Condition(0));
      __ vmx(kScratchDoubleReg, tempFPReg2, kScratchDoubleReg, Condition(0),
             Condition(0), Condition(2));
      __ vmx(tempFPReg1, tempFPReg2, tempFPReg1, Condition(0), Condition(0),
             Condition(2));
      __ vpkls(i.OutputSimd128Register(), kScratchDoubleReg, tempFPReg1,
               Condition(0), Condition(2));
      break;
    }
3015
    case kS390_I8x16AddSatS: {
3016 3017 3018 3019 3020
      BINOP_EXTRACT(va, vuph, vupl, 0)
      __ vpks(i.OutputSimd128Register(), kScratchDoubleReg, tempFPReg1,
              Condition(0), Condition(1));
      break;
    }
3021
    case kS390_I8x16SubSatS: {
3022 3023 3024 3025 3026
      BINOP_EXTRACT(vs, vuph, vupl, 0)
      __ vpks(i.OutputSimd128Register(), kScratchDoubleReg, tempFPReg1,
              Condition(0), Condition(1));
      break;
    }
3027
    case kS390_I8x16AddSatU: {
3028 3029 3030 3031 3032
      BINOP_EXTRACT(va, vuplh, vupll, 0)
      __ vpkls(i.OutputSimd128Register(), kScratchDoubleReg, tempFPReg1,
               Condition(0), Condition(1));
      break;
    }
3033
    case kS390_I8x16SubSatU: {
3034 3035 3036 3037 3038 3039 3040 3041 3042 3043 3044 3045 3046
      BINOP_EXTRACT(vs, vuplh, vupll, 0)
      // negative to 0
      __ vx(tempFPReg2, tempFPReg2, tempFPReg2, Condition(0), Condition(0),
            Condition(0));
      __ vmx(kScratchDoubleReg, tempFPReg2, kScratchDoubleReg, Condition(0),
             Condition(0), Condition(1));
      __ vmx(tempFPReg1, tempFPReg2, tempFPReg1, Condition(0), Condition(0),
             Condition(1));
      __ vpkls(i.OutputSimd128Register(), kScratchDoubleReg, tempFPReg1,
               Condition(0), Condition(1));
      break;
    }
#undef BINOP_EXTRACT
3047
    case kS390_I8x16Shuffle: {
3048 3049 3050
      Simd128Register dst = i.OutputSimd128Register(),
                      src0 = i.InputSimd128Register(0),
                      src1 = i.InputSimd128Register(1);
3051 3052 3053 3054
      uint64_t low = make_uint64(i.InputUint32(3), i.InputUint32(2));
      uint64_t high = make_uint64(i.InputUint32(5), i.InputUint32(4));
      __ mov(r0, Operand(low));
      __ mov(ip, Operand(high));
3055 3056
      __ vlvgp(kScratchDoubleReg, ip, r0);
      __ vperm(dst, src0, src1, kScratchDoubleReg, Condition(0), Condition(0));
3057 3058
      break;
    }
3059
    case kS390_I8x16Swizzle: {
3060 3061 3062
      Simd128Register dst = i.OutputSimd128Register(),
                      src0 = i.InputSimd128Register(0),
                      src1 = i.InputSimd128Register(1);
3063
      Simd128Register tempFPReg1 = i.ToSimd128Register(instr->TempAt(0));
3064
      DCHECK_NE(src0, tempFPReg1);
3065 3066 3067 3068 3069
      // Saturate the indices to 5 bits. Input indices more than 31 should
      // return 0.
      __ vrepi(kScratchDoubleReg, Operand(31), Condition(0));
      __ vmnl(tempFPReg1, src1, kScratchDoubleReg, Condition(0), Condition(0),
              Condition(0));
3070 3071 3072 3073 3074
      //  input needs to be reversed
      __ vlgv(r0, src0, MemOperand(r0, 0), Condition(3));
      __ vlgv(r1, src0, MemOperand(r0, 1), Condition(3));
      __ lrvgr(r0, r0);
      __ lrvgr(r1, r1);
3075 3076 3077 3078 3079 3080
      __ vlvgp(dst, r1, r0);
      // clear scratch
      __ vx(kScratchDoubleReg, kScratchDoubleReg, kScratchDoubleReg,
            Condition(0), Condition(0), Condition(0));
      __ vperm(dst, dst, kScratchDoubleReg, tempFPReg1, Condition(0),
               Condition(0));
3081 3082
      break;
    }
3083
    case kS390_I64x2BitMask: {
3084
      __ mov(kScratchReg, Operand(0x80800040));
3085 3086 3087 3088 3089 3090 3091 3092
      __ iihf(kScratchReg, Operand(0x80808080));  // Zeroing the high bits.
      __ vlvg(kScratchDoubleReg, kScratchReg, MemOperand(r0, 1), Condition(3));
      __ vbperm(kScratchDoubleReg, i.InputSimd128Register(0), kScratchDoubleReg,
                Condition(0), Condition(0), Condition(0));
      __ vlgv(i.OutputRegister(), kScratchDoubleReg, MemOperand(r0, 7),
              Condition(0));
      break;
    }
3093
    case kS390_I32x4BitMask: {
3094
      __ mov(kScratchReg, Operand(0x204060));
3095
      __ iihf(kScratchReg, Operand(0x80808080));  // Zeroing the high bits.
3096 3097 3098 3099 3100 3101 3102 3103
      __ vlvg(kScratchDoubleReg, kScratchReg, MemOperand(r0, 1), Condition(3));
      __ vbperm(kScratchDoubleReg, i.InputSimd128Register(0), kScratchDoubleReg,
                Condition(0), Condition(0), Condition(0));
      __ vlgv(i.OutputRegister(), kScratchDoubleReg, MemOperand(r0, 7),
              Condition(0));
      break;
    }
    case kS390_I16x8BitMask: {
3104
      __ mov(kScratchReg, Operand(0x40506070));
3105
      __ iihf(kScratchReg, Operand(0x102030));
3106 3107 3108 3109 3110 3111 3112 3113
      __ vlvg(kScratchDoubleReg, kScratchReg, MemOperand(r0, 1), Condition(3));
      __ vbperm(kScratchDoubleReg, i.InputSimd128Register(0), kScratchDoubleReg,
                Condition(0), Condition(0), Condition(0));
      __ vlgv(i.OutputRegister(), kScratchDoubleReg, MemOperand(r0, 7),
              Condition(0));
      break;
    }
    case kS390_I8x16BitMask: {
3114
      __ mov(r0, Operand(0x60687078));
3115
      __ iihf(r0, Operand(0x40485058));
3116
      __ mov(ip, Operand(0x20283038));
3117
      __ iihf(ip, Operand(0x81018));
3118 3119 3120 3121 3122 3123 3124
      __ vlvgp(kScratchDoubleReg, ip, r0);
      __ vbperm(kScratchDoubleReg, i.InputSimd128Register(0), kScratchDoubleReg,
                Condition(0), Condition(0), Condition(0));
      __ vlgv(i.OutputRegister(), kScratchDoubleReg, MemOperand(r0, 3),
              Condition(1));
      break;
    }
3125 3126 3127 3128 3129 3130 3131 3132 3133 3134 3135 3136 3137 3138 3139 3140 3141 3142 3143 3144 3145 3146 3147 3148
    case kS390_F32x4Pmin: {
      __ vfmin(i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputSimd128Register(1), Condition(3), Condition(0),
               Condition(2));
      break;
    }
    case kS390_F32x4Pmax: {
      __ vfmax(i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputSimd128Register(1), Condition(3), Condition(0),
               Condition(2));
      break;
    }
    case kS390_F64x2Pmin: {
      __ vfmin(i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputSimd128Register(1), Condition(3), Condition(0),
               Condition(3));
      break;
    }
    case kS390_F64x2Pmax: {
      __ vfmax(i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputSimd128Register(1), Condition(3), Condition(0),
               Condition(3));
      break;
    }
3149 3150 3151 3152 3153 3154 3155 3156 3157 3158 3159 3160 3161 3162 3163 3164 3165 3166 3167 3168 3169 3170 3171 3172 3173 3174 3175 3176 3177 3178 3179 3180 3181 3182 3183 3184 3185 3186 3187 3188
    case kS390_F64x2Ceil: {
      __ vfi(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(6),
             Condition(0), Condition(3));
      break;
    }
    case kS390_F64x2Floor: {
      __ vfi(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(7),
             Condition(0), Condition(3));
      break;
    }
    case kS390_F64x2Trunc: {
      __ vfi(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(5),
             Condition(0), Condition(3));
      break;
    }
    case kS390_F64x2NearestInt: {
      __ vfi(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(4),
             Condition(0), Condition(3));
      break;
    }
    case kS390_F32x4Ceil: {
      __ vfi(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(6),
             Condition(0), Condition(2));
      break;
    }
    case kS390_F32x4Floor: {
      __ vfi(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(7),
             Condition(0), Condition(2));
      break;
    }
    case kS390_F32x4Trunc: {
      __ vfi(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(5),
             Condition(0), Condition(2));
      break;
    }
    case kS390_F32x4NearestInt: {
      __ vfi(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(4),
             Condition(0), Condition(2));
      break;
    }
3189 3190 3191 3192 3193 3194 3195 3196 3197 3198 3199
    case kS390_I32x4DotI16x8S: {
      Simd128Register tempFPReg1 = i.ToSimd128Register(instr->TempAt(0));
      __ vme(kScratchDoubleReg, i.InputSimd128Register(0),
             i.InputSimd128Register(1), Condition(0), Condition(0),
             Condition(1));
      __ vmo(tempFPReg1, i.InputSimd128Register(0), i.InputSimd128Register(1),
             Condition(0), Condition(0), Condition(1));
      __ va(i.OutputSimd128Register(), kScratchDoubleReg, tempFPReg1,
            Condition(0), Condition(0), Condition(2));
      break;
    }
3200 3201 3202 3203 3204 3205 3206 3207
#define EXT_MUL(mul_even, mul_odd, merge, mode)                             \
  Simd128Register dst = i.OutputSimd128Register(),                          \
                  src0 = i.InputSimd128Register(0),                         \
                  src1 = i.InputSimd128Register(1);                         \
  __ mul_even(kScratchDoubleReg, src0, src1, Condition(0), Condition(0),    \
              Condition(mode));                                             \
  __ mul_odd(dst, src0, src1, Condition(0), Condition(0), Condition(mode)); \
  __ merge(dst, kScratchDoubleReg, dst, Condition(0), Condition(0),         \
3208
           Condition(mode + 1));
3209
    case kS390_I64x2ExtMulLowI32x4S: {
3210
      EXT_MUL(vme, vmo, vmrl, 2)
3211 3212 3213
      break;
    }
    case kS390_I64x2ExtMulHighI32x4S: {
3214
      EXT_MUL(vme, vmo, vmrh, 2)
3215 3216 3217
      break;
    }
    case kS390_I64x2ExtMulLowI32x4U: {
3218
      EXT_MUL(vmle, vmlo, vmrl, 2)
3219 3220 3221
      break;
    }
    case kS390_I64x2ExtMulHighI32x4U: {
3222 3223 3224
      EXT_MUL(vmle, vmlo, vmrh, 2)
      break;
    }
3225
    case kS390_I32x4ExtMulLowI16x8S: {
3226
      EXT_MUL(vme, vmo, vmrl, 1)
3227 3228 3229
      break;
    }
    case kS390_I32x4ExtMulHighI16x8S: {
3230
      EXT_MUL(vme, vmo, vmrh, 1)
3231 3232 3233
      break;
    }
    case kS390_I32x4ExtMulLowI16x8U: {
3234
      EXT_MUL(vmle, vmlo, vmrl, 1)
3235 3236 3237
      break;
    }
    case kS390_I32x4ExtMulHighI16x8U: {
3238
      EXT_MUL(vmle, vmlo, vmrh, 1)
3239 3240
      break;
    }
3241

3242
    case kS390_I16x8ExtMulLowI8x16S: {
3243
      EXT_MUL(vme, vmo, vmrl, 0)
3244 3245 3246
      break;
    }
    case kS390_I16x8ExtMulHighI8x16S: {
3247
      EXT_MUL(vme, vmo, vmrh, 0)
3248 3249 3250
      break;
    }
    case kS390_I16x8ExtMulLowI8x16U: {
3251
      EXT_MUL(vmle, vmlo, vmrl, 0)
3252 3253 3254
      break;
    }
    case kS390_I16x8ExtMulHighI8x16U: {
3255
      EXT_MUL(vmle, vmlo, vmrh, 0)
3256 3257
      break;
    }
3258
#undef EXT_MUL
3259 3260 3261 3262
#define EXT_ADD_PAIRWISE(lane_size, mul_even, mul_odd)                        \
  Simd128Register src = i.InputSimd128Register(0);                            \
  Simd128Register dst = i.OutputSimd128Register();                            \
  Simd128Register tempFPReg1 = i.ToSimd128Register(instr->TempAt(0));         \
3263
  DCHECK_NE(src, tempFPReg1);                                                 \
3264 3265
  __ vrepi(tempFPReg1, Operand(1), Condition(lane_size));                     \
  __ mul_even(kScratchDoubleReg, src, tempFPReg1, Condition(0), Condition(0), \
3266
              Condition(lane_size));                                          \
3267 3268 3269
  __ mul_odd(tempFPReg1, src, tempFPReg1, Condition(0), Condition(0),         \
             Condition(lane_size));                                           \
  __ va(dst, kScratchDoubleReg, tempFPReg1, Condition(0), Condition(0),       \
3270 3271 3272 3273 3274 3275 3276 3277 3278 3279 3280 3281 3282 3283 3284 3285 3286 3287 3288 3289 3290 3291 3292
        Condition(lane_size + 1));
    case kS390_I32x4ExtAddPairwiseI16x8S: {
      EXT_ADD_PAIRWISE(1, vme, vmo)
      break;
    }
    case kS390_I32x4ExtAddPairwiseI16x8U: {
      Simd128Register src0 = i.InputSimd128Register(0);
      Simd128Register dst = i.OutputSimd128Register();
      __ vx(kScratchDoubleReg, kScratchDoubleReg, kScratchDoubleReg,
            Condition(0), Condition(0), Condition(3));
      __ vsum(dst, src0, kScratchDoubleReg, Condition(0), Condition(0),
              Condition(1));
      break;
    }
    case kS390_I16x8ExtAddPairwiseI8x16S: {
      EXT_ADD_PAIRWISE(0, vme, vmo)
      break;
    }
    case kS390_I16x8ExtAddPairwiseI8x16U: {
      EXT_ADD_PAIRWISE(0, vmle, vmlo)
      break;
    }
#undef EXT_ADD_PAIRWISE
3293 3294 3295 3296 3297 3298 3299 3300 3301
#define Q15_MUL_ROAUND(accumulator, unpack)                                   \
  __ unpack(tempFPReg1, src0, Condition(0), Condition(0), Condition(1));      \
  __ unpack(accumulator, src1, Condition(0), Condition(0), Condition(1));     \
  __ vml(accumulator, tempFPReg1, accumulator, Condition(0), Condition(0),    \
         Condition(2));                                                       \
  __ va(accumulator, accumulator, tempFPReg2, Condition(0), Condition(0),     \
        Condition(2));                                                        \
  __ vrepi(tempFPReg1, Operand(15), Condition(2));                            \
  __ vesrav(accumulator, accumulator, tempFPReg1, Condition(0), Condition(0), \
3302 3303 3304
            Condition(2));
    case kS390_I16x8Q15MulRSatS: {
      Simd128Register dst = i.OutputSimd128Register();
3305 3306
      Simd128Register src0 = i.InputSimd128Register(0);
      Simd128Register src1 = i.InputSimd128Register(1);
3307 3308
      Simd128Register tempFPReg1 = i.ToSimd128Register(instr->TempAt(0));
      Simd128Register tempFPReg2 = i.ToSimd128Register(instr->TempAt(1));
3309 3310 3311
      DCHECK_NE(src1, tempFPReg1);
      DCHECK_NE(src0, tempFPReg2);
      DCHECK_NE(src1, tempFPReg2);
3312 3313 3314 3315 3316 3317 3318
      __ vrepi(tempFPReg2, Operand(0x4000), Condition(2));
      Q15_MUL_ROAUND(kScratchDoubleReg, vupl)
      Q15_MUL_ROAUND(dst, vuph)
      __ vpks(dst, dst, kScratchDoubleReg, Condition(0), Condition(2));
      break;
    }
#undef Q15_MUL_ROAUND
3319 3320 3321 3322 3323
    case kS390_I8x16Popcnt: {
      __ vpopct(i.OutputSimd128Register(), i.InputSimd128Register(0),
                Condition(0), Condition(0), Condition(0));
      break;
    }
3324 3325 3326
    case kS390_F64x2ConvertLowI32x4S: {
      __ vupl(kScratchDoubleReg, i.InputSimd128Register(0), Condition(0),
              Condition(0), Condition(2));
3327
      __ vcdg(i.OutputSimd128Register(), kScratchDoubleReg, Condition(4),
3328 3329 3330 3331 3332 3333
              Condition(0), Condition(3));
      break;
    }
    case kS390_F64x2ConvertLowI32x4U: {
      __ vupll(kScratchDoubleReg, i.InputSimd128Register(0), Condition(0),
               Condition(0), Condition(2));
3334
      __ vcdlg(i.OutputSimd128Register(), kScratchDoubleReg, Condition(4),
3335 3336 3337 3338 3339 3340 3341 3342 3343 3344 3345 3346 3347 3348 3349 3350 3351 3352 3353 3354 3355 3356 3357 3358 3359 3360 3361 3362 3363 3364 3365 3366 3367 3368 3369 3370 3371 3372 3373 3374 3375 3376 3377 3378 3379 3380 3381 3382 3383 3384 3385 3386 3387 3388 3389
               Condition(0), Condition(3));
      break;
    }
    case kS390_F64x2PromoteLowF32x4: {
      Register holder = r1;
      for (int index = 0; index < 2; ++index) {
        __ vlgv(r0, i.InputSimd128Register(0), MemOperand(r0, index + 2),
                Condition(2));
        __ MovIntToFloat(kScratchDoubleReg, r0);
        __ ldebr(kScratchDoubleReg, kScratchDoubleReg);
        __ MovDoubleToInt64(holder, kScratchDoubleReg);
        holder = ip;
      }
      __ vlvgp(i.OutputSimd128Register(), r1, ip);
      break;
    }
    case kS390_F32x4DemoteF64x2Zero: {
      Simd128Register dst = i.OutputSimd128Register();
      Register holder = r1;
      for (int index = 0; index < 2; ++index) {
        __ vlgv(r0, i.InputSimd128Register(0), MemOperand(r0, index),
                Condition(3));
        __ MovInt64ToDouble(kScratchDoubleReg, r0);
        __ ledbr(kScratchDoubleReg, kScratchDoubleReg);
        __ MovFloatToInt(holder, kScratchDoubleReg);
        holder = ip;
      }
      __ vx(dst, dst, dst, Condition(0), Condition(0), Condition(2));
      __ vlvg(dst, r1, MemOperand(r0, 2), Condition(2));
      __ vlvg(dst, ip, MemOperand(r0, 3), Condition(2));
      break;
    }
    case kS390_I32x4TruncSatF64x2SZero: {
      Simd128Register src = i.InputSimd128Register(0);
      Simd128Register dst = i.OutputSimd128Register();
      // NaN to 0
      __ vlr(kScratchDoubleReg, src, Condition(0), Condition(0), Condition(0));
      __ vfce(kScratchDoubleReg, kScratchDoubleReg, kScratchDoubleReg,
              Condition(0), Condition(0), Condition(3));
      __ vn(kScratchDoubleReg, src, kScratchDoubleReg, Condition(0),
            Condition(0), Condition(0));
      __ vcgd(kScratchDoubleReg, kScratchDoubleReg, Condition(5), Condition(0),
              Condition(3));
      __ vx(dst, dst, dst, Condition(0), Condition(0), Condition(2));
      __ vpks(dst, dst, kScratchDoubleReg, Condition(0), Condition(3));
      break;
    }
    case kS390_I32x4TruncSatF64x2UZero: {
      Simd128Register dst = i.OutputSimd128Register();
      __ vclgd(kScratchDoubleReg, i.InputSimd128Register(0), Condition(5),
               Condition(0), Condition(3));
      __ vx(dst, dst, dst, Condition(0), Condition(0), Condition(2));
      __ vpkls(dst, dst, kScratchDoubleReg, Condition(0), Condition(3));
      break;
    }
3390 3391 3392 3393 3394 3395 3396 3397 3398 3399 3400 3401 3402 3403 3404 3405 3406 3407 3408 3409 3410 3411 3412 3413 3414 3415 3416 3417 3418 3419 3420 3421 3422 3423 3424 3425 3426 3427 3428 3429 3430 3431 3432 3433 3434 3435 3436 3437 3438 3439 3440 3441
#define LOAD_SPLAT(type)                           \
  AddressingMode mode = kMode_None;                \
  MemOperand operand = i.MemoryOperand(&mode);     \
  Simd128Register dst = i.OutputSimd128Register(); \
  __ LoadAndSplat##type##LE(dst, operand);
    case kS390_S128Load64Splat: {
      LOAD_SPLAT(64x2);
      break;
    }
    case kS390_S128Load32Splat: {
      LOAD_SPLAT(32x4);
      break;
    }
    case kS390_S128Load16Splat: {
      LOAD_SPLAT(16x8);
      break;
    }
    case kS390_S128Load8Splat: {
      LOAD_SPLAT(8x16);
      break;
    }
#undef LOAD_SPLAT
#define LOAD_EXTEND(type)                          \
  AddressingMode mode = kMode_None;                \
  MemOperand operand = i.MemoryOperand(&mode);     \
  Simd128Register dst = i.OutputSimd128Register(); \
  __ LoadAndExtend##type##LE(dst, operand);
    case kS390_S128Load32x2U: {
      LOAD_EXTEND(32x2U);
      break;
    }
    case kS390_S128Load32x2S: {
      LOAD_EXTEND(32x2S);
      break;
    }
    case kS390_S128Load16x4U: {
      LOAD_EXTEND(16x4U);
      break;
    }
    case kS390_S128Load16x4S: {
      LOAD_EXTEND(16x4S);
      break;
    }
    case kS390_S128Load8x8U: {
      LOAD_EXTEND(8x8U);
      break;
    }
    case kS390_S128Load8x8S: {
      LOAD_EXTEND(8x8S);
      break;
    }
#undef LOAD_EXTEND
3442 3443 3444 3445 3446 3447 3448 3449 3450 3451 3452 3453 3454 3455
#define LOAD_AND_ZERO(type)                        \
  AddressingMode mode = kMode_None;                \
  MemOperand operand = i.MemoryOperand(&mode);     \
  Simd128Register dst = i.OutputSimd128Register(); \
  __ LoadV##type##ZeroLE(dst, operand);
    case kS390_S128Load32Zero: {
      LOAD_AND_ZERO(32);
      break;
    }
    case kS390_S128Load64Zero: {
      LOAD_AND_ZERO(64);
      break;
    }
#undef LOAD_AND_ZERO
3456 3457 3458 3459 3460 3461 3462 3463 3464 3465 3466 3467 3468 3469 3470 3471 3472 3473 3474 3475 3476 3477 3478 3479 3480
#undef LOAD_EXTEND
#define LOAD_LANE(type, lane)                          \
  AddressingMode mode = kMode_None;                    \
  size_t index = 2;                                    \
  MemOperand operand = i.MemoryOperand(&mode, &index); \
  Simd128Register dst = i.OutputSimd128Register();     \
  DCHECK_EQ(dst, i.InputSimd128Register(0));           \
  __ LoadLane##type##LE(dst, operand, lane);
    case kS390_S128Load8Lane: {
      LOAD_LANE(8, 15 - i.InputUint8(1));
      break;
    }
    case kS390_S128Load16Lane: {
      LOAD_LANE(16, 7 - i.InputUint8(1));
      break;
    }
    case kS390_S128Load32Lane: {
      LOAD_LANE(32, 3 - i.InputUint8(1));
      break;
    }
    case kS390_S128Load64Lane: {
      LOAD_LANE(64, 1 - i.InputUint8(1));
      break;
    }
#undef LOAD_LANE
3481 3482 3483 3484 3485 3486 3487 3488 3489 3490 3491 3492 3493 3494 3495 3496 3497 3498 3499 3500 3501 3502 3503 3504
    case kS390_StoreCompressTagged: {
      CHECK(!instr->HasOutput());
      size_t index = 0;
      AddressingMode mode = kMode_None;
      MemOperand operand = i.MemoryOperand(&mode, &index);
      Register value = i.InputRegister(index);
      __ StoreTaggedField(value, operand, r1);
      break;
    }
    case kS390_LoadDecompressTaggedSigned: {
      CHECK(instr->HasOutput());
      __ DecompressTaggedSigned(i.OutputRegister(), i.MemoryOperand());
      break;
    }
    case kS390_LoadDecompressTaggedPointer: {
      CHECK(instr->HasOutput());
      __ DecompressTaggedPointer(i.OutputRegister(), i.MemoryOperand());
      break;
    }
    case kS390_LoadDecompressAnyTagged: {
      CHECK(instr->HasOutput());
      __ DecompressAnyTagged(i.OutputRegister(), i.MemoryOperand());
      break;
    }
3505 3506 3507
    default:
      UNREACHABLE();
  }
3508
  return kSuccess;
3509
}
3510 3511 3512 3513 3514 3515 3516 3517 3518 3519

// Assembles branches after an instruction.
void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
  S390OperandConverter i(this, instr);
  Label* tlabel = branch->true_label;
  Label* flabel = branch->false_label;
  ArchOpcode op = instr->arch_opcode();
  FlagsCondition condition = branch->condition;

  Condition cond = FlagsConditionToCondition(condition, op);
3520
  if (op == kS390_CmpFloat || op == kS390_CmpDouble) {
3521 3522 3523 3524 3525 3526 3527 3528 3529 3530 3531 3532
    // check for unordered if necessary
    // Branching to flabel/tlabel according to what's expected by tests
    if (cond == le || cond == eq || cond == lt) {
      __ bunordered(flabel);
    } else if (cond == gt || cond == ne || cond == ge) {
      __ bunordered(tlabel);
    }
  }
  __ b(cond, tlabel);
  if (!branch->fallthru) __ b(flabel);  // no fallthru to flabel.
}

3533 3534 3535 3536 3537
void CodeGenerator::AssembleArchDeoptBranch(Instruction* instr,
                                            BranchInfo* branch) {
  AssembleArchBranch(instr, branch);
}

3538 3539 3540 3541
void CodeGenerator::AssembleArchJump(RpoNumber target) {
  if (!IsNextInAssemblyOrder(target)) __ b(GetLabel(target));
}

3542
#if V8_ENABLE_WEBASSEMBLY
3543 3544
void CodeGenerator::AssembleArchTrap(Instruction* instr,
                                     FlagsCondition condition) {
3545 3546
  class OutOfLineTrap final : public OutOfLineCode {
   public:
3547 3548
    OutOfLineTrap(CodeGenerator* gen, Instruction* instr)
        : OutOfLineCode(gen), instr_(instr), gen_(gen) {}
3549 3550 3551

    void Generate() final {
      S390OperandConverter i(gen_, instr_);
3552 3553
      TrapId trap_id =
          static_cast<TrapId>(i.InputInt32(instr_->InputCount() - 1));
3554 3555 3556 3557
      GenerateCallToTrap(trap_id);
    }

   private:
3558 3559
    void GenerateCallToTrap(TrapId trap_id) {
      if (trap_id == TrapId::kInvalid) {
3560 3561 3562 3563 3564
        // We cannot test calls to the runtime in cctest/test-run-wasm.
        // Therefore we emit a call to C here instead of a call to the runtime.
        // We use the context register as the scratch register, because we do
        // not have a context here.
        __ PrepareCallCFunction(0, 0, cp);
3565 3566
        __ CallCFunction(
            ExternalReference::wasm_call_trap_callback_for_testing(), 0);
3567
        __ LeaveFrame(StackFrame::WASM);
3568
        auto call_descriptor = gen_->linkage()->GetIncomingDescriptor();
3569
        int pop_count = static_cast<int>(call_descriptor->ParameterSlotCount());
3570
        __ Drop(pop_count);
3571
        __ Ret();
3572 3573
      } else {
        gen_->AssembleSourcePosition(instr_);
3574
        // A direct call to a wasm runtime stub defined in this module.
3575 3576
        // Just encode the stub index. This will be patched when the code
        // is added to the native module and copied into wasm code space.
3577
        __ Call(static_cast<Address>(trap_id), RelocInfo::WASM_STUB_CALL);
3578
        ReferenceMap* reference_map =
3579
            gen_->zone()->New<ReferenceMap>(gen_->zone());
3580
        gen_->RecordSafepoint(reference_map);
3581
        if (FLAG_debug_code) {
3582
          __ stop();
3583
        }
3584 3585 3586 3587 3588 3589
      }
    }

    Instruction* instr_;
    CodeGenerator* gen_;
  };
3590
  auto ool = zone()->New<OutOfLineTrap>(this, instr);
3591 3592 3593 3594 3595
  Label* tlabel = ool->entry();
  Label end;

  ArchOpcode op = instr->arch_opcode();
  Condition cond = FlagsConditionToCondition(condition, op);
3596
  if (op == kS390_CmpFloat || op == kS390_CmpDouble) {
3597
    // check for unordered if necessary
3598
    if (cond == le || cond == eq || cond == lt) {
3599
      __ bunordered(&end);
3600
    } else if (cond == gt || cond == ne || cond == ge) {
3601 3602 3603 3604 3605
      __ bunordered(tlabel);
    }
  }
  __ b(cond, tlabel);
  __ bind(&end);
3606
}
3607
#endif  // V8_ENABLE_WEBASSEMBLY
3608

3609 3610 3611 3612 3613
// Assembles boolean materializations after an instruction.
void CodeGenerator::AssembleArchBoolean(Instruction* instr,
                                        FlagsCondition condition) {
  S390OperandConverter i(this, instr);
  ArchOpcode op = instr->arch_opcode();
3614
  bool check_unordered = (op == kS390_CmpDouble || op == kS390_CmpFloat);
3615 3616 3617

  // Overflow checked for add/sub only.
  DCHECK((condition != kOverflow && condition != kNotOverflow) ||
jyan's avatar
jyan committed
3618 3619
         (op == kS390_Add32 || op == kS390_Add64 || op == kS390_Sub32 ||
          op == kS390_Sub64 || op == kS390_Mul32));
3620 3621 3622 3623 3624 3625

  // Materialize a full 32-bit 1 or 0 value. The result register is always the
  // last output of the instruction.
  DCHECK_NE(0u, instr->OutputCount());
  Register reg = i.OutputRegister(instr->OutputCount() - 1);
  Condition cond = FlagsConditionToCondition(condition, op);
3626 3627
  Label done;
  if (check_unordered) {
3628 3629
    __ mov(reg, (cond == eq || cond == le || cond == lt) ? Operand::Zero()
                                                         : Operand(1));
3630
    __ bunordered(&done);
3631
  }
3632 3633

  // TODO(john.yan): use load imm high on condition here
3634 3635
  __ mov(reg, Operand::Zero());
  __ mov(kScratchReg, Operand(1));
3636 3637
  // locr is sufficient since reg's upper 32 is guarrantee to be 0
  __ locr(cond, reg, kScratchReg);
3638 3639 3640
  __ bind(&done);
}

3641 3642 3643 3644 3645 3646 3647 3648 3649 3650 3651
void CodeGenerator::AssembleArchBinarySearchSwitch(Instruction* instr) {
  S390OperandConverter i(this, instr);
  Register input = i.InputRegister(0);
  std::vector<std::pair<int32_t, Label*>> cases;
  for (size_t index = 2; index < instr->InputCount(); index += 2) {
    cases.push_back({i.InputInt32(index + 0), GetLabel(i.InputRpo(index + 1))});
  }
  AssembleArchBinarySearchSwitchRange(input, i.InputRpo(1), cases.data(),
                                      cases.data() + cases.size());
}

3652 3653 3654 3655 3656 3657 3658 3659 3660
void CodeGenerator::AssembleArchTableSwitch(Instruction* instr) {
  S390OperandConverter i(this, instr);
  Register input = i.InputRegister(0);
  int32_t const case_count = static_cast<int32_t>(instr->InputCount() - 2);
  Label** cases = zone()->NewArray<Label*>(case_count);
  for (int32_t index = 0; index < case_count; ++index) {
    cases[index] = GetLabel(i.InputRpo(index + 2));
  }
  Label* const table = AddJumpTable(cases, case_count);
3661
  __ CmpU64(input, Operand(case_count));
3662 3663
  __ bge(GetLabel(i.InputRpo(1)));
  __ larl(kScratchReg, table);
3664
  __ ShiftLeftU64(r1, input, Operand(kSystemPointerSizeLog2));
3665
  __ LoadU64(kScratchReg, MemOperand(kScratchReg, r1));
3666 3667 3668
  __ Jump(kScratchReg);
}

3669 3670 3671 3672 3673
void CodeGenerator::AssembleArchSelect(Instruction* instr,
                                       FlagsCondition condition) {
  UNIMPLEMENTED();
}

3674
void CodeGenerator::FinishFrame(Frame* frame) {
3675 3676
  auto call_descriptor = linkage()->GetIncomingDescriptor();
  const RegList double_saves = call_descriptor->CalleeSavedFPRegisters();
3677 3678 3679

  // Save callee-saved Double registers.
  if (double_saves != 0) {
3680
    frame->AlignSavedCalleeRegisterSlots();
3681
    DCHECK_EQ(kNumCalleeSavedDoubles,
3682
              base::bits::CountPopulation(double_saves));
3683
    frame->AllocateSavedCalleeRegisterSlots(kNumCalleeSavedDoubles *
3684
                                            (kDoubleSize / kSystemPointerSize));
3685 3686
  }
  // Save callee-saved registers.
3687
  const RegList saves = call_descriptor->CalleeSavedRegisters();
3688 3689 3690 3691 3692 3693 3694 3695
  if (saves != 0) {
    // register save area does not include the fp or constant pool pointer.
    const int num_saves = kNumCalleeSaved - 1;
    frame->AllocateSavedCalleeRegisterSlots(num_saves);
  }
}

void CodeGenerator::AssembleConstructFrame() {
3696
  auto call_descriptor = linkage()->GetIncomingDescriptor();
3697

3698
  if (frame_access_state()->has_frame()) {
3699
    if (call_descriptor->IsCFunctionCall()) {
3700
#if V8_ENABLE_WEBASSEMBLY
3701
      if (info()->GetOutputStackFrameType() == StackFrame::C_WASM_ENTRY) {
3702 3703 3704
        __ StubPrologue(StackFrame::C_WASM_ENTRY);
        // Reserve stack space for saving the c_entry_fp later.
        __ lay(sp, MemOperand(sp, -kSystemPointerSize));
3705
#else
3706 3707
      // For balance.
      if (false) {
3708
#endif  // V8_ENABLE_WEBASSEMBLY
3709 3710
      } else {
        __ Push(r14, fp);
3711
        __ mov(fp, sp);
3712
      }
3713
    } else if (call_descriptor->IsJSFunctionCall()) {
3714
      __ Prologue(ip);
3715
    } else {
3716
      StackFrame::Type type = info()->GetOutputStackFrameType();
3717 3718 3719
      // TODO(mbrandy): Detect cases where ip is the entrypoint (for
      // efficient intialization of the constant pool pointer register).
      __ StubPrologue(type);
3720
#if V8_ENABLE_WEBASSEMBLY
3721 3722
      if (call_descriptor->IsWasmFunctionCall()) {
        __ Push(kWasmInstanceRegister);
3723 3724
      } else if (call_descriptor->IsWasmImportWrapper() ||
                 call_descriptor->IsWasmCapiFunction()) {
3725
        // Wasm import wrappers are passed a tuple in the place of the instance.
3726 3727 3728
        // Unpack the tuple into the instance and the target callable.
        // This must be done here in the codegen because it cannot be expressed
        // properly in the graph.
3729 3730 3731 3732 3733 3734
        __ LoadTaggedPointerField(
            kJSFunctionRegister,
            FieldMemOperand(kWasmInstanceRegister, Tuple2::kValue2Offset), r0);
        __ LoadTaggedPointerField(
            kWasmInstanceRegister,
            FieldMemOperand(kWasmInstanceRegister, Tuple2::kValue1Offset), r0);
3735
        __ Push(kWasmInstanceRegister);
3736 3737 3738 3739
        if (call_descriptor->IsWasmCapiFunction()) {
          // Reserve space for saving the PC later.
          __ lay(sp, MemOperand(sp, -kSystemPointerSize));
        }
3740
      }
3741
#endif  // V8_ENABLE_WEBASSEMBLY
3742
    }
3743
    unwinding_info_writer_.MarkFrameConstructed(__ pc_offset());
3744 3745
  }

3746 3747
  int required_slots =
      frame()->GetTotalFrameSlotCount() - frame()->GetFixedSlotCount();
3748 3749
  if (info()->is_osr()) {
    // TurboFan OSR-compiled functions cannot be entered directly.
3750
    __ Abort(AbortReason::kShouldNotDirectlyEnterOsrFunction);
3751 3752 3753 3754 3755

    // Unoptimized code jumps directly to this entrypoint while the unoptimized
    // frame is still on the stack. Optimized code uses OSR values directly from
    // the unoptimized frame. Thus, all that needs to be done is to allocate the
    // remaining stack slots.
3756
    __ RecordComment("-- OSR entrypoint --");
3757
    osr_pc_offset_ = __ pc_offset();
3758
    required_slots -= osr_helper()->UnoptimizedFrameSlots();
3759 3760
  }

3761 3762 3763
  const RegList saves_fp = call_descriptor->CalleeSavedFPRegisters();
  const RegList saves = call_descriptor->CalleeSavedRegisters();

3764
  if (required_slots > 0) {
3765
#if V8_ENABLE_WEBASSEMBLY
3766
    if (info()->IsWasm() && required_slots * kSystemPointerSize > 4 * KB) {
3767 3768 3769 3770 3771 3772 3773 3774 3775
      // For WebAssembly functions with big frames we have to do the stack
      // overflow check before we construct the frame. Otherwise we may not
      // have enough space on the stack to call the runtime for the stack
      // overflow.
      Label done;

      // If the frame is bigger than the stack, we throw the stack overflow
      // exception unconditionally. Thereby we can avoid the integer overflow
      // check in the condition code.
3776
      if (required_slots * kSystemPointerSize < FLAG_stack_size * KB) {
3777
        Register scratch = r1;
3778
        __ LoadU64(
3779 3780
            scratch,
            FieldMemOperand(kWasmInstanceRegister,
3781
                            WasmInstanceObject::kRealStackLimitAddressOffset));
3782
        __ LoadU64(scratch, MemOperand(scratch));
3783 3784
        __ AddS64(scratch, scratch,
                  Operand(required_slots * kSystemPointerSize));
3785
        __ CmpU64(sp, scratch);
3786 3787 3788
        __ bge(&done);
      }

3789
      __ Call(wasm::WasmCode::kWasmStackOverflow, RelocInfo::WASM_STUB_CALL);
3790 3791
      // The call does not return, hence we can ignore any references and just
      // define an empty safepoint.
3792
      ReferenceMap* reference_map = zone()->New<ReferenceMap>(zone());
3793
      RecordSafepoint(reference_map);
3794
      if (FLAG_debug_code) __ stop();
3795 3796 3797

      __ bind(&done);
    }
3798
#endif  // V8_ENABLE_WEBASSEMBLY
3799 3800

    // Skip callee-saved and return slots, which are pushed below.
3801 3802 3803 3804 3805
    required_slots -= base::bits::CountPopulation(saves);
    required_slots -= frame()->GetReturnSlotCount();
    required_slots -= (kDoubleSize / kSystemPointerSize) *
                      base::bits::CountPopulation(saves_fp);
    __ lay(sp, MemOperand(sp, -required_slots * kSystemPointerSize));
3806 3807 3808
  }

  // Save callee-saved Double registers.
3809 3810 3811
  if (saves_fp != 0) {
    __ MultiPushDoubles(saves_fp);
    DCHECK_EQ(kNumCalleeSavedDoubles, base::bits::CountPopulation(saves_fp));
3812 3813 3814 3815 3816 3817 3818
  }

  // Save callee-saved registers.
  if (saves != 0) {
    __ MultiPush(saves);
    // register save area does not include the fp or constant pool pointer.
  }
3819 3820

  const int returns = frame()->GetReturnSlotCount();
3821 3822
  // Create space for returns.
  __ AllocateStackSpace(returns * kSystemPointerSize);
3823 3824
}

3825
void CodeGenerator::AssembleReturn(InstructionOperand* additional_pop_count) {
3826
  auto call_descriptor = linkage()->GetIncomingDescriptor();
3827

3828 3829 3830
  const int returns = frame()->GetReturnSlotCount();
  if (returns != 0) {
    // Create space for returns.
3831
    __ lay(sp, MemOperand(sp, returns * kSystemPointerSize));
3832 3833
  }

3834
  // Restore registers.
3835
  const RegList saves = call_descriptor->CalleeSavedRegisters();
3836 3837 3838 3839 3840
  if (saves != 0) {
    __ MultiPop(saves);
  }

  // Restore double registers.
3841
  const RegList double_saves = call_descriptor->CalleeSavedFPRegisters();
3842 3843 3844 3845
  if (double_saves != 0) {
    __ MultiPopDoubles(double_saves);
  }

3846 3847
  unwinding_info_writer_.MarkBlockWillExit();

3848 3849
  // We might need r3 for scratch.
  DCHECK_EQ(0u, call_descriptor->CalleeSavedRegisters() & r5.bit());
3850
  S390OperandConverter g(this, nullptr);
3851 3852
  const int parameter_slots =
      static_cast<int>(call_descriptor->ParameterSlotCount());
3853

3854
  // {aditional_pop_count} is only greater than zero if {parameter_slots = 0}.
3855
  // Check RawMachineAssembler::PopAndReturn.
3856
  if (parameter_slots != 0) {
3857 3858
    if (additional_pop_count->IsImmediate()) {
      DCHECK_EQ(g.ToConstant(additional_pop_count).ToInt32(), 0);
3859
    } else if (FLAG_debug_code) {
3860
      __ CmpS64(g.ToRegister(additional_pop_count), Operand(0));
3861 3862 3863 3864 3865 3866
      __ Assert(eq, AbortReason::kUnexpectedAdditionalPopValue);
    }
  }

  Register argc_reg = r5;
  // Functions with JS linkage have at least one parameter (the receiver).
3867
  // If {parameter_slots} == 0, it means it is a builtin with
3868 3869
  // kDontAdaptArgumentsSentinel, which takes care of JS arguments popping
  // itself.
3870 3871 3872
  const bool drop_jsargs = parameter_slots != 0 &&
                           frame_access_state()->has_frame() &&
                           call_descriptor->IsJSFunctionCall();
3873

3874
  if (call_descriptor->IsCFunctionCall()) {
3875 3876
    AssembleDeconstructFrame();
  } else if (frame_access_state()->has_frame()) {
3877 3878
    // Canonicalize JSFunction return sites for now unless they have an variable
    // number of stack slot pops
3879 3880
    if (additional_pop_count->IsImmediate() &&
        g.ToConstant(additional_pop_count).ToInt32() == 0) {
3881 3882 3883 3884 3885 3886
      if (return_label_.is_bound()) {
        __ b(&return_label_);
        return;
      } else {
        __ bind(&return_label_);
      }
3887
    }
3888 3889
    if (drop_jsargs) {
      // Get the actual argument count.
3890
      DCHECK_EQ(0u, call_descriptor->CalleeSavedRegisters() & argc_reg.bit());
3891
      __ LoadU64(argc_reg, MemOperand(fp, StandardFrameConstants::kArgCOffset));
3892 3893
    }
    AssembleDeconstructFrame();
3894
  }
3895 3896

  if (drop_jsargs) {
3897 3898 3899 3900
    // We must pop all arguments from the stack (including the receiver).
    // The number of arguments without the receiver is
    // max(argc_reg, parameter_slots-1), and the receiver is added in
    // DropArguments().
3901
    if (parameter_slots > 1) {
3902
      const int parameter_slots_without_receiver = parameter_slots - 1;
3903
      Label skip;
3904
      __ CmpS64(argc_reg, Operand(parameter_slots_without_receiver));
3905
      __ bgt(&skip);
3906
      __ mov(argc_reg, Operand(parameter_slots_without_receiver));
3907 3908
      __ bind(&skip);
    }
3909 3910
    __ DropArguments(argc_reg, TurboAssembler::kCountIsInteger,
                     TurboAssembler::kCountExcludesReceiver);
3911 3912
  } else if (additional_pop_count->IsImmediate()) {
    int additional_count = g.ToConstant(additional_pop_count).ToInt32();
3913 3914
    __ Drop(parameter_slots + additional_count);
  } else if (parameter_slots == 0) {
3915
    __ Drop(g.ToRegister(additional_pop_count));
3916
  } else {
3917
    // {additional_pop_count} is guaranteed to be zero if {parameter_slots !=
3918
    // 0}. Check RawMachineAssembler::PopAndReturn.
3919
    __ Drop(parameter_slots);
3920 3921
  }
  __ Ret();
3922 3923
}

3924 3925
void CodeGenerator::FinishCode() {}

3926 3927
void CodeGenerator::PrepareForDeoptimizationExits(
    ZoneDeque<DeoptimizationExit*>* exits) {}
3928

3929 3930 3931 3932 3933 3934 3935 3936 3937 3938 3939
void CodeGenerator::AssembleMove(InstructionOperand* source,
                                 InstructionOperand* destination) {
  S390OperandConverter g(this, nullptr);
  // Dispatch on the source and destination operand kinds.  Not all
  // combinations are possible.
  if (source->IsRegister()) {
    DCHECK(destination->IsRegister() || destination->IsStackSlot());
    Register src = g.ToRegister(source);
    if (destination->IsRegister()) {
      __ Move(g.ToRegister(destination), src);
    } else {
3940
      __ StoreU64(src, g.ToMemOperand(destination));
3941 3942 3943 3944 3945
    }
  } else if (source->IsStackSlot()) {
    DCHECK(destination->IsRegister() || destination->IsStackSlot());
    MemOperand src = g.ToMemOperand(source);
    if (destination->IsRegister()) {
3946
      __ LoadU64(g.ToRegister(destination), src);
3947 3948
    } else {
      Register temp = kScratchReg;
3949
      __ LoadU64(temp, src, r0);
3950
      __ StoreU64(temp, g.ToMemOperand(destination));
3951 3952 3953 3954 3955 3956 3957 3958
    }
  } else if (source->IsConstant()) {
    Constant src = g.ToConstant(source);
    if (destination->IsRegister() || destination->IsStackSlot()) {
      Register dst =
          destination->IsRegister() ? g.ToRegister(destination) : kScratchReg;
      switch (src.type()) {
        case Constant::kInt32:
3959
            __ mov(dst, Operand(src.ToInt32()));
3960 3961
          break;
        case Constant::kInt64:
3962
#if V8_ENABLE_WEBASSEMBLY
3963
          if (RelocInfo::IsWasmReference(src.rmode())) {
3964
            __ mov(dst, Operand(src.ToInt64(), src.rmode()));
3965
            break;
3966
          }
3967
#endif  // V8_ENABLE_WEBASSEMBLY
3968 3969 3970
          __ mov(dst, Operand(src.ToInt64()));
          break;
        case Constant::kFloat32:
3971
          __ mov(dst, Operand::EmbeddedNumber(src.ToFloat32()));
3972 3973
          break;
        case Constant::kFloat64:
3974
          __ mov(dst, Operand::EmbeddedNumber(src.ToFloat64().value()));
3975 3976
          break;
        case Constant::kExternalReference:
3977
          __ Move(dst, src.ToExternalReference());
3978
          break;
3979 3980 3981 3982
        case Constant::kDelayedStringConstant:
          __ mov(dst, Operand::EmbeddedStringConstant(
                          src.ToDelayedStringConstant()));
          break;
3983 3984
        case Constant::kHeapObject: {
          Handle<HeapObject> src_object = src.ToHeapObject();
3985
          RootIndex index;
3986
          if (IsMaterializableFromRoot(src_object, &index)) {
3987 3988 3989 3990 3991 3992
            __ LoadRoot(dst, index);
          } else {
            __ Move(dst, src_object);
          }
          break;
        }
3993 3994 3995 3996 3997 3998 3999 4000
        case Constant::kCompressedHeapObject: {
          Handle<HeapObject> src_object = src.ToHeapObject();
          RootIndex index;
          if (IsMaterializableFromRoot(src_object, &index)) {
            __ LoadRoot(dst, index);
          } else {
            __ Move(dst, src_object, RelocInfo::COMPRESSED_EMBEDDED_OBJECT);
          }
4001
          break;
4002
        }
4003 4004 4005 4006
        case Constant::kRpoNumber:
          UNREACHABLE();  // TODO(dcarney): loading RPO constants on S390.
      }
      if (destination->IsStackSlot()) {
4007
        __ StoreU64(dst, g.ToMemOperand(destination), r0);
4008 4009
      }
    } else {
4010
      DoubleRegister dst = destination->IsFPRegister()
4011 4012
                               ? g.ToDoubleRegister(destination)
                               : kScratchDoubleReg;
4013 4014 4015
      double value = (src.type() == Constant::kFloat32)
                         ? src.ToFloat32()
                         : src.ToFloat64().value();
4016
      if (src.type() == Constant::kFloat32) {
4017
        __ LoadF32<float>(dst, src.ToFloat32(), kScratchReg);
4018
      } else {
4019
        __ LoadF64<double>(dst, value, kScratchReg);
4020 4021
      }

4022
      if (destination->IsFloatStackSlot()) {
4023
        __ StoreF32(dst, g.ToMemOperand(destination));
4024
      } else if (destination->IsDoubleStackSlot()) {
4025
        __ StoreF64(dst, g.ToMemOperand(destination));
4026 4027
      }
    }
4028
  } else if (source->IsFPRegister()) {
4029 4030 4031 4032 4033 4034 4035
    MachineRepresentation rep = LocationOperand::cast(source)->representation();
    if (rep == MachineRepresentation::kSimd128) {
      if (destination->IsSimd128Register()) {
        __ vlr(g.ToSimd128Register(destination), g.ToSimd128Register(source),
               Condition(0), Condition(0), Condition(0));
      } else {
        DCHECK(destination->IsSimd128StackSlot());
4036 4037
        __ StoreV128(g.ToSimd128Register(source), g.ToMemOperand(destination),
                     kScratchReg);
4038
      }
4039
    } else {
4040 4041 4042 4043
      DoubleRegister src = g.ToDoubleRegister(source);
      if (destination->IsFPRegister()) {
        DoubleRegister dst = g.ToDoubleRegister(destination);
        __ Move(dst, src);
4044
      } else {
4045 4046 4047
        DCHECK(destination->IsFPStackSlot());
        LocationOperand* op = LocationOperand::cast(source);
        if (op->representation() == MachineRepresentation::kFloat64) {
4048
          __ StoreF64(src, g.ToMemOperand(destination));
4049
        } else {
4050
          __ StoreF32(src, g.ToMemOperand(destination));
4051
        }
4052
      }
4053
    }
4054 4055
  } else if (source->IsFPStackSlot()) {
    DCHECK(destination->IsFPRegister() || destination->IsFPStackSlot());
4056
    MemOperand src = g.ToMemOperand(source);
4057
    if (destination->IsFPRegister()) {
4058 4059
      LocationOperand* op = LocationOperand::cast(source);
      if (op->representation() == MachineRepresentation::kFloat64) {
4060
        __ LoadF64(g.ToDoubleRegister(destination), src);
4061
      } else if (op->representation() == MachineRepresentation::kFloat32) {
4062
        __ LoadF32(g.ToDoubleRegister(destination), src);
4063 4064
      } else {
        DCHECK_EQ(MachineRepresentation::kSimd128, op->representation());
4065 4066
        __ LoadV128(g.ToSimd128Register(destination), g.ToMemOperand(source),
                    kScratchReg);
4067
      }
4068
    } else {
4069
      LocationOperand* op = LocationOperand::cast(source);
4070
      DoubleRegister temp = kScratchDoubleReg;
4071
      if (op->representation() == MachineRepresentation::kFloat64) {
4072
        __ LoadF64(temp, src);
4073
        __ StoreF64(temp, g.ToMemOperand(destination));
4074
      } else if (op->representation() == MachineRepresentation::kFloat32) {
4075
        __ LoadF32(temp, src);
4076
        __ StoreF32(temp, g.ToMemOperand(destination));
4077 4078
      } else {
        DCHECK_EQ(MachineRepresentation::kSimd128, op->representation());
4079 4080 4081
        __ LoadV128(kScratchDoubleReg, g.ToMemOperand(source), kScratchReg);
        __ StoreV128(kScratchDoubleReg, g.ToMemOperand(destination),
                     kScratchReg);
4082
      }
4083 4084 4085 4086 4087 4088
    }
  } else {
    UNREACHABLE();
  }
}

4089 4090 4091 4092 4093 4094 4095 4096
// Swaping contents in source and destination.
// source and destination could be:
//   Register,
//   FloatRegister,
//   DoubleRegister,
//   StackSlot,
//   FloatStackSlot,
//   or DoubleStackSlot
4097 4098 4099 4100 4101 4102
void CodeGenerator::AssembleSwap(InstructionOperand* source,
                                 InstructionOperand* destination) {
  S390OperandConverter g(this, nullptr);
  if (source->IsRegister()) {
    Register src = g.ToRegister(source);
    if (destination->IsRegister()) {
4103
      __ SwapP(src, g.ToRegister(destination), kScratchReg);
4104 4105
    } else {
      DCHECK(destination->IsStackSlot());
4106
      __ SwapP(src, g.ToMemOperand(destination), kScratchReg);
4107 4108 4109
    }
  } else if (source->IsStackSlot()) {
    DCHECK(destination->IsStackSlot());
4110 4111 4112
    __ SwapP(g.ToMemOperand(source), g.ToMemOperand(destination), kScratchReg,
             r0);
  } else if (source->IsFloatRegister()) {
4113
    DoubleRegister src = g.ToDoubleRegister(source);
4114 4115
    if (destination->IsFloatRegister()) {
      __ SwapFloat32(src, g.ToDoubleRegister(destination), kScratchDoubleReg);
4116
    } else {
4117 4118
      DCHECK(destination->IsFloatStackSlot());
      __ SwapFloat32(src, g.ToMemOperand(destination), kScratchDoubleReg);
4119
    }
4120 4121 4122 4123 4124 4125 4126 4127 4128 4129 4130
  } else if (source->IsDoubleRegister()) {
    DoubleRegister src = g.ToDoubleRegister(source);
    if (destination->IsDoubleRegister()) {
      __ SwapDouble(src, g.ToDoubleRegister(destination), kScratchDoubleReg);
    } else {
      DCHECK(destination->IsDoubleStackSlot());
      __ SwapDouble(src, g.ToMemOperand(destination), kScratchDoubleReg);
    }
  } else if (source->IsFloatStackSlot()) {
    DCHECK(destination->IsFloatStackSlot());
    __ SwapFloat32(g.ToMemOperand(source), g.ToMemOperand(destination),
4131
                   kScratchDoubleReg);
4132 4133 4134
  } else if (source->IsDoubleStackSlot()) {
    DCHECK(destination->IsDoubleStackSlot());
    __ SwapDouble(g.ToMemOperand(source), g.ToMemOperand(destination),
4135
                  kScratchDoubleReg);
4136
  } else if (source->IsSimd128Register()) {
4137 4138 4139 4140 4141 4142 4143 4144 4145 4146 4147
    Simd128Register src = g.ToSimd128Register(source);
    if (destination->IsSimd128Register()) {
      __ SwapSimd128(src, g.ToSimd128Register(destination), kScratchDoubleReg);
    } else {
      DCHECK(destination->IsSimd128StackSlot());
      __ SwapSimd128(src, g.ToMemOperand(destination), kScratchDoubleReg);
    }
  } else if (source->IsSimd128StackSlot()) {
    DCHECK(destination->IsSimd128StackSlot());
    __ SwapSimd128(g.ToMemOperand(source), g.ToMemOperand(destination),
                   kScratchDoubleReg);
4148 4149 4150 4151 4152 4153 4154 4155 4156 4157 4158 4159 4160 4161 4162 4163
  } else {
    UNREACHABLE();
  }
}

void CodeGenerator::AssembleJumpTable(Label** targets, size_t target_count) {
  for (size_t index = 0; index < target_count; ++index) {
    __ emit_label_addr(targets[index]);
  }
}

#undef __

}  // namespace compiler
}  // namespace internal
}  // namespace v8