Commit a8f877bf authored by Milad Fa's avatar Milad Fa Committed by Commit Bot

S390: [wasm-simd] Implement extended multiply

PPC will be implemented separately.

Change-Id: I358f5a73275a40f8083e9c07b7028d162969f836
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2597578Reviewed-by: 's avatarJunliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#71834}
parent d1226086
......@@ -2458,6 +2458,43 @@ void InstructionSelector::VisitS128Const(Node* node) {
}
}
void InstructionSelector::VisitI64x2ExtMulLowI32x4S(Node* node) {
UNIMPLEMENTED();
}
void InstructionSelector::VisitI64x2ExtMulHighI32x4S(Node* node) {
UNIMPLEMENTED();
}
void InstructionSelector::VisitI64x2ExtMulLowI32x4U(Node* node) {
UNIMPLEMENTED();
}
void InstructionSelector::VisitI64x2ExtMulHighI32x4U(Node* node) {
UNIMPLEMENTED();
}
void InstructionSelector::VisitI32x4ExtMulLowI16x8S(Node* node) {
UNIMPLEMENTED();
}
void InstructionSelector::VisitI32x4ExtMulHighI16x8S(Node* node) {
UNIMPLEMENTED();
}
void InstructionSelector::VisitI32x4ExtMulLowI16x8U(Node* node) {
UNIMPLEMENTED();
}
void InstructionSelector::VisitI32x4ExtMulHighI16x8U(Node* node) {
UNIMPLEMENTED();
}
void InstructionSelector::VisitI16x8ExtMulLowI8x16S(Node* node) {
UNIMPLEMENTED();
}
void InstructionSelector::VisitI16x8ExtMulHighI8x16S(Node* node) {
UNIMPLEMENTED();
}
void InstructionSelector::VisitI16x8ExtMulLowI8x16U(Node* node) {
UNIMPLEMENTED();
}
void InstructionSelector::VisitI16x8ExtMulHighI8x16U(Node* node) {
UNIMPLEMENTED();
}
void InstructionSelector::EmitPrepareResults(
ZoneVector<PushParameter>* results, const CallDescriptor* call_descriptor,
Node* node) {
......
......@@ -4113,6 +4113,80 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
Condition(0), Condition(0), Condition(2));
break;
}
#define ASSEMBLE_SIMD_I64X2_EXT_MUL(UNPACK_INSTR) \
__ UNPACK_INSTR(kScratchDoubleReg, i.InputSimd128Register(0), Condition(0), \
Condition(0), Condition(2)); \
__ UNPACK_INSTR(i.OutputSimd128Register(), i.InputSimd128Register(1), \
Condition(0), Condition(0), Condition(2)); \
Register scratch_0 = r0; \
Register scratch_1 = r1; \
for (int lane = 0; lane < 2; lane++) { \
__ vlgv(scratch_0, kScratchDoubleReg, MemOperand(r0, lane), Condition(3)); \
__ vlgv(scratch_1, i.OutputSimd128Register(), MemOperand(r0, lane), \
Condition(3)); \
__ Mul64(scratch_0, scratch_1); \
scratch_0 = r1; \
scratch_1 = ip; \
} \
__ vlvgp(i.OutputSimd128Register(), r0, r1);
case kS390_I64x2ExtMulLowI32x4S: {
ASSEMBLE_SIMD_I64X2_EXT_MUL(vupl)
break;
}
case kS390_I64x2ExtMulHighI32x4S: {
ASSEMBLE_SIMD_I64X2_EXT_MUL(vuph)
break;
}
case kS390_I64x2ExtMulLowI32x4U: {
ASSEMBLE_SIMD_I64X2_EXT_MUL(vupll)
break;
}
case kS390_I64x2ExtMulHighI32x4U: {
ASSEMBLE_SIMD_I64X2_EXT_MUL(vuplh)
break;
}
#undef ASSEMBLE_SIMD_I64X2_EXT_MUL
#define ASSEMBLE_SIMD_I32X4_I16X8_EXT_MUL(UNPACK_INSTR, MODE) \
__ UNPACK_INSTR(kScratchDoubleReg, i.InputSimd128Register(0), Condition(0), \
Condition(0), Condition(MODE)); \
__ UNPACK_INSTR(i.OutputSimd128Register(), i.InputSimd128Register(1), \
Condition(0), Condition(0), Condition(MODE)); \
__ vml(i.OutputSimd128Register(), kScratchDoubleReg, \
i.OutputSimd128Register(), Condition(0), Condition(0), \
Condition(MODE + 1));
case kS390_I32x4ExtMulLowI16x8S: {
ASSEMBLE_SIMD_I32X4_I16X8_EXT_MUL(vupl, 1)
break;
}
case kS390_I32x4ExtMulHighI16x8S: {
ASSEMBLE_SIMD_I32X4_I16X8_EXT_MUL(vuph, 1)
break;
}
case kS390_I32x4ExtMulLowI16x8U: {
ASSEMBLE_SIMD_I32X4_I16X8_EXT_MUL(vupll, 1)
break;
}
case kS390_I32x4ExtMulHighI16x8U: {
ASSEMBLE_SIMD_I32X4_I16X8_EXT_MUL(vuplh, 1)
break;
}
case kS390_I16x8ExtMulLowI8x16S: {
ASSEMBLE_SIMD_I32X4_I16X8_EXT_MUL(vupl, 0)
break;
}
case kS390_I16x8ExtMulHighI8x16S: {
ASSEMBLE_SIMD_I32X4_I16X8_EXT_MUL(vuph, 0)
break;
}
case kS390_I16x8ExtMulLowI8x16U: {
ASSEMBLE_SIMD_I32X4_I16X8_EXT_MUL(vupll, 0)
break;
}
case kS390_I16x8ExtMulHighI8x16U: {
ASSEMBLE_SIMD_I32X4_I16X8_EXT_MUL(vuplh, 0)
break;
}
#undef ASSEMBLE_SIMD_I32X4_I16X8_EXT_MUL
case kS390_StoreCompressTagged: {
CHECK(!instr->HasOutput());
size_t index = 0;
......
......@@ -256,6 +256,10 @@ namespace compiler {
V(S390_I64x2ExtractLane) \
V(S390_I64x2Eq) \
V(S390_I64x2BitMask) \
V(S390_I64x2ExtMulLowI32x4S) \
V(S390_I64x2ExtMulHighI32x4S) \
V(S390_I64x2ExtMulLowI32x4U) \
V(S390_I64x2ExtMulHighI32x4U) \
V(S390_I32x4Splat) \
V(S390_I32x4ExtractLane) \
V(S390_I32x4ReplaceLane) \
......@@ -286,6 +290,10 @@ namespace compiler {
V(S390_I32x4Abs) \
V(S390_I32x4BitMask) \
V(S390_I32x4DotI16x8S) \
V(S390_I32x4ExtMulLowI16x8S) \
V(S390_I32x4ExtMulHighI16x8S) \
V(S390_I32x4ExtMulLowI16x8U) \
V(S390_I32x4ExtMulHighI16x8U) \
V(S390_I16x8Splat) \
V(S390_I16x8ExtractLaneU) \
V(S390_I16x8ExtractLaneS) \
......@@ -321,6 +329,10 @@ namespace compiler {
V(S390_I16x8RoundingAverageU) \
V(S390_I16x8Abs) \
V(S390_I16x8BitMask) \
V(S390_I16x8ExtMulLowI8x16S) \
V(S390_I16x8ExtMulHighI8x16S) \
V(S390_I16x8ExtMulLowI8x16U) \
V(S390_I16x8ExtMulHighI8x16U) \
V(S390_I8x16Splat) \
V(S390_I8x16ExtractLaneU) \
V(S390_I8x16ExtractLaneS) \
......
......@@ -202,6 +202,10 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_I64x2ExtractLane:
case kS390_I64x2Eq:
case kS390_I64x2BitMask:
case kS390_I64x2ExtMulLowI32x4S:
case kS390_I64x2ExtMulHighI32x4S:
case kS390_I64x2ExtMulLowI32x4U:
case kS390_I64x2ExtMulHighI32x4U:
case kS390_I32x4Splat:
case kS390_I32x4ExtractLane:
case kS390_I32x4ReplaceLane:
......@@ -232,6 +236,10 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_I32x4Abs:
case kS390_I32x4BitMask:
case kS390_I32x4DotI16x8S:
case kS390_I32x4ExtMulLowI16x8S:
case kS390_I32x4ExtMulHighI16x8S:
case kS390_I32x4ExtMulLowI16x8U:
case kS390_I32x4ExtMulHighI16x8U:
case kS390_I16x8Splat:
case kS390_I16x8ExtractLaneU:
case kS390_I16x8ExtractLaneS:
......@@ -267,6 +275,10 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_I16x8RoundingAverageU:
case kS390_I16x8Abs:
case kS390_I16x8BitMask:
case kS390_I16x8ExtMulLowI8x16S:
case kS390_I16x8ExtMulHighI8x16S:
case kS390_I16x8ExtMulLowI8x16U:
case kS390_I16x8ExtMulHighI8x16U:
case kS390_I8x16Splat:
case kS390_I8x16ExtractLaneU:
case kS390_I8x16ExtractLaneS:
......
......@@ -2446,6 +2446,10 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) {
V(I64x2Sub) \
V(I64x2Mul) \
V(I64x2Eq) \
V(I64x2ExtMulLowI32x4S) \
V(I64x2ExtMulHighI32x4S) \
V(I64x2ExtMulLowI32x4U) \
V(I64x2ExtMulHighI32x4U) \
V(I32x4Add) \
V(I32x4AddHoriz) \
V(I32x4Sub) \
......@@ -2461,6 +2465,10 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) {
V(I32x4GtU) \
V(I32x4GeU) \
V(I32x4DotI16x8S) \
V(I32x4ExtMulLowI16x8S) \
V(I32x4ExtMulHighI16x8S) \
V(I32x4ExtMulLowI16x8U) \
V(I32x4ExtMulHighI16x8U) \
V(I16x8Add) \
V(I16x8AddHoriz) \
V(I16x8Sub) \
......@@ -2482,6 +2490,10 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) {
V(I16x8AddSatU) \
V(I16x8SubSatU) \
V(I16x8RoundingAverageU) \
V(I16x8ExtMulLowI8x16S) \
V(I16x8ExtMulHighI8x16S) \
V(I16x8ExtMulLowI8x16U) \
V(I16x8ExtMulHighI8x16U) \
V(I8x16Add) \
V(I8x16Sub) \
V(I8x16Mul) \
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment