Commit 27bfdd44 authored by Milad Fa's avatar Milad Fa Committed by V8 LUCI CQ

PPC/S390 [simd]: optimize S128Const on codegen

Change-Id: I6e72c56bb71d0d227b5556139dc687a78da6fb31
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2892257Reviewed-by: 's avatarJunliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#74541}
parent 59d59b51
......@@ -2795,15 +2795,11 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
break;
}
case kPPC_S128Const: {
Simd128Register dst = i.OutputSimd128Register();
constexpr int lane_width_in_bytes = 8;
uint64_t low = make_uint64(i.InputUint32(1), i.InputUint32(0));
uint64_t high = make_uint64(i.InputUint32(3), i.InputUint32(2));
__ mov(r0, Operand(low));
__ mov(ip, Operand(high));
__ mtvsrd(dst, ip);
__ mtvsrd(kScratchSimd128Reg, r0);
__ vinsertd(dst, kScratchSimd128Reg, Operand(1 * lane_width_in_bytes));
__ mtvsrdd(i.OutputSimd128Register(), ip, r0);
break;
}
case kPPC_S128Zero: {
......
......@@ -3280,11 +3280,11 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
break;
}
case kS390_S128Const: {
for (int index = 0, j = 0; index < 2; index++, j = +2) {
__ mov(index < 1 ? ip : r0, Operand(i.InputInt32(j)));
__ iihf(index < 1 ? ip : r0, Operand(i.InputInt32(j + 1)));
}
__ vlvgp(i.OutputSimd128Register(), r0, ip);
uint64_t low = make_uint64(i.InputUint32(1), i.InputUint32(0));
uint64_t high = make_uint64(i.InputUint32(3), i.InputUint32(2));
__ mov(r0, Operand(low));
__ mov(ip, Operand(high));
__ vlvgp(i.OutputSimd128Register(), ip, r0);
break;
}
case kS390_S128Zero: {
......
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