Commit b7ad187c authored by Milad Fa's avatar Milad Fa Committed by V8 LUCI CQ

S390: Fix the order of base, index register in codegen

MemOperand is declared as:
````
MemOperand(Register rx, Register rb, Disp offset = 0);
```

Change-Id: I56b89dec8f206081f08c674fc160b6bc2347877b
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3001173Reviewed-by: 's avatarJunliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#75530}
parent 899a8168
......@@ -131,7 +131,7 @@ class S390OperandConverter final : public InstructionOperandConverter {
#if V8_TARGET_ARCH_S390X && !V8_TARGET_LITTLE_ENDIAN
// We want to read the 32-bits directly from memory
MemOperand mem = InputStackSlot(index);
return MemOperand(mem.rb(), mem.rx(), mem.offset() + 4);
return MemOperand(mem.rx(), mem.rb(), mem.offset() + 4);
#else
return InputStackSlot(index);
#endif
......
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