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Commit 81e75305 authored by Vasili Skurydzin's avatar Vasili Skurydzin Committed by Commit Bot
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s390: assembler-s390 instruction format cleanup 

Change-Id: I7736314257bba44b4336d584020744c05874aa64
Reviewed-on: https://chromium-review.googlesource.com/1067607Reviewed-by: 's avatarJunliang Yan <jyan@ca.ibm.com>
Commit-Queue: Junliang Yan <jyan@ca.ibm.com>
Cr-Commit-Position: refs/heads/master@{#53591}
parent afd6351d
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Showing with 613 additions and 1740 deletions
src/compiler/s390/code-generator-s390.cc
View file @ 81e75305
......@@ -900,12 +900,12 @@ static inline int AssembleUnaryOp(Instruction* instr, _R _r, _M _m, _I _i) {
{ \
__ LoadlW(temp0, MemOperand(addr, offset)); \
__ llgfr(temp1, temp0); \
__ risbg(temp0, old_val, Operand(start), Operand(end), \
Operand(shift_amount), false); \
__ risbg(temp1, new_val, Operand(start), Operand(end), \
Operand(shift_amount), false); \
__ RotateInsertSelectBits(temp0, old_val, Operand(start), \
Operand(end), Operand(shift_amount), false); \
__ RotateInsertSelectBits(temp1, new_val, Operand(start), \
Operand(end), Operand(shift_amount), false); \
__ CmpAndSwap(temp0, temp1, MemOperand(addr, offset)); \
__ risbg(output, temp0, Operand(start+shift_amount), \
__ RotateInsertSelectBits(output, temp0, Operand(start+shift_amount), \
Operand(end+shift_amount), Operand(64-shift_amount), true); \
}
......@@ -1036,12 +1036,12 @@ static inline int AssembleUnaryOp(Instruction* instr, _R _r, _M _m, _I _i) {
Label do_cs; \
__ LoadlW(prev, MemOperand(addr, offset)); \
__ bind(&do_cs); \
__ risbg(temp, value, Operand(start), Operand(end), \
__ RotateInsertSelectBits(temp, value, Operand(start), Operand(end), \
Operand(static_cast<intptr_t>(shift_amount)), true); \
__ bin_inst(new_val, prev, temp); \
__ lr(temp, prev); \
__ risbg(temp, new_val, Operand(start), Operand(end), \
Operand::Zero(), false); \
__ RotateInsertSelectBits(temp, new_val, Operand(start), \
Operand(end), Operand::Zero(), false); \
__ CmpAndSwap(prev, temp, MemOperand(addr, offset)); \
__ bne(&do_cs, Label::kNear); \
} while (false)
......@@ -1807,8 +1807,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
int shiftAmount = i.InputInt32(1);
int endBit = 63 - shiftAmount;
int startBit = 63 - i.InputInt32(2);
__ risbg(i.OutputRegister(), i.InputRegister(0), Operand(startBit),
Operand(endBit), Operand(shiftAmount), true);
__ RotateInsertSelectBits(i.OutputRegister(), i.InputRegister(0),
Operand(startBit), Operand(endBit), Operand(shiftAmount), true);
} else {
int shiftAmount = i.InputInt32(1);
int clearBit = 63 - i.InputInt32(2);
......@@ -1824,8 +1824,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
int shiftAmount = i.InputInt32(1);
int endBit = 63;
int startBit = 63 - i.InputInt32(2);
__ risbg(i.OutputRegister(), i.InputRegister(0), Operand(startBit),
Operand(endBit), Operand(shiftAmount), true);
__ RotateInsertSelectBits(i.OutputRegister(), i.InputRegister(0),
Operand(startBit), Operand(endBit), Operand(shiftAmount), true);
} else {
int shiftAmount = i.InputInt32(1);
int clearBit = 63 - i.InputInt32(2);
......@@ -1839,8 +1839,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
int shiftAmount = i.InputInt32(1);
int endBit = 63 - i.InputInt32(2);
int startBit = 0;
__ risbg(i.OutputRegister(), i.InputRegister(0), Operand(startBit),
Operand(endBit), Operand(shiftAmount), true);
__ RotateInsertSelectBits(i.OutputRegister(), i.InputRegister(0),
Operand(startBit), Operand(endBit), Operand(shiftAmount), true);
} else {
int shiftAmount = i.InputInt32(1);
int clearBit = i.InputInt32(2);
......@@ -1971,16 +1971,16 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
ASSEMBLE_UNARY_OP(D_DInstr(sqdbr), nullInstr, nullInstr);
break;
case kS390_FloorFloat:
__ fiebra(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
v8::internal::Assembler::FIDBRA_ROUND_TOWARD_NEG_INF);
__ fiebra(v8::internal::Assembler::FIDBRA_ROUND_TOWARD_NEG_INF,
i.OutputDoubleRegister(), i.InputDoubleRegister(0));
break;
case kS390_CeilFloat:
__ fiebra(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
v8::internal::Assembler::FIDBRA_ROUND_TOWARD_POS_INF);
__ fiebra(v8::internal::Assembler::FIDBRA_ROUND_TOWARD_POS_INF,
i.OutputDoubleRegister(), i.InputDoubleRegister(0));
break;
case kS390_TruncateFloat:
__ fiebra(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
v8::internal::Assembler::FIDBRA_ROUND_TOWARD_0);
__ fiebra(v8::internal::Assembler::FIDBRA_ROUND_TOWARD_0,
i.OutputDoubleRegister(), i.InputDoubleRegister(0));
break;
// Double operations
case kS390_ModDouble:
......@@ -2074,20 +2074,20 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
__ lpdbr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
break;
case kS390_FloorDouble:
__ fidbra(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
v8::internal::Assembler::FIDBRA_ROUND_TOWARD_NEG_INF);
__ fidbra(v8::internal::Assembler::FIDBRA_ROUND_TOWARD_NEG_INF,
i.OutputDoubleRegister(), i.InputDoubleRegister(0));
break;
case kS390_CeilDouble:
__ fidbra(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
v8::internal::Assembler::FIDBRA_ROUND_TOWARD_POS_INF);
__ fidbra(v8::internal::Assembler::FIDBRA_ROUND_TOWARD_POS_INF,
i.OutputDoubleRegister(), i.InputDoubleRegister(0));
break;
case kS390_TruncateDouble:
__ fidbra(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
v8::internal::Assembler::FIDBRA_ROUND_TOWARD_0);
__ fidbra(v8::internal::Assembler::FIDBRA_ROUND_TOWARD_0,
i.OutputDoubleRegister(), i.InputDoubleRegister(0));
break;
case kS390_RoundDouble:
__ fidbra(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
v8::internal::Assembler::FIDBRA_ROUND_TO_NEAREST_AWAY_FROM_0);
__ fidbra(v8::internal::Assembler::FIDBRA_ROUND_TO_NEAREST_AWAY_FROM_0,
i.OutputDoubleRegister(), i.InputDoubleRegister(0));
break;
case kS390_NegFloat:
ASSEMBLE_UNARY_OP(D_DInstr(lcebr), nullInstr, nullInstr);
......@@ -2550,8 +2550,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
__ LoadlW(output, MemOperand(r1, offset)); \
__ bind(&do_cs); \
__ llgfr(r0, output); \
__ risbg(r0, value, Operand(start), Operand(end), Operand(shift_amount), \
false); \
__ RotateInsertSelectBits(r0, value, Operand(start), Operand(end), \
Operand(shift_amount), false); \
__ csy(output, r0, MemOperand(r1, offset)); \
__ bne(&do_cs, Label::kNear); \
__ srl(output, Operand(shift_amount)); \
......@@ -2700,8 +2700,9 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
case kWord32Atomic##op##Uint8: \
ASSEMBLE_ATOMIC_BINOP_BYTE(inst, [&]() { \
int rotate_left = shift_amount == 0 ? 0 : 64 - shift_amount; \
__ risbg(result, prev, Operand(56), Operand(63), \
Operand(static_cast<intptr_t>(rotate_left)), true); \
__ RotateInsertSelectBits(result, prev, Operand(56), \
Operand(63), Operand(static_cast<intptr_t>(rotate_left)), \
true); \
}); \
break; \
case kWord32Atomic##op##Int16: \
......@@ -2714,8 +2715,9 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
case kWord32Atomic##op##Uint16: \
ASSEMBLE_ATOMIC_BINOP_HALFWORD(inst, [&]() { \
int rotate_left = shift_amount == 0 ? 0 : 64 - shift_amount; \
__ risbg(result, prev, Operand(48), Operand(63), \
Operand(static_cast<intptr_t>(rotate_left)), true); \
__ RotateInsertSelectBits(result, prev, Operand(48), \
Operand(63), Operand(static_cast<intptr_t>(rotate_left)), \
true); \
}); \
break;
ATOMIC_BINOP_CASE(Add, Add32)
......
src/s390/assembler-s390.cc
View file @ 81e75305
This diff is collapsed.
src/s390/assembler-s390.h
View file @ 81e75305
This diff is collapsed.
src/s390/constants-s390.h
View file @ 81e75305
......@@ -686,7 +686,11 @@ typedef uint64_t SixByteInstr;
0xEDAD) /* type = RSL_B CONVERT TO PACKED (from extended DFP) */ \
V(cdpt, CDPT, 0xEDAE) /* type = RSL_B CONVERT FROM PACKED (to long DFP) */ \
V(cxpt, CXPT, \
0xEDAF) /* type = RSL_B CONVERT FROM PACKED (to extended DFP) */
0xEDAF) /* type = RSL_B CONVERT FROM PACKED (to extended DFP) */ \
V(czdt, CZDT, 0xEDA8) /* type = RSL CONVERT TO ZONED (from long DFP) */ \
V(czxt, CZXT, 0xEDA9) /* type = RSL CONVERT TO ZONED (from extended DFP) */ \
V(cdzt, CDZT, 0xEDAA) /* type = RSL CONVERT FROM ZONED (to long DFP) */ \
V(cxzt, CXZT, 0xEDAB) /* type = RSL CONVERT FROM ZONED (to extended DFP) */
#define S390_SI_OPCODE_LIST(V) \
V(tm, TM, 0x91) /* type = SI TEST UNDER MASK */ \
......@@ -856,12 +860,6 @@ typedef uint64_t SixByteInstr;
#define S390_RI_C_OPCODE_LIST(V) \
V(brc, BRC, 0xA74) /* type = RI_C BRANCH RELATIVE ON CONDITION */
#define S390_RSL_OPCODE_LIST(V) \
V(czdt, CZDT, 0xEDA8) /* type = RSL CONVERT TO ZONED (from long DFP) */ \
V(czxt, CZXT, 0xEDA9) /* type = RSL CONVERT TO ZONED (from extended DFP) */ \
V(cdzt, CDZT, 0xEDAA) /* type = RSL CONVERT FROM ZONED (to long DFP) */ \
V(cxzt, CXZT, 0xEDAB) /* type = RSL CONVERT FROM ZONED (to extended DFP) */
#define S390_SMI_OPCODE_LIST(V) \
V(bpp, BPP, 0xC7) /* type = SMI BRANCH PREDICTION PRELOAD */
......@@ -1096,7 +1094,6 @@ typedef uint64_t SixByteInstr;
V(icm, ICM, 0xBF) /* type = RS_B INSERT CHARACTERS UNDER MASK (low) */
#define S390_S_OPCODE_LIST(V) \
V(awr, AWR, 0x2E) /* type = S ADD UNNORMALIZED (long HFP) */ \
V(lpsw, LPSW, 0x82) /* type = S LOAD PSW */ \
V(diagnose, DIAGNOSE, 0x83) /* type = S DIAGNOSE */ \
V(ts, TS, 0x93) /* type = S TEST AND SET */ \
......@@ -1541,6 +1538,7 @@ typedef uint64_t SixByteInstr;
0xEC45) /* type = RIE_E BRANCH RELATIVE ON INDEX LOW OR EQ. (64) */
#define S390_RR_OPCODE_LIST(V) \
V(awr, AWR, 0x2E) /* type = RR ADD UNNORMALIZED (long HFP) */ \
V(spm, SPM, 0x04) /* type = RR SET PROGRAM MASK */ \
V(balr, BALR, 0x05) /* type = RR BRANCH AND LINK */ \
V(bctr, BCTR, 0x06) /* type = RR BRANCH ON COUNT (32) */ \
......@@ -1684,7 +1682,6 @@ typedef uint64_t SixByteInstr;
S390_RSI_OPCODE_LIST(V) \
S390_RI_B_OPCODE_LIST(V) \
S390_RI_C_OPCODE_LIST(V) \
S390_RSL_OPCODE_LIST(V) \
S390_SMI_OPCODE_LIST(V) \
S390_RXY_A_OPCODE_LIST(V) \
S390_RXY_B_OPCODE_LIST(V) \
......
src/s390/macro-assembler-s390.cc
View file @ 81e75305
......@@ -432,6 +432,39 @@ void TurboAssembler::Move(DoubleRegister dst, DoubleRegister src) {
}
}
// Wrapper around Assembler::mvc (SS-a format)
void TurboAssembler::MoveChar(const MemOperand& opnd1,
const MemOperand& opnd2,
const Operand& length) {
mvc(opnd1, opnd2, Operand(static_cast<intptr_t>(length.immediate() - 1)));
}
// Wrapper around Assembler::clc (SS-a format)
void TurboAssembler::CompareLogicalChar(const MemOperand& opnd1,
const MemOperand& opnd2,
const Operand& length) {
clc(opnd1, opnd2, Operand(static_cast<intptr_t>(length.immediate() - 1)));
}
// Wrapper around Assembler::xc (SS-a format)
void TurboAssembler::ExclusiveOrChar(const MemOperand& opnd1,
const MemOperand& opnd2,
const Operand& length) {
xc(opnd1, opnd2, Operand(static_cast<intptr_t>(length.immediate() - 1)));
}
// Wrapper around Assembler::risbg(n) (RIE-f)
void TurboAssembler::RotateInsertSelectBits(Register dst, Register src,
const Operand& startBit, const Operand& endBit,
const Operand& shiftAmt, bool zeroBits) {
if (zeroBits)
// High tag the top bit of I4/EndBit to zero out any unselected bits
risbg(dst, src, startBit,
Operand(static_cast<intptr_t>(endBit.immediate() | 0x80)), shiftAmt);
else
risbg(dst, src, startBit, endBit, shiftAmt);
}
void TurboAssembler::MultiPush(RegList regs, Register location) {
int16_t num_to_push = base::bits::CountPopulation(regs);
int16_t stack_offset = num_to_push * kPointerSize;
......@@ -754,7 +787,7 @@ void TurboAssembler::ConvertUnsignedIntToDouble(DoubleRegister dst,
}
void TurboAssembler::ConvertIntToFloat(DoubleRegister dst, Register src) {
cefbr(Condition(4), dst, src);
cefbra(Condition(4), dst, src);
}
void TurboAssembler::ConvertUnsignedIntToFloat(DoubleRegister dst,
......@@ -1523,8 +1556,8 @@ void MacroAssembler::PushStackHandler() {
StoreP(r0, MemOperand(sp)); // Padding.
// Copy the old handler into the next handler slot.
mvc(MemOperand(sp, StackHandlerConstants::kNextOffset), MemOperand(r7),
kPointerSize);
MoveChar(MemOperand(sp, StackHandlerConstants::kNextOffset), MemOperand(r7),
Operand(kPointerSize));
// Set this new handler as the current one.
StoreP(sp, MemOperand(r7));
}
......@@ -2299,7 +2332,7 @@ void TurboAssembler::Div32(Register dst, Register src1, Register src2) {
#define Generate_DivU32(instr) \
{ \
lr(r0, src1); \
srdl(r0, Operand(32)); \
srdl(r0, r0, Operand(32)); \
instr(r0, src2); \
LoadlW(dst, r1); \
}
......@@ -2373,7 +2406,7 @@ void TurboAssembler::Mod32(Register dst, Register src1, Register src2) {
#define Generate_ModU32(instr) \
{ \
lr(r0, src1); \
srdl(r0, Operand(32)); \
srdl(r0, r0, Operand(32)); \
instr(r0, src2); \
LoadlW(dst, r0); \
}
......@@ -3067,14 +3100,15 @@ void TurboAssembler::AndP(Register dst, Register src, const Operand& opnd) {
base::bits::CountLeadingZeros64(shifted_value) - trailing_zeros;
int endBit = 63 - trailing_zeros;
// Start: startBit, End: endBit, Shift = 0, true = zero unselected bits.
risbg(dst, src, Operand(startBit), Operand(endBit), Operand::Zero(),
true);
RotateInsertSelectBits(dst, src, Operand(startBit), Operand(endBit),
Operand::Zero(), true);
return;
} else if (-1 == shifted_value) {
// A Special case in which all top bits up to MSB are 1's. In this case,
// we can set startBit to be 0.
int endBit = 63 - trailing_zeros;
risbg(dst, src, Operand::Zero(), Operand(endBit), Operand::Zero(), true);
RotateInsertSelectBits(dst, src, Operand::Zero(), Operand(endBit),
Operand::Zero(), true);
return;
}
}
......@@ -4291,7 +4325,8 @@ void TurboAssembler::ClearRightImm(Register dst, Register src,
// Try to use RISBG if possible
if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
int endBit = 63 - numBitsToClear;
risbg(dst, src, Operand::Zero(), Operand(endBit), Operand::Zero(), true);
RotateInsertSelectBits(dst, src, Operand::Zero(), Operand(endBit),
Operand::Zero(), true);
return;
}
......
src/s390/macro-assembler-s390.h
View file @ 81e75305
......@@ -233,6 +233,19 @@ class TurboAssembler : public Assembler {
void Move(Register dst, Register src, Condition cond = al);
void Move(DoubleRegister dst, DoubleRegister src);
void MoveChar(const MemOperand& opnd1, const MemOperand& opnd2,
const Operand& length);
void CompareLogicalChar(const MemOperand& opnd1, const MemOperand& opnd2,
const Operand& length);
void ExclusiveOrChar(const MemOperand& opnd1, const MemOperand& opnd2,
const Operand& length);
void RotateInsertSelectBits(Register dst, Register src,
const Operand& startBit, const Operand& endBit,
const Operand& shiftAmt, bool zeroBits);
void SaveRegisters(RegList registers);
void RestoreRegisters(RegList registers);
......@@ -918,8 +931,8 @@ class TurboAssembler : public Assembler {
int shiftAmount = (64 - rangeEnd) % 64; // Convert to shift left.
int endBit = 63; // End is always LSB after shifting.
int startBit = 63 - rangeStart + rangeEnd;
risbg(dst, src, Operand(startBit), Operand(endBit), Operand(shiftAmount),
true);
RotateInsertSelectBits(dst, src, Operand(startBit), Operand(endBit),
Operand(shiftAmount), true);
} else {
if (rangeEnd > 0) // Don't need to shift if rangeEnd is zero.
ShiftRightP(dst, src, Operand(rangeEnd));
......
test/cctest/test-assembler-s390.cc
View file @ 81e75305
......@@ -197,7 +197,7 @@ TEST(3) {
__ brcl(Condition(14), Operand(-123));
__ iilf(r13, Operand(123456789));
__ iihf(r13, Operand(-123456789));
__ mvc(MemOperand(r0, 123), MemOperand(r4, 567), 89);
__ mvc(MemOperand(r0, 123), MemOperand(r4, 567), Operand(88));
__ sll(r13, Operand(10));
v8::internal::byte* bufPos = assm.buffer_pos();
......
test/cctest/test-disasm-s390.cc
View file @ 81e75305
......@@ -187,9 +187,9 @@ TEST(SixBytes) {
COMPARE(slag(r1, r3, r2), "eb132000000b slag\tr1,r3,0(r2)");
COMPARE(srag(r1, r3, r2), "eb132000000a srag\tr1,r3,0(r2)");
COMPARE(srag(r1, r3, Operand(2)), "eb130002000a srag\tr1,r3,2(r0)");
COMPARE(risbg(r1, r2, Operand(3), Operand(5), Operand(2), false),
COMPARE(risbg(r1, r2, Operand(3), Operand(5), Operand(2)),
"ec1203050255 risbg\tr1,r2,3,5,2");
COMPARE(risbgn(r1, r2, Operand(3), Operand(5), Operand(2), false),
COMPARE(risbgn(r1, r2, Operand(3), Operand(5), Operand(2)),
"ec1203050259 risbgn\tr1,r2,3,5,2");
COMPARE(stmg(r3, r4, MemOperand(sp, 10)),
"eb34f00a0024 stmg\tr3,r4,10(sp)");
......@@ -290,8 +290,8 @@ TEST(SixBytes) {
COMPARE(clg(r9, MemOperand(r6, r7, 19)), "e39670130021 clg\tr9,19(r6,r7)");
COMPARE(bctg(r8, MemOperand(sp, 10)), "e380f00a0046 bctg\tr8,10(sp)");
COMPARE(icy(r2, MemOperand(r3, 2)), "e32030020073 icy\tr2,2(r3)");
COMPARE(mvc(MemOperand(r9, 9), MemOperand(r3, 15), 10),
"d2099009300f mvc\t9(9,r9),15(r3)");
COMPARE(mvc(MemOperand(r9, 9), MemOperand(r3, 15), Operand(10)),
"d20a9009300f mvc\t9(10,r9),15(r3)");
COMPARE(nilf(r0, Operand(8000)), "c00b00001f40 nilf\tr0,8000");
COMPARE(oilf(r9, Operand(1000)), "c09d000003e8 oilf\tr9,1000");
......
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