PPC/S390: [wasm-simd][arm] Prototype i64x2.bitmask

Bug: v8:10997
Change-Id: I432b1a06b6210ef5916fa07781c0bba677a7d51a
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2565244Reviewed-by: Junliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#71508}

src/compiler/backend/ppc/code-generator-ppc.cc

@@ -3398,6 +3398,16 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ xvrspi(i.OutputSimd128Register(), i.InputSimd128Register(0));
       break;
     }
+    case kPPC_I64x2BitMask: {
+      __ mov(kScratchReg,
+             Operand(0x8080808080800040));  // Select 0 for the high bits.
+      __ mtvsrd(kScratchDoubleReg, kScratchReg);
+      __ vbpermq(kScratchDoubleReg, i.InputSimd128Register(0),
+                 kScratchDoubleReg);
+      __ vextractub(kScratchDoubleReg, kScratchDoubleReg, Operand(6));
+      __ mfvsrd(i.OutputRegister(), kScratchDoubleReg);
+      break;
+    }
     case kPPC_I32x4BitMask: {
       __ mov(kScratchReg,
              Operand(0x8080808000204060));  // Select 0 for the high bits.

src/compiler/backend/ppc/instruction-codes-ppc.h

@@ -263,6 +263,7 @@ namespace compiler {
   V(PPC_I64x2ShrS)                   \
   V(PPC_I64x2ShrU)                   \
   V(PPC_I64x2Neg)                    \
+  V(PPC_I64x2BitMask)                \
   V(PPC_I32x4Splat)                  \
   V(PPC_I32x4ExtractLane)            \
   V(PPC_I32x4ReplaceLane)            \

src/compiler/backend/ppc/instruction-scheduler-ppc.cc

@@ -188,6 +188,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kPPC_I64x2ShrS:
     case kPPC_I64x2ShrU:
     case kPPC_I64x2Neg:
+    case kPPC_I64x2BitMask:
     case kPPC_I32x4Splat:
     case kPPC_I32x4ExtractLane:
     case kPPC_I32x4ReplaceLane:

src/compiler/backend/s390/code-generator-s390.cc

@@ -4225,6 +4225,21 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
 #endif
       break;
     }
+    case kS390_I64x2BitMask: {
+#ifdef V8_TARGET_BIG_ENDIAN
+      __ lgfi(kScratchReg, Operand(0x80800040));
+      __ iihf(kScratchReg, Operand(0x80808080));  // Zeroing the high bits.
+#else
+      __ lgfi(kScratchReg, Operand(0x80808080));
+      __ iihf(kScratchReg, Operand(0x40008080));
+#endif
+      __ vlvg(kScratchDoubleReg, kScratchReg, MemOperand(r0, 1), Condition(3));
+      __ vbperm(kScratchDoubleReg, i.InputSimd128Register(0), kScratchDoubleReg,
+                Condition(0), Condition(0), Condition(0));
+      __ vlgv(i.OutputRegister(), kScratchDoubleReg, MemOperand(r0, 7),
+              Condition(0));
+      break;
+    }
     case kS390_I32x4BitMask: {
 #ifdef V8_TARGET_BIG_ENDIAN
       __ lgfi(kScratchReg, Operand(0x204060));

src/compiler/backend/s390/instruction-codes-s390.h

@@ -261,6 +261,7 @@ namespace compiler {
   V(S390_I64x2ReplaceLane)                  \
   V(S390_I64x2ExtractLane)                  \
   V(S390_I64x2Eq)                           \
+  V(S390_I64x2BitMask)                      \
   V(S390_I32x4Splat)                        \
   V(S390_I32x4ExtractLane)                  \
   V(S390_I32x4ReplaceLane)                  \

src/compiler/backend/s390/instruction-scheduler-s390.cc

@@ -207,6 +207,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kS390_I64x2ReplaceLane:
     case kS390_I64x2ExtractLane:
     case kS390_I64x2Eq:
+    case kS390_I64x2BitMask:
     case kS390_I32x4Splat:
     case kS390_I32x4ExtractLane:
     case kS390_I32x4ReplaceLane: