- 18 Oct, 2017 1 commit
-
-
Clemens Hammacher authored
This CL fixes all occurences that don't require special OWNER reviews, or can be reviewed by Michi. After this one, we should be able to reenable the readability/check cpplint check. R=mstarzinger@chromium.org Bug: v8:6837, v8:6921 Cq-Include-Trybots: master.tryserver.chromium.linux:linux_chromium_rel_ng;master.tryserver.v8:v8_linux_noi18n_rel_ng Change-Id: Ic81d68d5534eaa795b7197fed5c41ed158361d62 Reviewed-on: https://chromium-review.googlesource.com/721120 Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Reviewed-by: Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#48670}
-
- 13 Oct, 2017 2 commits
-
-
Mathias Bynens authored
New code should use nullptr instead of NULL. This patch updates existing use of NULL to nullptr where applicable, making the code base more consistent. BUG=v8:6928,v8:6921 Cq-Include-Trybots: master.tryserver.chromium.linux:linux_chromium_rel_ng;master.tryserver.v8:v8_linux_noi18n_rel_ng Change-Id: I4687f5b96fcfd88b41fa970a2b937b4f6538777c Reviewed-on: https://chromium-review.googlesource.com/718338 Commit-Queue: Mathias Bynens <mathias@chromium.org> Reviewed-by: Andreas Haas <ahaas@chromium.org> Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> Reviewed-by: Ulan Degenbaev <ulan@chromium.org> Reviewed-by: Toon Verwaest <verwaest@chromium.org> Reviewed-by: Jakob Gruber <jgruber@chromium.org> Reviewed-by: Yang Guo <yangguo@chromium.org> Cr-Commit-Position: refs/heads/master@{#48557}
-
Toon Verwaest authored
Bug: v8:6921 Change-Id: I82e0d29aba237dff22dd8dfa80ddecd7fd724df3 Reviewed-on: https://chromium-review.googlesource.com/718421Reviewed-by: Camillo Bruni <cbruni@chromium.org> Commit-Queue: Toon Verwaest <verwaest@chromium.org> Cr-Commit-Position: refs/heads/master@{#48539}
-
- 14 Sep, 2017 1 commit
-
-
Jaideep Bajwa authored
Port bc69f345 R=mstarzinger@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com BUG= LOG=N Change-Id: I88f0167a43fb7eb7967169a84466de3aedf00125 Reviewed-on: https://chromium-review.googlesource.com/666299 Commit-Queue: Jaideep Bajwa <bjaideep@ca.ibm.com> Reviewed-by: Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#48014}
-
- 09 Sep, 2017 1 commit
-
-
Anisha Rohra authored
Port 9e995e12 Port 408f252b Up to now, each architecture defined all Register types as structs, with lots of redundancy. An often found comment noted that they cannot be classes due to initialization order problems. As these problems are gone with C++11 constexpr constants, I now tried making Registers classes again. All register types now inherit from RegisterBase, which provides a default set of methods and named constructors (like ::from_code, code(), bit(), is_valid(), ...). This design allows to guarantee an interesting property: Each register is either valid, or it's the no_reg register. There are no other invalid registers. This is guaranteed statically by the constexpr constructor, and dynamically by ::from_code. I decided to disallow the default constructor completely, so instead of "Register reg;" you now need "Register reg = no_reg;". This makes explicit how the Register is initialized. I did this change to the x64, ia32, arm, arm64, mips and mips64 ports. Overall, code got much more compact and more safe. In theory, it should also increase performance (since the is_valid() check is simpler), but this is probably not measurable. R=bjaideep@ca.ibm.com, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com BUG= LOG=N Change-Id: I2e87efc8790290c64fd6c0a2d093326710b30ed3 Reviewed-on: https://chromium-review.googlesource.com/658065Reviewed-by: Jaideep Bajwa <bjaideep@ca.ibm.com> Commit-Queue: Jaideep Bajwa <bjaideep@ca.ibm.com> Cr-Commit-Position: refs/heads/master@{#47933}
-
- 07 Sep, 2017 1 commit
-
-
Peter Marshall authored
Bug: v8:6333 Change-Id: Ibc704172ebc796977b8d8cfae6976666d186f12c Reviewed-on: https://chromium-review.googlesource.com/652450 Commit-Queue: Peter Marshall <petermarshall@chromium.org> Reviewed-by: Yang Guo <yangguo@chromium.org> Cr-Commit-Position: refs/heads/master@{#47890}
-
- 16 Aug, 2017 1 commit
-
-
Yang Guo authored
This removes: - CodeBreakIterator for FCG code. - RelocModes for debug breaks. - Code generator for debug break slots. - GC support for debug break slots. - Code flag to indicate code with debug break slots. - Builtin type DBG. - Mechanisms to replace FCG code in the debugger and LiveEdit. - Runtime entry to the debugger from debug break slots. R=bmeurer@chromium.org, rmcilroy@chromium.org, ulan@chromium.org Bug: v8:6409 Change-Id: I5662c8800e3ef1b1584ad107bfe0aae26c9d8abb Reviewed-on: https://chromium-review.googlesource.com/613263Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> Reviewed-by: Ulan Degenbaev <ulan@chromium.org> Reviewed-by: Ross McIlroy <rmcilroy@chromium.org> Commit-Queue: Yang Guo <yangguo@chromium.org> Cr-Commit-Position: refs/heads/master@{#47364}
-
- 01 Aug, 2017 1 commit
-
-
Ben L. Titzer authored
Register configuration data is not the same as frame configuration data. This CL moves the last remnants of register configuration into the assembler files, to be with the other register configuration macros. Next step: extract this register configuration data into platform-specific files that can be included independent of the assembler. R=mstarzinger@chromium.org Bug: Change-Id: I10933b5090be94e90e2a1442197528dfe30bb566 Reviewed-on: https://chromium-review.googlesource.com/595590 Commit-Queue: Ben Titzer <titzer@chromium.org> Reviewed-by: Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#47044}
-
- 26 Jul, 2017 1 commit
-
-
Jaideep Bajwa authored
Port dfdcaf43 Port 2e1f5567 Original Commit Message: This CL introduces TurboAssembler, a super-class of Assembler and sub-class of MacroAssembler. TurboAssembler contains all the functionality that is used by Turbofan and previously was part of MacroAssembler. TurboAssembler has access to the isolate but, in contrast to MacroAssembler, does not expect to be running on the main thread. R=neis@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com BUG=v8:6048 LOG=N Change-Id: I3f51771afefe46410db7cda2625472d78c87f8c6 Reviewed-on: https://chromium-review.googlesource.com/583584Reviewed-by: Georg Neis <neis@chromium.org> Commit-Queue: Jaideep Bajwa <bjaideep@ca.ibm.com> Cr-Commit-Position: refs/heads/master@{#46900}
-
- 24 Jul, 2017 2 commits
-
-
Jaideep Bajwa authored
Port 9b3174b2 Original Commit Message: Remove all IsHeapObject/IsSmi checks from assembler and also from the macro-assembler functions that Turbofan code generation uses. Note for porters: In case it's unclear which macro-assembler functions need to be modified, it may be best to wait until I split MacroAssembler in a followup-CL, which will make that clear. R=neis@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com BUG=v8:6048 LOG=N Change-Id: Ic24c7145fa9c3d44d0359e93583eb5ddf0bcf5a8 Reviewed-on: https://chromium-review.googlesource.com/581796 Commit-Queue: Jaideep Bajwa <bjaideep@ca.ibm.com> Reviewed-by: Georg Neis <neis@chromium.org> Cr-Commit-Position: refs/heads/master@{#46845}
-
Jaideep Bajwa authored
Port 040fa06f Port 659e8f7b R=neis@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com BUG=v8:6048 LOG=N Change-Id: Id3030a64d462344eb8612f8009b0c8e15a5edcb9 Reviewed-on: https://chromium-review.googlesource.com/581744Reviewed-by: Georg Neis <neis@chromium.org> Commit-Queue: Jaideep Bajwa <bjaideep@ca.ibm.com> Cr-Commit-Position: refs/heads/master@{#46843}
-
- 29 Jun, 2017 1 commit
-
-
Jaideep Bajwa authored
Port 040fa06f R=neis@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com BUG=v8:6048 LOG=N Change-Id: I842cf54de1ef33dbcaf95824db15d87e9f68eb22 Reviewed-on: https://chromium-review.googlesource.com/555330Reviewed-by: Junliang Yan <jyan@ca.ibm.com> Commit-Queue: Jaideep Bajwa <bjaideep@ca.ibm.com> Cr-Commit-Position: refs/heads/master@{#46326}
-
- 23 Jun, 2017 1 commit
-
-
sampsong authored
Port a42473ab Original Commit Message: These are no longer being used. R=mvstanton@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, bjaideep@ca.ibm.com, michael_dawson@ca.ibm.com BUG=v8:6408 LOG=N Review-Url: https://codereview.chromium.org/2949103005 Cr-Commit-Position: refs/heads/master@{#46192}
-
- 08 Jun, 2017 1 commit
-
-
sampsong authored
Port 659e8f7b Original Commit Message: Instead of allocating and embedding certain heap numbers into the code during code assembly, emit dummies but record the allocation requests. Later then, in Assembler::GetCode, allocate the heap numbers and patch the code by replacing the dummies with the actual objects. The RelocInfos for the embedded objects are already recorded correctly when emitting the dummies. R=neis@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, bjaideep@ca.ibm.com, michael_dawson@ca.ibm.com BUG=v8:6048 LOG=N Review-Url: https://codereview.chromium.org/2929843002 Cr-Commit-Position: refs/heads/master@{#45793}
-
- 28 Apr, 2017 1 commit
-
-
hpayer authored
BUG=chromium:716032 Review-Url: https://codereview.chromium.org/2842303003 Cr-Commit-Position: refs/heads/master@{#44975}
-
- 17 Mar, 2017 1 commit
-
-
neis authored
This is a first step towards moving Turbofan code generation off the main thread. Summary of the changes: - AssemblerBase no longer has a pointer to the isolate. Instead, its constructor receives the few things that it needs from the isolate (on most architectures this is just the serializer_enabled flag). - RelocInfo no longer has a pointer to the isolate. Instead, the functions that need it take it as an argument. (There are currently still a few that implicitly access the isolate through a HeapObject.) - The MacroAssembler now explicitly holds a pointer to the isolate (before, it used to get it from the Assembler). - The jit_cookie also moved from AssemblerBase to the MacroAssemblers, since it's not used at all in the Assemblers. - A few architectures implemented parts of the Assembler with the help of a Codepatcher that is based on MacroAssembler. Since the Assembler no longer has the isolate, but the MacroAssembler still needs it, this doesn't work anymore. Instead, these Assemblers now use a new PatchingAssembler. BUG=v8:6048 Review-Url: https://codereview.chromium.org/2732273003 Cr-Commit-Position: refs/heads/master@{#43890}
-
- 10 Mar, 2017 1 commit
-
-
jyan authored
R=joransiu@ca.ibm.com, bjaideep@ca.ibm.com BUG= Review-Url: https://codereview.chromium.org/2743803002 Cr-Commit-Position: refs/heads/master@{#43728}
-
- 08 Mar, 2017 1 commit
-
-
bjaideep authored
Port e82b7ccd Original Commit Message: I originally needed this for the initialization of a constexpr array in the wasm lazy compile builtin, but since it's a bigger change, I now split it off as this separate CL. The style guide recommends constexpr over const. I thus apply the constexprificaton over all headers that I touched anyway. I also remove the ARM64_DEFINE_REG_STATICS hack. It was introduced when merging in arm64 support more than three years ago, and I don't see the purpose for this. Also, some #defines can now be constexpr definitions, which was not possible before according to the comment. R=clemensh@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com BUG= LOG=N Review-Url: https://codereview.chromium.org/2733323003 Cr-Commit-Position: refs/heads/master@{#43678}
-
- 01 Mar, 2017 1 commit
-
-
jyan authored
R=joransiu@ca.ibm.com, bjaideep@ca.ibm.com Review-Url: https://codereview.chromium.org/2722313003 Cr-Commit-Position: refs/heads/master@{#43527}
-
- 21 Feb, 2017 1 commit
-
-
bbudge authored
- Adds new machine types SimdBool4/8/16 for the different boolean vector types. - Adds a kSimdMaskRegisters flag for each platform. These are all false for now. - Removes Create, ExtractLane, ReplaceLane, Equal, NotEqual, Swizzle and Shuffle opcodes from the Boolean types. These are unlikely to be well supported natively, and can be synthesized using Select. - Changes the signature of Relational opcodes to return boolean vectors. - Changes the signature of Select opcodes to take boolean vectors. - Updates the ARM implementation of Relational and Select opcodes. LOG=N BUG=v8:4124 Review-Url: https://codereview.chromium.org/2700813002 Cr-Commit-Position: refs/heads/master@{#43348}
-
- 17 Feb, 2017 1 commit
-
-
jyan authored
1. use ltr/ltgr when possible 2. combine compares with possible load R=joransiu@ca.ibm.com, bjaideep@ca.ibm.com Review-Url: https://codereview.chromium.org/2696343002 Cr-Commit-Position: refs/heads/master@{#43265}
-
- 13 Feb, 2017 1 commit
-
-
jyan authored
R=joransiu@ca.ibm.com, bjaideep@ca.ibm.com, danno@chromium.org, bmeurer@chromium.org BUG= Review-Url: https://codereview.chromium.org/2691893002 Cr-Commit-Position: refs/heads/master@{#43166}
-
- 09 Feb, 2017 2 commits
-
-
bjaideep authored
Port e425079b Minor fix to the s390 port. Original Commit Message: arguments.h is one of the headers including objects-inl.h. Files needing objects-inl.h used to innocently pull in debug.h, so that needs to be fixed now too. R=marja@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com BUG=v8:5294 LOG=N Review-Url: https://codereview.chromium.org/2687103002 Cr-Commit-Position: refs/heads/master@{#43073}
-
Marja Hölttä authored
arguments.h is one of the headers including objects-inl.h. Files needing objects-inl.h used to innocently pull in debug.h, so that needs to be fixed now too. BUG=v8:5294 R=mstarzinger@chromium.org Change-Id: I8ce671c533ed757103ef9a3b0bf0a0509230fdd8 Reviewed-on: https://chromium-review.googlesource.com/439287Reviewed-by: Yang Guo <yangguo@chromium.org> Reviewed-by: Michael Starzinger <mstarzinger@chromium.org> Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> Commit-Queue: Marja Hölttä <marja@chromium.org> Cr-Commit-Position: refs/heads/master@{#43054}
-
- 08 Feb, 2017 1 commit
-
-
sampsong authored
BUG= R=jyan@ca.ibm.com, joransiu@ca.ibm.com, bjaideep@ca.ibm.com Review-Url: https://codereview.chromium.org/2685733002 Cr-Commit-Position: refs/heads/master@{#43042}
-
- 03 Feb, 2017 1 commit
-
-
sampsong authored
BUG= R=jyan@ca.ibm.com, joransiu@ca.ibm.com, bjaideep@ca.ibm.com Review-Url: https://codereview.chromium.org/2667353005 Cr-Commit-Position: refs/heads/master@{#42933}
-
- 25 Jan, 2017 1 commit
-
-
jyan authored
List of items: 1. Avoid zero-extending for subsequent 32-bit operations if current operation does not change upper 32-bit or does zero-extending. 2. Match complex address mode for binary operation where possible (eg. use Add R,MEM). 3. Detect instruction forms in selector. Eg. kAllowRRR, kAllowRM 4. Optimize sequence for Int32MulWithOverflow, Int32Div, etc. 5. Remove Not32/Not64 which is the same as XOR R=bjaideep@ca.ibm.com, joransiu@ca.ibm.com BUG= Review-Url: https://codereview.chromium.org/2649113007 Cr-Commit-Position: refs/heads/master@{#42669}
-
- 22 Dec, 2016 1 commit
-
-
joransiu authored
Improve the S390 allocate sequence by: - Keeping allocation limit in memory, and leverage compare RX-instr. - Prefetching subsequent cache lines from allocation top. - Optimizing object tagging with LA - Optimizing increment for Fast-Allocate with ASI/AGSI R=jyan@ca.ibm.com, michael_dawson@ca.ibm.com, bjaideep@ca.ibm.com BUG= Review-Url: https://codereview.chromium.org/2601563002 Cr-Commit-Position: refs/heads/master@{#41933}
-
- 20 Dec, 2016 1 commit
-
-
jyan authored
R=joransiu@ca.ibm.com, bjaideep@ca.ibm.com BUG= Review-Url: https://codereview.chromium.org/2589063002 Cr-Commit-Position: refs/heads/master@{#41864}
-
- 19 Dec, 2016 1 commit
-
-
jyan authored
Cleanup s390 opcode table and add z13 new opcodes R=joransiu@ca.ibm.com, bjaideep@ca.ibm.com BUG= Review-Url: https://codereview.chromium.org/2586503003 Cr-Commit-Position: refs/heads/master@{#41820}
-
- 16 Dec, 2016 1 commit
-
-
jyan authored
Add vfa/vfs/vfm/vfd support on s390 R=joransiu@ca.ibm.com, bjaideep@ca.ibm.com, danno@chromium.org, jkummerow@chromium.org, jochen@chromium.org BUG= Review-Url: https://codereview.chromium.org/2582683002 Cr-Commit-Position: refs/heads/master@{#41741}
-
- 24 Nov, 2016 1 commit
-
-
jyan authored
BUG= R=joransiu@ca.ibm.com, michael_dawson@ca.ibm.com, bjaideep@ca.ibm.com Review-Url: https://codereview.chromium.org/2522283003 Cr-Commit-Position: refs/heads/master@{#41238}
-
- 22 Nov, 2016 1 commit
-
-
neis authored
TBR=littledan@chromium.org BUG= Review-Url: https://codereview.chromium.org/2517143003 Cr-Commit-Position: refs/heads/master@{#41180}
-
- 14 Nov, 2016 1 commit
-
-
tebbi authored
This CL enables precise source positions for all V8 compilers. It merges compiler::SourcePosition and internal::SourcePosition to a single class used throughout the codebase. The new internal::SourcePosition instances store an id identifying an inlined function in addition to a script offset. SourcePosition::InliningId() refers to a the new table DeoptimizationInputData::InliningPositions(), which provides the following data for every inlining id: - The inlined SharedFunctionInfo as an offset into DeoptimizationInfo::LiteralArray - The SourcePosition of the inlining. Recursively, this yields the full inlining stack. Before the Code object is created, the same information can be found in CompilationInfo::inlined_functions(). If SourcePosition::InliningId() is SourcePosition::kNotInlined, it refers to the outer (non-inlined) function. So every SourcePosition has full information about its inlining stack, as long as the corresponding Code object is known. The internal represenation of a source position is a positive 64bit integer. All compilers create now appropriate source positions for inlined functions. In the case of Turbofan, this required using AstGraphBuilderWithPositions for inlined functions too. So this class is now moved to a header file. At the moment, the additional information in source positions is only used in --trace-deopt and --code-comments. The profiler needs to be updated, at the moment it gets the correct script offsets from the deopt info, but the wrong script id from the reconstructed deopt stack, which can lead to wrong outputs. This should be resolved by making the profiler use the new inlining information for deopts. I activated the inlined deoptimization tests in test-cpu-profiler.cc for Turbofan, changing them to a case where the deopt stack and the inlining position agree. It is currently still broken for other cases. The following additional changes were necessary: - The source position table (internal::SourcePositionTableBuilder etc.) supports now 64bit source positions. Encoding source positions in a single 64bit int together with the difference encoding in the source position table results in very little overhead for the inlining id, since only 12% of the source positions in Octane have a changed inlining id. - The class HPositionInfo was effectively dead code and is now removed. - SourcePosition has new printing and information facilities, including computing a full inlining stack. - I had to rename compiler/source-position.{h,cc} to compiler/compiler-source-position-table.{h,cc} to avoid clashes with the new src/source-position.cc file. - I wrote the new wrapper PodArray for ByteArray. It is a template working with any POD-type. This is used in DeoptimizationInputData::InliningPositions(). - I removed HInlinedFunctionInfo and HGraph::inlined_function_infos, because they were only used for the now obsolete Crankshaft inlining ids. - Crankshaft managed a list of inlined functions in Lithium: LChunk::inlined_functions. This is an analog structure to CompilationInfo::inlined_functions. So I removed LChunk::inlined_functions and made Crankshaft use CompilationInfo::inlined_functions instead, because this was necessary to register the offsets into the literal array in a uniform way. This is a safe change because LChunk::inlined_functions has no other uses and the functions in CompilationInfo::inlined_functions have a strictly longer lifespan, being created earlier (in Hydrogen already). BUG=v8:5432 Review-Url: https://codereview.chromium.org/2451853002 Cr-Commit-Position: refs/heads/master@{#40975}
-
- 22 Aug, 2016 1 commit
-
-
jyan authored
R=joransiu@ca.ibm.com, bjaideep@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com BUG= Review-Url: https://codereview.chromium.org/2265073003 Cr-Commit-Position: refs/heads/master@{#38801}
-
- 15 Aug, 2016 1 commit
-
-
jyan authored
R=joransiu@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com, bjaideep@ca.ibm.com BUG= Review-Url: https://codereview.chromium.org/2244373002 Cr-Commit-Position: refs/heads/master@{#38640}
-
- 09 Aug, 2016 1 commit
-
-
bjaideep authored
Implemented instruction selector functions VisitFloat32Neg/VisitFloat64Neg for s390 and ppc. For s390 implemented instruction lcebr to load complement for floatregisters. R=joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com BUG= LOG=N Review-Url: https://codereview.chromium.org/2226103002 Cr-Commit-Position: refs/heads/master@{#38466}
-
- 08 Aug, 2016 1 commit
-
-
jyan authored
1. Decouple kS390_Add/Sub/Neg to kS390_Add32/Sub32/Neg32/Add64/Sub64/Neg64 2. Nuke kS390_Add/SubWithOverflow32 3. Add Support for Load-On-Condition to optimize AssembleArchBoolean R=joransiu@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com, bjaideep@ca.ibm.com BUG= Review-Url: https://codereview.chromium.org/2220313002 Cr-Commit-Position: refs/heads/master@{#38443}
-
- 29 Jul, 2016 1 commit
-
-
jyan authored
This commit fixes wasm little-endian load issue on big-endian platform by introducing reverse byte operation immediately after a load. R=bmeurer@chromium.org, titzer@chromium.org BUG= Review-Url: https://codereview.chromium.org/2045943002 Cr-Commit-Position: refs/heads/master@{#38183}
-
- 19 Jul, 2016 1 commit
-
-
jyan authored
Should use the same Mask code as float32 to int32 R=joransiu@ca.ibm.com, michael_dawson@ca.ibm.com, bjaideep@ca.ibm.com BUG= Review-Url: https://codereview.chromium.org/2160573003 Cr-Commit-Position: refs/heads/master@{#37871}
-