s390: clean up RR/RRE/RRD/RIL format in Assembler

R=joransiu@ca.ibm.com, bjaideep@ca.ibm.com
BUG=

Review-Url: https://codereview.chromium.org/2589063002
Cr-Commit-Position: refs/heads/master@{#41864}

src/full-codegen/s390/full-codegen-s390.cc

@@ -2724,11 +2724,11 @@ void FullCodeGenerator::PushFunctionArgumentForContextAllocation() {
 #if V8_TARGET_ARCH_S390X
 static const FourByteInstr kInterruptBranchInstruction = 0xA7A40011;
 static const FourByteInstr kOSRBranchInstruction = 0xA7040011;
-static const int16_t kBackEdgeBranchOffset = 0x11 * 2;
+static const int16_t kBackEdgeBranchOffsetInHalfWords = 0x11;
 #else
 static const FourByteInstr kInterruptBranchInstruction = 0xA7A4000D;
 static const FourByteInstr kOSRBranchInstruction = 0xA704000D;
-static const int16_t kBackEdgeBranchOffset = 0xD * 2;
+static const int16_t kBackEdgeBranchOffsetInHalfWords = 0xD;
 #endif
 
 void BackEdgeTable::PatchAt(Code* unoptimized_code, Address pc,
@@ -2746,7 +2746,7 @@ void BackEdgeTable::PatchAt(Code* unoptimized_code, Address pc,
       //         brasrl    r14, <interrupt stub address>
       //  <reset profiling counter>
       //  ok-label
-      patcher.masm()->brc(ge, Operand(kBackEdgeBranchOffset));
+      patcher.masm()->brc(ge, Operand(kBackEdgeBranchOffsetInHalfWords));
       break;
     }
     case ON_STACK_REPLACEMENT:
@@ -2755,7 +2755,7 @@ void BackEdgeTable::PatchAt(Code* unoptimized_code, Address pc,
       //         brasrl    r14, <interrupt stub address>
       //  <reset profiling counter>
       //  ok-label ----- pc_after points here
-      patcher.masm()->brc(CC_NOP, Operand(kBackEdgeBranchOffset));
+      patcher.masm()->brc(CC_NOP, Operand(kBackEdgeBranchOffsetInHalfWords));
       break;
   }
 

src/ic/s390/ic-s390.cc

@@ -358,13 +358,13 @@ void PatchInlinedSmiCode(Isolate* isolate, Address address,
     cc = static_cast<Condition>((branch_instr & 0x00f00000) >> 20);
     DCHECK((cc == ne) || (cc == eq));
     cc = (cc == ne) ? eq : ne;
-    patcher.masm()->brc(cc, Operand((branch_instr & 0xffff) << 1));
+    patcher.masm()->brc(cc, Operand(branch_instr & 0xffff));
   } else if (Instruction::S390OpcodeValue(branch_address) == BRCL) {
     cc = static_cast<Condition>(
         (branch_instr & (static_cast<uint64_t>(0x00f0) << 32)) >> 36);
     DCHECK((cc == ne) || (cc == eq));
     cc = (cc == ne) ? eq : ne;
-    patcher.masm()->brcl(cc, Operand((branch_instr & 0xffffffff) << 1));
+    patcher.masm()->brcl(cc, Operand(branch_instr & 0xffffffff));
   } else {
     DCHECK(false);
   }

src/s390/constants-s390.h

@@ -1542,13 +1542,13 @@ typedef uint64_t SixByteInstr;
   V(lcr, LCR, 0x13)     /* type = RR    LOAD COMPLEMENT (32)  */               \
   V(nr, NR, 0x14)       /* type = RR    AND (32)  */                           \
   V(clr, CLR, 0x15)     /* type = RR    COMPARE LOGICAL (32)  */               \
-  V(or, OR, 0x16)       /* type = RR    OR (32)  */                            \
+  V(or_z, OR, 0x16)     /* type = RR    OR (32)  */                            \
   V(xr, XR, 0x17)       /* type = RR    EXCLUSIVE OR (32)  */                  \
   V(lr, LR, 0x18)       /* type = RR    LOAD (32)  */                          \
-  V(cr, CR, 0x19)       /* type = RR    COMPARE (32)  */                       \
+  V(cr_z, CR, 0x19)     /* type = RR    COMPARE (32)  */                       \
   V(ar, AR, 0x1A)       /* type = RR    ADD (32)  */                           \
   V(sr, SR, 0x1B)       /* type = RR    SUBTRACT (32)  */                      \
-  V(mr, MR, 0x1C)       /* type = RR    MULTIPLY (64<-32)  */                  \
+  V(mr_z, MR, 0x1C)     /* type = RR    MULTIPLY (64<-32)  */                  \
   V(dr, DR, 0x1D)       /* type = RR    DIVIDE (32<-64)  */                    \
   V(alr, ALR, 0x1E)     /* type = RR    ADD LOGICAL (32)  */                   \
   V(slr, SLR, 0x1F)     /* type = RR    SUBTRACT LOGICAL (32)  */              \

test/cctest/test-assembler-s390.cc

@@ -194,8 +194,8 @@ TEST(3) {
   __ ay(r13, MemOperand(r1, r2, 123));
   __ brc(Condition(14), Operand(123));
   __ brc(Condition(14), Operand(-123));
-  __ brcl(Condition(14), Operand(123), false);
-  __ brcl(Condition(14), Operand(-123), false);
+  __ brcl(Condition(14), Operand(123));
+  __ brcl(Condition(14), Operand(-123));
   __ iilf(r13, Operand(123456789));
   __ iihf(r13, Operand(-123456789));
   __ mvc(MemOperand(r0, 123), MemOperand(r4, 567), 89);