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Commit e82b7ccd authored by Clemens Hammacher's avatar Clemens Hammacher Committed by Commit Bot
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[assembler] Make register definitions constexpr 

I originally needed this for the initialization of a constexpr array in
the wasm lazy compile builtin, but since it's a bigger change, I now
split it off as this separate CL.
The style guide recommends constexpr over const. I thus apply the
constexprificaton over all headers that I touched anyway.

I also remove the ARM64_DEFINE_REG_STATICS hack. It was introduced when
merging in arm64 support more than three years ago, and I don't see the
purpose for this.
Also, some #defines can now be constexpr definitions, which was not
possible before according to the comment.

R=bmeurer@chromium.org, mstarzinger@chromium.org, ishell@chromium.org

Change-Id: I6d743b4462c347d363f99e28007bc9e8c84ae617
Reviewed-on: https://chromium-review.googlesource.com/451277Reviewed-by: 's avatarMichael Starzinger <mstarzinger@chromium.org>
Reviewed-by: 's avatarIgor Sheludko <ishell@chromium.org>
Reviewed-by: 's avatarBenedikt Meurer <bmeurer@chromium.org>
Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
Cr-Commit-Position: refs/heads/master@{#43637}
parent 8038f1bd
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Showing with 438 additions and 503 deletions
src/arm/assembler-arm.h
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src/arm64/assembler-arm64.cc
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......@@ -28,7 +28,6 @@
#if V8_TARGET_ARCH_ARM64
#define ARM64_DEFINE_REG_STATICS
#include "src/arm64/assembler-arm64.h"
#include "src/arm64/assembler-arm64-inl.h"
......
src/arm64/assembler-arm64.h
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src/ia32/assembler-ia32.h
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......@@ -116,7 +116,7 @@ struct Register {
kCode_no_reg = -1
};
static const int kNumRegisters = Code::kAfterLast;
static constexpr int kNumRegisters = Code::kAfterLast;
static Register from_code(int code) {
DCHECK(code >= 0);
......@@ -141,14 +141,13 @@ struct Register {
int reg_code;
};
#define DEFINE_REGISTER(R) constexpr Register R = {Register::kCode_##R};
GENERAL_REGISTERS(DEFINE_REGISTER)
#undef DEFINE_REGISTER
constexpr Register no_reg = {Register::kCode_no_reg};
#define DECLARE_REGISTER(R) const Register R = {Register::kCode_##R};
GENERAL_REGISTERS(DECLARE_REGISTER)
#undef DECLARE_REGISTER
const Register no_reg = {Register::kCode_no_reg};
static const bool kSimpleFPAliasing = true;
static const bool kSimdMaskRegisters = false;
constexpr bool kSimpleFPAliasing = true;
constexpr bool kSimdMaskRegisters = false;
struct XMMRegister {
enum Code {
......@@ -159,7 +158,7 @@ struct XMMRegister {
kCode_no_reg = -1
};
static const int kMaxNumRegisters = Code::kAfterLast;
static constexpr int kMaxNumRegisters = Code::kAfterLast;
static XMMRegister from_code(int code) {
XMMRegister result = {code};
......@@ -184,11 +183,11 @@ typedef XMMRegister DoubleRegister;
typedef XMMRegister Simd128Register;
#define DECLARE_REGISTER(R) \
const DoubleRegister R = {DoubleRegister::kCode_##R};
DOUBLE_REGISTERS(DECLARE_REGISTER)
#undef DECLARE_REGISTER
const DoubleRegister no_double_reg = {DoubleRegister::kCode_no_reg};
#define DEFINE_REGISTER(R) \
constexpr DoubleRegister R = {DoubleRegister::kCode_##R};
DOUBLE_REGISTERS(DEFINE_REGISTER)
#undef DEFINE_REGISTER
constexpr DoubleRegister no_double_reg = {DoubleRegister::kCode_no_reg};
enum Condition {
// any value < 0 is considered no_condition
......@@ -469,7 +468,7 @@ class Assembler : public AssemblerBase {
// (There is a 15 byte limit on ia32 instruction length that rules out some
// otherwise valid instructions.)
// This allows for a single, fast space check per instruction.
static const int kGap = 32;
static constexpr int kGap = 32;
public:
// Create an assembler. Instructions and relocation information are emitted
......@@ -521,35 +520,34 @@ class Assembler : public AssemblerBase {
Isolate* isolate, Address pc, Address target,
RelocInfo::Mode mode = RelocInfo::INTERNAL_REFERENCE);
static const int kSpecialTargetSize = kPointerSize;
static constexpr int kSpecialTargetSize = kPointerSize;
// Distance between the address of the code target in the call instruction
// and the return address
static const int kCallTargetAddressOffset = kPointerSize;
static constexpr int kCallTargetAddressOffset = kPointerSize;
static const int kCallInstructionLength = 5;
static constexpr int kCallInstructionLength = 5;
// The debug break slot must be able to contain a call instruction.
static const int kDebugBreakSlotLength = kCallInstructionLength;
static constexpr int kDebugBreakSlotLength = kCallInstructionLength;
// Distance between start of patched debug break slot and the emitted address
// to jump to.
static const int kPatchDebugBreakSlotAddressOffset = 1; // JMP imm32.
static constexpr int kPatchDebugBreakSlotAddressOffset = 1; // JMP imm32.
// One byte opcode for test al, 0xXX.
static const byte kTestAlByte = 0xA8;
static constexpr byte kTestAlByte = 0xA8;
// One byte opcode for nop.
static const byte kNopByte = 0x90;
static constexpr byte kNopByte = 0x90;
// One byte opcode for a short unconditional jump.
static const byte kJmpShortOpcode = 0xEB;
static constexpr byte kJmpShortOpcode = 0xEB;
// One byte prefix for a short conditional jump.
static const byte kJccShortPrefix = 0x70;
static const byte kJncShortOpcode = kJccShortPrefix | not_carry;
static const byte kJcShortOpcode = kJccShortPrefix | carry;
static const byte kJnzShortOpcode = kJccShortPrefix | not_zero;
static const byte kJzShortOpcode = kJccShortPrefix | zero;
static constexpr byte kJccShortPrefix = 0x70;
static constexpr byte kJncShortOpcode = kJccShortPrefix | not_carry;
static constexpr byte kJcShortOpcode = kJccShortPrefix | carry;
static constexpr byte kJnzShortOpcode = kJccShortPrefix | not_zero;
static constexpr byte kJzShortOpcode = kJccShortPrefix | zero;
// ---------------------------------------------------------------------------
// Code generation
......@@ -1466,7 +1464,7 @@ class Assembler : public AssemblerBase {
}
// Avoid overflows for displacements etc.
static const int kMaximalBufferSize = 512*MB;
static constexpr int kMaximalBufferSize = 512 * MB;
byte byte_at(int pos) { return buffer_[pos]; }
void set_byte_at(int pos, byte value) { buffer_[pos] = value; }
......
src/mips/assembler-mips.h
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This diff is collapsed.
src/mips/macro-assembler-mips.h
View file @ e82b7ccd
......@@ -13,20 +13,20 @@ namespace v8 {
namespace internal {
// Give alias names to registers for calling conventions.
const Register kReturnRegister0 = {Register::kCode_v0};
const Register kReturnRegister1 = {Register::kCode_v1};
const Register kReturnRegister2 = {Register::kCode_a0};
const Register kJSFunctionRegister = {Register::kCode_a1};
const Register kContextRegister = {Register::kCpRegister};
const Register kAllocateSizeRegister = {Register::kCode_a0};
const Register kInterpreterAccumulatorRegister = {Register::kCode_v0};
const Register kInterpreterBytecodeOffsetRegister = {Register::kCode_t4};
const Register kInterpreterBytecodeArrayRegister = {Register::kCode_t5};
const Register kInterpreterDispatchTableRegister = {Register::kCode_t6};
const Register kJavaScriptCallArgCountRegister = {Register::kCode_a0};
const Register kJavaScriptCallNewTargetRegister = {Register::kCode_a3};
const Register kRuntimeCallFunctionRegister = {Register::kCode_a1};
const Register kRuntimeCallArgCountRegister = {Register::kCode_a0};
constexpr Register kReturnRegister0 = {Register::kCode_v0};
constexpr Register kReturnRegister1 = {Register::kCode_v1};
constexpr Register kReturnRegister2 = {Register::kCode_a0};
constexpr Register kJSFunctionRegister = {Register::kCode_a1};
constexpr Register kContextRegister = {Register::kCpRegister};
constexpr Register kAllocateSizeRegister = {Register::kCode_a0};
constexpr Register kInterpreterAccumulatorRegister = {Register::kCode_v0};
constexpr Register kInterpreterBytecodeOffsetRegister = {Register::kCode_t4};
constexpr Register kInterpreterBytecodeArrayRegister = {Register::kCode_t5};
constexpr Register kInterpreterDispatchTableRegister = {Register::kCode_t6};
constexpr Register kJavaScriptCallArgCountRegister = {Register::kCode_a0};
constexpr Register kJavaScriptCallNewTargetRegister = {Register::kCode_a3};
constexpr Register kRuntimeCallFunctionRegister = {Register::kCode_a1};
constexpr Register kRuntimeCallArgCountRegister = {Register::kCode_a0};
// Forward declaration.
class JumpTarget;
......@@ -210,9 +210,9 @@ class MacroAssembler: public Assembler {
// Number of instructions needed for calculation of switch table entry address
#ifdef _MIPS_ARCH_MIPS32R6
static const int kSwitchTablePrologueSize = 5;
static constexpr int kSwitchTablePrologueSize = 5;
#else
static const int kSwitchTablePrologueSize = 10;
static constexpr int kSwitchTablePrologueSize = 10;
#endif
// GetLabelFunction must be lambda '[](size_t index) -> Label*' or a
// functor/function with 'Label *func(size_t index)' declaration.
......@@ -1632,8 +1632,8 @@ const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT
template<typename Field>
void DecodeFieldToSmi(Register dst, Register src) {
static const int shift = Field::kShift;
static const int mask = Field::kMask >> shift << kSmiTagSize;
constexpr int shift = Field::kShift;
constexpr int mask = Field::kMask >> shift << kSmiTagSize;
STATIC_ASSERT((mask & (0x80000000u >> (kSmiTagSize - 1))) == 0);
STATIC_ASSERT(kSmiTag == 0);
if (shift < kSmiTagSize) {
......
src/mips64/assembler-mips64.h
View file @ e82b7ccd
This diff is collapsed.
src/x64/assembler-x64.h
View file @ e82b7ccd
......@@ -80,7 +80,7 @@ namespace internal {
V(r15)
// The length of pushq(rbp), movp(rbp, rsp), Push(rsi) and Push(rdi).
static const int kNoCodeAgeSequenceLength = kPointerSize == kInt64Size ? 6 : 17;
constexpr int kNoCodeAgeSequenceLength = kPointerSize == kInt64Size ? 6 : 17;
// CPU Registers.
//
......@@ -112,7 +112,7 @@ struct Register {
kCode_no_reg = -1
};
static const int kNumRegisters = Code::kAfterLast;
static constexpr int kNumRegisters = Code::kAfterLast;
static Register from_code(int code) {
DCHECK(code >= 0);
......@@ -144,25 +144,23 @@ struct Register {
int reg_code;
};
#define DECLARE_REGISTER(R) const Register R = {Register::kCode_##R};
#define DECLARE_REGISTER(R) constexpr Register R = {Register::kCode_##R};
GENERAL_REGISTERS(DECLARE_REGISTER)
#undef DECLARE_REGISTER
const Register no_reg = {Register::kCode_no_reg};
constexpr Register no_reg = {Register::kCode_no_reg};
#ifdef _WIN64
// Windows calling convention
const Register arg_reg_1 = {Register::kCode_rcx};
const Register arg_reg_2 = {Register::kCode_rdx};
const Register arg_reg_3 = {Register::kCode_r8};
const Register arg_reg_4 = {Register::kCode_r9};
constexpr Register arg_reg_1 = {Register::kCode_rcx};
constexpr Register arg_reg_2 = {Register::kCode_rdx};
constexpr Register arg_reg_3 = {Register::kCode_r8};
constexpr Register arg_reg_4 = {Register::kCode_r9};
#else
// AMD64 calling convention
const Register arg_reg_1 = {Register::kCode_rdi};
const Register arg_reg_2 = {Register::kCode_rsi};
const Register arg_reg_3 = {Register::kCode_rdx};
const Register arg_reg_4 = {Register::kCode_rcx};
constexpr Register arg_reg_1 = {Register::kCode_rdi};
constexpr Register arg_reg_2 = {Register::kCode_rsi};
constexpr Register arg_reg_3 = {Register::kCode_rdx};
constexpr Register arg_reg_4 = {Register::kCode_rcx};
#endif // _WIN64
......@@ -204,8 +202,8 @@ const Register arg_reg_4 = {Register::kCode_rcx};
V(xmm13) \
V(xmm14)
static const bool kSimpleFPAliasing = true;
static const bool kSimdMaskRegisters = false;
constexpr bool kSimpleFPAliasing = true;
constexpr bool kSimdMaskRegisters = false;
struct XMMRegister {
enum Code {
......@@ -216,7 +214,7 @@ struct XMMRegister {
kCode_no_reg = -1
};
static const int kMaxNumRegisters = Code::kAfterLast;
static constexpr int kMaxNumRegisters = Code::kAfterLast;
static XMMRegister from_code(int code) {
XMMRegister result = {code};
......@@ -249,10 +247,10 @@ typedef XMMRegister DoubleRegister;
typedef XMMRegister Simd128Register;
#define DECLARE_REGISTER(R) \
const DoubleRegister R = {DoubleRegister::kCode_##R};
constexpr DoubleRegister R = {DoubleRegister::kCode_##R};
DOUBLE_REGISTERS(DECLARE_REGISTER)
#undef DECLARE_REGISTER
const DoubleRegister no_double_reg = {DoubleRegister::kCode_no_reg};
constexpr DoubleRegister no_double_reg = {DoubleRegister::kCode_no_reg};
enum Condition {
// any value < 0 is considered no_condition
......@@ -471,7 +469,7 @@ class Assembler : public AssemblerBase {
// (There is a 15 byte limit on x64 instruction length that rules out some
// otherwise valid instructions.)
// This allows for a single, fast space check per instruction.
static const int kGap = 32;
static constexpr int kGap = 32;
public:
// Create an assembler. Instructions and relocation information are emitted
......@@ -538,42 +536,42 @@ class Assembler : public AssemblerBase {
inline Handle<Code> code_target_object_handle_at(Address pc);
inline Address runtime_entry_at(Address pc);
// Number of bytes taken up by the branch target in the code.
static const int kSpecialTargetSize = 4; // Use 32-bit displacement.
static constexpr int kSpecialTargetSize = 4; // 32-bit displacement.
// Distance between the address of the code target in the call instruction
// and the return address pushed on the stack.
static const int kCallTargetAddressOffset = 4; // Use 32-bit displacement.
static constexpr int kCallTargetAddressOffset = 4; // 32-bit displacement.
// The length of call(kScratchRegister).
static const int kCallScratchRegisterInstructionLength = 3;
static constexpr int kCallScratchRegisterInstructionLength = 3;
// The length of call(Immediate32).
static const int kShortCallInstructionLength = 5;
static constexpr int kShortCallInstructionLength = 5;
// The length of movq(kScratchRegister, address).
static const int kMoveAddressIntoScratchRegisterInstructionLength =
static constexpr int kMoveAddressIntoScratchRegisterInstructionLength =
2 + kPointerSize;
// The length of movq(kScratchRegister, address) and call(kScratchRegister).
static const int kCallSequenceLength =
static constexpr int kCallSequenceLength =
kMoveAddressIntoScratchRegisterInstructionLength +
kCallScratchRegisterInstructionLength;
// The debug break slot must be able to contain an indirect call sequence.
static const int kDebugBreakSlotLength = kCallSequenceLength;
static constexpr int kDebugBreakSlotLength = kCallSequenceLength;
// Distance between start of patched debug break slot and the emitted address
// to jump to.
static const int kPatchDebugBreakSlotAddressOffset =
static constexpr int kPatchDebugBreakSlotAddressOffset =
kMoveAddressIntoScratchRegisterInstructionLength - kPointerSize;
// One byte opcode for test eax,0xXXXXXXXX.
static const byte kTestEaxByte = 0xA9;
static constexpr byte kTestEaxByte = 0xA9;
// One byte opcode for test al, 0xXX.
static const byte kTestAlByte = 0xA8;
static constexpr byte kTestAlByte = 0xA8;
// One byte opcode for nop.
static const byte kNopByte = 0x90;
static constexpr byte kNopByte = 0x90;
// One byte prefix for a short conditional jump.
static const byte kJccShortPrefix = 0x70;
static const byte kJncShortOpcode = kJccShortPrefix | not_carry;
static const byte kJcShortOpcode = kJccShortPrefix | carry;
static const byte kJnzShortOpcode = kJccShortPrefix | not_zero;
static const byte kJzShortOpcode = kJccShortPrefix | zero;
static constexpr byte kJccShortPrefix = 0x70;
static constexpr byte kJncShortOpcode = kJccShortPrefix | not_carry;
static constexpr byte kJcShortOpcode = kJccShortPrefix | carry;
static constexpr byte kJnzShortOpcode = kJccShortPrefix | not_zero;
static constexpr byte kJzShortOpcode = kJccShortPrefix | zero;
// VEX prefix encodings.
enum SIMDPrefix { kNone = 0x0, k66 = 0x1, kF3 = 0x2, kF2 = 0x3 };
......@@ -2019,7 +2017,7 @@ class Assembler : public AssemblerBase {
static bool IsNop(Address addr);
// Avoid overflows for displacements etc.
static const int kMaximalBufferSize = 512*MB;
static constexpr int kMaximalBufferSize = 512 * MB;
byte byte_at(int pos) { return buffer_[pos]; }
void set_byte_at(int pos, byte value) { buffer_[pos] = value; }
......
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