1. 17 Oct, 2019 1 commit
  2. 28 May, 2019 1 commit
  3. 21 May, 2019 1 commit
  4. 20 May, 2019 1 commit
  5. 17 May, 2019 2 commits
  6. 10 May, 2019 1 commit
  7. 29 Apr, 2019 1 commit
    • Milad Farazmand's avatar
      PPC/s390: [cleanup] Use Vector::begin instead of Vector::start · 08756826
      Milad Farazmand authored
      Port 4b0f9c85
      
      Original Commit Message:
      
          Our {Vector} template provides both {start} and {begin} methods. They
          return exactly the same value. Since the {begin} method is needed for
          iteration, and is also what standard containers provide, this CL
          switches all uses of the {start} method to use {begin} instead.
      
          Patchset 1 was auto-generated by using this clang AST matcher:
              callExpr(
                  callee(
                    cxxMethodDecl(
                      hasName("start"),
                      ofClass(hasName("v8::internal::Vector")))
                  ),
                  argumentCountIs(0))
      
          Patchset 2 was created by running clang-format. Patchset 3 then
          removes the now unused {Vector::start} method.
      
      R=clemensh@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com
      BUG=
      LOG=N
      
      Change-Id: I119532691af31a3db1107c47de8b6f0c84697b5c
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1588226Reviewed-by: 's avatarJunliang Yan <jyan@ca.ibm.com>
      Commit-Queue: Milad Farazmand <miladfar@ca.ibm.com>
      Cr-Commit-Position: refs/heads/master@{#61102}
      08756826
  8. 23 Apr, 2019 1 commit
  9. 21 Nov, 2018 1 commit
  10. 19 Nov, 2018 1 commit
  11. 26 Jul, 2018 1 commit
  12. 12 Jul, 2018 1 commit
  13. 15 Jun, 2018 1 commit
  14. 07 Jun, 2018 1 commit
    • Joran Siu's avatar
      s390: Fix LOCR/LOCGR disassembly · 7ea34a90
      Joran Siu authored
      z/Architecture Principles of Operation details LOCR/LOCGR to be RRF-c
      format, with the operands printed in the form LOCR/LOCGR R1,R2,M3,
      where M3 is binary encoded in bits 16-20.  Current disassembler
      is printing the operands in the wrong order, and extracting the Mask
      from the wrong bits.
      
      R=jyan@ca.ibm.com, michael_dawson@ca.ibm.com
      
      Change-Id: I30baaab16ab3dbf879df381cd1f0978a66a214a6
      Reviewed-on: https://chromium-review.googlesource.com/1091139Reviewed-by: 's avatarJunliang Yan <jyan@ca.ibm.com>
      Commit-Queue: Joran Siu <joransiu@ca.ibm.com>
      Cr-Commit-Position: refs/heads/master@{#53593}
      7ea34a90
  15. 21 Feb, 2018 1 commit
  16. 18 Oct, 2017 1 commit
  17. 03 Aug, 2017 1 commit
  18. 02 Aug, 2017 1 commit
  19. 22 May, 2017 1 commit
  20. 04 Apr, 2017 1 commit
  21. 31 Mar, 2017 1 commit
  22. 10 Mar, 2017 1 commit
  23. 01 Mar, 2017 1 commit
  24. 17 Feb, 2017 1 commit
  25. 13 Feb, 2017 1 commit
  26. 30 Jan, 2017 1 commit
  27. 25 Jan, 2017 1 commit
    • jyan's avatar
      s390: TF Codegen Optimization · f7a3ede0
      jyan authored
      List of items:
        1. Avoid zero-extending for subsequent 32-bit operations if current operation does not change upper 32-bit or does zero-extending.
        2. Match complex address mode for binary operation where possible (eg. use Add R,MEM).
        3. Detect instruction forms in selector. Eg. kAllowRRR, kAllowRM
        4. Optimize sequence for Int32MulWithOverflow, Int32Div, etc.
        5. Remove Not32/Not64 which is the same as XOR
      
      R=bjaideep@ca.ibm.com, joransiu@ca.ibm.com
      BUG=
      
      Review-Url: https://codereview.chromium.org/2649113007
      Cr-Commit-Position: refs/heads/master@{#42669}
      f7a3ede0
  28. 22 Dec, 2016 2 commits
  29. 21 Dec, 2016 1 commit
  30. 19 Dec, 2016 1 commit
  31. 16 Dec, 2016 1 commit
  32. 24 Nov, 2016 1 commit
  33. 22 Aug, 2016 1 commit
  34. 15 Aug, 2016 1 commit
  35. 09 Aug, 2016 1 commit
  36. 08 Aug, 2016 1 commit
    • jyan's avatar
      S390: Decouple Add/Sub/Neg to 32/64 Bit Op · dc884581
      jyan authored
      1. Decouple kS390_Add/Sub/Neg to
           kS390_Add32/Sub32/Neg32/Add64/Sub64/Neg64
      2. Nuke kS390_Add/SubWithOverflow32
      3. Add Support for Load-On-Condition to optimize AssembleArchBoolean
      
      R=joransiu@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com, bjaideep@ca.ibm.com
      BUG=
      
      Review-Url: https://codereview.chromium.org/2220313002
      Cr-Commit-Position: refs/heads/master@{#38443}
      dc884581
  37. 29 Jul, 2016 1 commit
  38. 19 Jul, 2016 1 commit