Commit d0e71c57 authored by jyan's avatar jyan Committed by Commit bot

s390: exploit high-word facility for Smi Ops

R=joransiu@ca.ibm.com, bjaideep@ca.ibm.com
BUG=

Review-Url: https://codereview.chromium.org/2593803003
Cr-Commit-Position: refs/heads/master@{#41881}
parent 3952394a
......@@ -3831,7 +3831,8 @@ void FastNewSloppyArgumentsStub::Generate(MacroAssembler* masm) {
Label adaptor_frame, try_allocate, runtime;
__ LoadP(r6, MemOperand(r9, StandardFrameConstants::kCallerFPOffset));
__ LoadP(r2, MemOperand(r6, CommonFrameConstants::kContextOrFrameTypeOffset));
__ CmpSmiLiteral(r2, Smi::FromInt(StackFrame::ARGUMENTS_ADAPTOR), r0);
__ LoadSmiLiteral(r0, Smi::FromInt(StackFrame::ARGUMENTS_ADAPTOR));
__ CmpP(r2, r0);
__ beq(&adaptor_frame);
// No adaptor, parameter count = argument count.
......
......@@ -1070,6 +1070,9 @@ bool Decoder::DecodeSixByte(Instruction* instr) {
case AFI:
Format(instr, "afi\t'r1,'i7");
break;
case AIH:
Format(instr, "aih\t'r1,'i7");
break;
case ASI:
Format(instr, "asi\t'd2('r3),'ic");
break;
......@@ -1091,6 +1094,12 @@ bool Decoder::DecodeSixByte(Instruction* instr) {
case CLFI:
Format(instr, "clfi\t'r1,'i7");
break;
case CLIH:
Format(instr, "clih\t'r1,'i7");
break;
case CIH:
Format(instr, "cih\t'r1,'i2");
break;
case CFI:
Format(instr, "cfi\t'r1,'i2");
break;
......
......@@ -4329,8 +4329,12 @@ void MacroAssembler::LoadFloat32Literal(DoubleRegister result, float value,
void MacroAssembler::CmpSmiLiteral(Register src1, Smi* smi, Register scratch) {
#if V8_TARGET_ARCH_S390X
LoadSmiLiteral(scratch, smi);
cgr(src1, scratch);
if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
cih(src1, Operand(reinterpret_cast<intptr_t>(smi) >> 32));
} else {
LoadSmiLiteral(scratch, smi);
cgr(src1, scratch);
}
#else
// CFI takes 32-bit immediate.
cfi(src1, Operand(smi));
......@@ -4340,8 +4344,12 @@ void MacroAssembler::CmpSmiLiteral(Register src1, Smi* smi, Register scratch) {
void MacroAssembler::CmpLogicalSmiLiteral(Register src1, Smi* smi,
Register scratch) {
#if V8_TARGET_ARCH_S390X
LoadSmiLiteral(scratch, smi);
clgr(src1, scratch);
if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
clih(src1, Operand(reinterpret_cast<intptr_t>(smi) >> 32));
} else {
LoadSmiLiteral(scratch, smi);
clgr(src1, scratch);
}
#else
// CLFI takes 32-bit immediate
clfi(src1, Operand(smi));
......@@ -4351,8 +4359,13 @@ void MacroAssembler::CmpLogicalSmiLiteral(Register src1, Smi* smi,
void MacroAssembler::AddSmiLiteral(Register dst, Register src, Smi* smi,
Register scratch) {
#if V8_TARGET_ARCH_S390X
LoadSmiLiteral(scratch, smi);
AddP(dst, src, scratch);
if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
if (!dst.is(src)) LoadRR(dst, src);
aih(dst, Operand(reinterpret_cast<intptr_t>(smi) >> 32));
} else {
LoadSmiLiteral(scratch, smi);
AddP(dst, src, scratch);
}
#else
AddP(dst, src, Operand(reinterpret_cast<intptr_t>(smi)));
#endif
......@@ -4361,8 +4374,13 @@ void MacroAssembler::AddSmiLiteral(Register dst, Register src, Smi* smi,
void MacroAssembler::SubSmiLiteral(Register dst, Register src, Smi* smi,
Register scratch) {
#if V8_TARGET_ARCH_S390X
LoadSmiLiteral(scratch, smi);
SubP(dst, src, scratch);
if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
if (!dst.is(src)) LoadRR(dst, src);
aih(dst, Operand((-reinterpret_cast<intptr_t>(smi)) >> 32));
} else {
LoadSmiLiteral(scratch, smi);
SubP(dst, src, scratch);
}
#else
AddP(dst, src, Operand(-(reinterpret_cast<intptr_t>(smi))));
#endif
......
......@@ -828,8 +828,10 @@ class MacroAssembler : public Assembler {
void StoreRepresentation(Register src, const MemOperand& mem,
Representation r, Register scratch = no_reg);
void AddSmiLiteral(Register dst, Register src, Smi* smi, Register scratch);
void SubSmiLiteral(Register dst, Register src, Smi* smi, Register scratch);
void AddSmiLiteral(Register dst, Register src, Smi* smi,
Register scratch = r0);
void SubSmiLiteral(Register dst, Register src, Smi* smi,
Register scratch = r0);
void CmpSmiLiteral(Register src1, Smi* smi, Register scratch);
void CmpLogicalSmiLiteral(Register src1, Smi* smi, Register scratch);
void AndSmiLiteral(Register dst, Register src, Smi* smi);
......
......@@ -965,6 +965,7 @@ void Simulator::EvalTableInit() {
EvalTable[ALSIH] = &Simulator::Evaluate_ALSIH;
EvalTable[ALSIHN] = &Simulator::Evaluate_ALSIHN;
EvalTable[CIH] = &Simulator::Evaluate_CIH;
EvalTable[CLIH] = &Simulator::Evaluate_CLIH;
EvalTable[STCK] = &Simulator::Evaluate_STCK;
EvalTable[CFC] = &Simulator::Evaluate_CFC;
EvalTable[IPM] = &Simulator::Evaluate_IPM;
......@@ -8312,9 +8313,15 @@ EVALUATE(BRCTH) {
}
EVALUATE(AIH) {
UNIMPLEMENTED();
USE(instr);
return 0;
DCHECK_OPCODE(AIH);
DECODE_RIL_A_INSTRUCTION(r1, i2);
int32_t r1_val = get_high_register<int32_t>(r1);
bool isOF = CheckOverflowForIntAdd(r1_val, static_cast<int32_t>(i2), int32_t);
r1_val += static_cast<int32_t>(i2);
set_high_register(r1, r1_val);
SetS390ConditionCode<int32_t>(r1_val, 0);
SetS390OverflowCode(isOF);
return length;
}
EVALUATE(ALSIH) {
......@@ -8330,9 +8337,19 @@ EVALUATE(ALSIHN) {
}
EVALUATE(CIH) {
UNIMPLEMENTED();
USE(instr);
return 0;
DCHECK_OPCODE(CIH);
DECODE_RIL_A_INSTRUCTION(r1, imm);
int32_t r1_val = get_high_register<int32_t>(r1);
SetS390ConditionCode<int32_t>(r1_val, static_cast<int32_t>(imm));
return length;
}
EVALUATE(CLIH) {
DCHECK_OPCODE(CLIH);
// Compare Logical with Immediate (32)
DECODE_RIL_A_INSTRUCTION(r1, imm);
SetS390ConditionCode<uint32_t>(get_high_register<uint32_t>(r1), imm);
return length;
}
EVALUATE(STCK) {
......
......@@ -738,6 +738,7 @@ class Simulator {
EVALUATE(ALSIH);
EVALUATE(ALSIHN);
EVALUATE(CIH);
EVALUATE(CLIH);
EVALUATE(STCK);
EVALUATE(CFC);
EVALUATE(IPM);
......
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