Commit c46f98bc authored by sampsong's avatar sampsong Committed by Commit bot

S390 [Crankshaft]: Use LoadPositive for MathAbs

R=joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com, bjaideep@ca.ibm.com

BUG=

Review-Url: https://codereview.chromium.org/2591643005
Cr-Commit-Position: refs/heads/master@{#41906}
parent c8ce0cf9
......@@ -3387,31 +3387,17 @@ void LCodeGen::DoDeferredMathAbsTaggedHeapNumber(LMathAbs* instr) {
void LCodeGen::EmitMathAbs(LMathAbs* instr) {
Register input = ToRegister(instr->value());
Register result = ToRegister(instr->result());
Label done;
__ CmpP(input, Operand::Zero());
__ Move(result, input);
__ bge(&done, Label::kNear);
__ LoadComplementRR(result, result);
__ LoadPositiveP(result, input);
// Deoptimize on overflow.
DeoptimizeIf(overflow, instr, DeoptimizeReason::kOverflow, cr0);
__ bind(&done);
}
#if V8_TARGET_ARCH_S390X
void LCodeGen::EmitInteger32MathAbs(LMathAbs* instr) {
Register input = ToRegister(instr->value());
Register result = ToRegister(instr->result());
Label done;
__ Cmp32(input, Operand::Zero());
__ Move(result, input);
__ bge(&done, Label::kNear);
// Deoptimize on overflow.
__ Cmp32(input, Operand(0x80000000));
DeoptimizeIf(eq, instr, DeoptimizeReason::kOverflow);
__ LoadComplementRR(result, result);
__ bind(&done);
__ LoadPositive32(result, input);
DeoptimizeIf(overflow, instr, DeoptimizeReason::kOverflow);
}
#endif
......
......@@ -1009,7 +1009,7 @@ void Assembler::si_form(Opcode op, const Operand& i2, Register b1, Disp d1) {
}
void Assembler::siy_form(Opcode op, const Operand& i2, Register b1, Disp d1) {
DCHECK(is_uint20(d1));
DCHECK(is_uint20(d1) || is_int20(d1));
DCHECK(is_uint16(op));
DCHECK(is_uint8(i2.imm_));
uint64_t code = (static_cast<uint64_t>(op & 0xFF00)) * B32 |
......
......@@ -562,6 +562,9 @@ bool Decoder::DecodeTwoByte(Instruction* instr) {
case BKPT:
Format(instr, "bkpt");
break;
case LPR:
Format(instr, "lpr\t'r1, 'r2");
break;
default:
return false;
}
......@@ -1036,6 +1039,12 @@ bool Decoder::DecodeFourByte(Instruction* instr) {
Format(instr, "trap4");
break;
}
case LPGR:
Format(instr, "lpgr\t'r1, 'r2");
break;
case LPGFR:
Format(instr, "lpgfr\t'r1,'r2");
break;
default:
return false;
}
......
......@@ -4132,6 +4132,19 @@ void MacroAssembler::Load(Register dst, const MemOperand& opnd) {
#endif
}
void MacroAssembler::LoadPositiveP(Register result, Register input) {
#if V8_TARGET_ARCH_S390X
lpgr(result, input);
#else
lpr(result, input);
#endif
}
void MacroAssembler::LoadPositive32(Register result, Register input) {
lpr(result, input);
lgfr(result, result);
}
//-----------------------------------------------------------------------------
// Compare Helpers
//-----------------------------------------------------------------------------
......
......@@ -374,6 +374,9 @@ class MacroAssembler : public Assembler {
// Load On Condition
void LoadOnConditionP(Condition cond, Register dst, Register src);
void LoadPositiveP(Register result, Register input);
void LoadPositive32(Register result, Register input);
// Store Floating Point
void StoreDouble(DoubleRegister dst, const MemOperand& opnd);
void StoreFloat32(DoubleRegister dst, const MemOperand& opnd);
......
......@@ -6567,9 +6567,18 @@ EVALUATE(CLCL) {
}
EVALUATE(LPR) {
UNIMPLEMENTED();
USE(instr);
return 0;
DCHECK_OPCODE(LPR);
// Load Positive (32)
DECODE_RR_INSTRUCTION(r1, r2);
int32_t r2_val = get_low_register<int32_t>(r2);
// If negative, then negate it.
r2_val = (r2_val < 0) ? -r2_val : r2_val;
set_low_register(r1, r2_val);
SetS390ConditionCode<int32_t>(r2_val, 0);
if (r2_val == (static_cast<int32_t>(1) << 31)) {
SetS390OverflowCode(true);
}
return length;
}
EVALUATE(LNR) {
......@@ -9909,9 +9918,17 @@ EVALUATE(RRXTR) {
}
EVALUATE(LPGR) {
UNIMPLEMENTED();
USE(instr);
return 0;
DCHECK_OPCODE(LPGR);
// Load Positive (32)
DECODE_RRE_INSTRUCTION(r1, r2);
int64_t r2_val = get_register(r2);
r2_val = (r2_val < 0) ? -r2_val : r2_val; // If negative, then negate it.
set_register(r1, r2_val);
SetS390ConditionCode<int64_t>(r2_val, 0);
if (r2_val == (static_cast<int64_t>(1) << 63)) {
SetS390OverflowCode(true);
}
return length;
}
EVALUATE(LNGR) {
......@@ -10010,9 +10027,15 @@ EVALUATE(LRVGR) {
}
EVALUATE(LPGFR) {
UNIMPLEMENTED();
USE(instr);
return 0;
DCHECK_OPCODE(LPGFR);
// Load Positive (32)
DECODE_RRE_INSTRUCTION(r1, r2);
int32_t r2_val = get_low_register<int32_t>(r2);
// If negative, then negate it.
int64_t r1_val = static_cast<int64_t>((r2_val < 0) ? -r2_val : r2_val);
set_register(r1, r1_val);
SetS390ConditionCode<int64_t>(r1_val, 0);
return length;
}
EVALUATE(LNGFR) {
......
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