- 30 Mar, 2020 1 commit
-
-
Ng Zhi An authored
Implement i8x16.bitmask, i16x8.bitmask, i32x4.bitmask on arm. Bug: v8:10308 Change-Id: Ifa2439522b74a310d98621104deda80f3dc25b33 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2101697Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#66909}
-
- 03 Mar, 2020 1 commit
-
-
Ng Zhi An authored
Implements i8x16.abs, i16x8.abs, and i32x4.abs. Bug: v8:10233 Change-Id: I32391e8f895fea808180561d89a4fd24fbead3bb Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2067845 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Cr-Commit-Position: refs/heads/master@{#66548}
-
- 23 Jan, 2020 1 commit
-
-
Dan Elphick authored
Load and store external references using the root register rather than generating a constant and dereferencing it. This typically uses 1 instruction rather than up to 4. Also adds external reference store optimisation for arm64. Bug: v8:7844 Change-Id: I5f73728e7a72e366a31bfb694581e2e7d8250947 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2007270 Commit-Queue: Dan Elphick <delphick@chromium.org> Reviewed-by:
Jakob Gruber <jgruber@chromium.org> Cr-Commit-Position: refs/heads/master@{#65950}
-
- 17 Jan, 2020 1 commit
-
-
Ng Zhi An authored
Bug: v8:9813 Change-Id: I0436c6a90284559a110e99476c12ae39183c961e Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1994382 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Reviewed-by:
Jakob Kummerow <jkummerow@chromium.org> Cr-Commit-Position: refs/heads/master@{#65846}
-
- 16 Jan, 2020 1 commit
-
-
Ng Zhi An authored
Bug: v8:10082 Change-Id: Ieabb0ebeec14091844b3d30b9b1684a249db7bdc Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1980949Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Reviewed-by:
Jakob Kummerow <jkummerow@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#65824}
-
- 07 Jan, 2020 1 commit
-
-
Ng Zhi An authored
Bug: v8:10039 Change-Id: If7c9668821a1cdfd5968f1533c3412247567bf3e Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1955550Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Reviewed-by:
Jakob Kummerow <jkummerow@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#65615}
-
- 03 Dec, 2019 2 commits
-
-
Ng Zhi An authored
Bug: v8:9813 Change-Id: I8907a207448a6d3a38b5454107100959d485b8e6 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1925614Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#65309}
-
George Wort authored
Replace unsigned extract lane followed by sign extend as added here https://chromium-review.googlesource.com/c/v8/v8/+/1846711 with a signed extract lane for I8x16 and I16x8. Change-Id: I5a701417b772d12f5ef038efbb081716bb27e25a Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1873700 Commit-Queue: Martyn Capewell <martyn.capewell@arm.com> Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#65307}
-
- 02 Dec, 2019 1 commit
-
-
Ng Zhi An authored
Bug: v8:9886 Change-Id: Idd44fb99be54c56385db55895dba58b35c1b660e Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1928150Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#65275}
-
- 21 Nov, 2019 1 commit
-
-
Ng Zhi An authored
Also some cleanup reordering of instruction codes. Bug: v8:9813 Change-Id: I35caad0b84dd5824090046cba964454eac45d5d8 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1925613 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Reviewed-by:
Bill Budge <bbudge@chromium.org> Cr-Commit-Position: refs/heads/master@{#65088}
-
- 20 Nov, 2019 1 commit
-
-
Ng Zhi An authored
Bug: v8:9813 Change-Id: Ibfac9453a035bb00020b4d062e1445410644f16a Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1900662Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Reviewed-by:
Bill Budge <bbudge@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#65087}
-
- 19 Nov, 2019 1 commit
-
-
Ng Zhi An authored
Bug: v8:9813 Change-Id: I75ca39612f0420548a56cc32edaa13a36a9713e9 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1900661Reviewed-by:
Bill Budge <bbudge@chromium.org> Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#65041}
-
- 07 Nov, 2019 1 commit
-
-
Ng Zhi An authored
Bug: v8:9813 Change-Id: Ie99fdbf5307a1515a1838ac6902a5bcd99d11e14 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1900660Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#64846}
-
- 05 Nov, 2019 1 commit
-
-
Ng Zhi An authored
Bug: v8:9813 Change-Id: I716ed7c2802c38a4b4c8973db4e3bc50e16cec39 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1872930Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#64788}
-
- 22 Oct, 2019 2 commits
-
-
Ng Zhi An authored
Bug: v8:9813 Change-Id: Idee4daded322731648fe51e75f3b9e8be2dcd0d6 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1872929Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#64488}
-
Ng Zhi An authored
Bug: v8:9813 Change-Id: Ib78d7506fa8c8b755a8e1feccc5d948834ddc3a6 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1873106Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#64481}
-
- 18 Oct, 2019 1 commit
-
-
Ng Zhi An authored
Bug: v8:9813 Change-Id: Iff69b35ec7ea96f0e63610a93c01557429792c59 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1866883Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#64389}
-
- 17 Oct, 2019 1 commit
-
-
Ng Zhi An authored
Bug: v8:8460 Change-Id: I9caa817ed1ab1f64984311d90f57ed779f15b225 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1850613Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#64364}
-
- 16 Oct, 2019 1 commit
-
-
Ng Zhi An authored
Bug: v8:9813 Change-Id: I9ab0d0aafb0a2620a317d99c10f56dbcaa7fdf04 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1849206 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Cr-Commit-Position: refs/heads/master@{#64339}
-
- 26 Sep, 2019 1 commit
-
-
Ng Zhi An authored
Bug: v8:8460 Change-Id: I02f5ac42ab101dd8e12e14f253a625212db13a21 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1808045 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Cr-Commit-Position: refs/heads/master@{#64011}
-
- 03 Sep, 2019 1 commit
-
-
Ng Zhi An authored
Bug: v8:8460 Change-Id: I529310a35b74964cb034b4c757981c7ec70f1d19 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1765442Reviewed-by:
Bill Budge <bbudge@chromium.org> Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#63532}
-
- 19 Jul, 2019 1 commit
-
-
Michael Starzinger authored
This adds decoding and compilation of the "atomic.fence" operator, which is intended to preserve the synchronization guarantees of higher-level languages. Unlike other atomic operators, it does not target a particular linear memory. It may occur in modules which declare no memory, or a non-shared memory, without causing a validation error. See proposal: https://github.com/WebAssembly/threads/pull/141 See discussion: https://github.com/WebAssembly/threads/issues/140 R=clemensh@chromium.org TEST=cctest/test-run-wasm-atomics/RunWasmXXX_AtomicFence BUG=v8:9452 Change-Id: Ibf7e46227f7edfe5c81c097cfc15924c59614067 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1701856 Commit-Queue: Michael Starzinger <mstarzinger@chromium.org> Reviewed-by:
Clemens Hammacher <clemensh@chromium.org> Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Cr-Commit-Position: refs/heads/master@{#62821}
-
- 12 Nov, 2018 1 commit
-
-
Ben L. Titzer authored
This CL splits the backend of TurboFan off into its own directory, without changing namespaces. This makes ownership management a bit more fine-grained with a logical separation. R=mstarzinger@chromium.org,jarin@chromium.org,adamk@chromium.org Change-Id: I2ac40d6ca2c4f04b8474b630aae0286ecf79ef42 Reviewed-on: https://chromium-review.googlesource.com/c/1308333 Commit-Queue: Ben Titzer <titzer@chromium.org> Reviewed-by:
Adam Klein <adamk@chromium.org> Reviewed-by:
Jaroslav Sevcik <jarin@chromium.org> Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#57437}
-
- 29 Aug, 2018 1 commit
-
-
Deepti Gandluri authored
The AtomicNarrow operations are currently used for wider 64-bit operations, that only operate on 32-bits of data or less (Ex:I64AtomicAdd8U). Removing these because this can be handled in int64-lowering by zeroing the higher order node. Explicitly zeroing these in code-gen is not required because - - The spec requires only the data exchange to be atomic, for narrow ops this uses only the low word. - The return values are not in memory, so are not visible to other workers/threads BUG:v8:6532 Change-Id: I90a795ab6c21c70cb096f59a137de653c9c6a178 Reviewed-on: https://chromium-review.googlesource.com/1194428Reviewed-by:
Ben Titzer <titzer@chromium.org> Reviewed-by:
Ben Smith <binji@chromium.org> Commit-Queue: Deepti Gandluri <gdeepti@chromium.org> Cr-Commit-Position: refs/heads/master@{#55499}
-
- 25 Aug, 2018 1 commit
-
-
Deepti Gandluri authored
- Implement all the I64Atomic operations on ARM - Change assembler methods to use Registers instead of memory operands - Move atomics64 test up be tested on all archs, disable tests on MIPS BUG:v8:6532 Change-Id: I91bd42fa819f194be15c719266c36230f9c65db8 Reviewed-on: https://chromium-review.googlesource.com/1180211 Commit-Queue: Deepti Gandluri <gdeepti@chromium.org> Reviewed-by:
Bill Budge <bbudge@chromium.org> Reviewed-by:
Ben Smith <binji@chromium.org> Cr-Commit-Position: refs/heads/master@{#55416}
-
- 14 Aug, 2018 2 commits
-
-
Benedikt Meurer authored
This adds support for unaligned load/store access to the DataView backing store and uses byteswap operations to fix up the endianess when necessary. This changes the Word32ReverseBytes operator to be a required operator and adds the missing support on the Intel and ARM platforms (on 64-bit platforms the Word64ReverseBytes operator is also mandatory now). This further improves the performance on the dataviewperf.js test mentioned in the tracking bug by up to 40%, and at the same time reduces the code complexity in the EffectControlLinearizer. Bug: chromium:225811 Change-Id: I7c1ec826faf46a144a5a9068f8f815a5fd040997 Reviewed-on: https://chromium-review.googlesource.com/1174252Reviewed-by:
Sigurd Schneider <sigurds@chromium.org> Commit-Queue: Benedikt Meurer <bmeurer@chromium.org> Cr-Commit-Position: refs/heads/master@{#55111}
-
Leszek Swirski authored
This reverts commit c46915b9. Reason for revert: Disasm failures https://ci.chromium.org/p/v8/builders/luci.v8.ci/V8%20Linux%20-%20debug/21727 Original change's description: > [turbofan] Further optimize DataView accesses. > > This adds support for unaligned load/store access to the DataView > backing store and uses byteswap operations to fix up the endianess > when necessary. This changes the Word32ReverseBytes operator to be > a required operator and adds the missing support on the Intel and > ARM platforms (on 64-bit platforms the Word64ReverseBytes operator > is also mandatory now). > > This further improves the performance on the dataviewperf.js test > mentioned in the tracking bug by up to 40%, and at the same time > reduces the code complexity in the EffectControlLinearizer. > > Bug: chromium:225811 > Change-Id: I296170b828c2ccc1c317ed37840b564aa14cdec2 > Reviewed-on: https://chromium-review.googlesource.com/1172777 > Commit-Queue: Benedikt Meurer <bmeurer@chromium.org> > Reviewed-by: Sigurd Schneider <sigurds@chromium.org> > Cr-Commit-Position: refs/heads/master@{#55099} TBR=sigurds@chromium.org,bmeurer@chromium.org Change-Id: If7a62e3a1a4ad26823fcbd2ab6eb4c053ad11c49 No-Presubmit: true No-Tree-Checks: true No-Try: true Bug: chromium:225811 Reviewed-on: https://chromium-review.googlesource.com/1174171Reviewed-by:
Leszek Swirski <leszeks@chromium.org> Commit-Queue: Leszek Swirski <leszeks@chromium.org> Cr-Commit-Position: refs/heads/master@{#55107}
-
- 13 Aug, 2018 1 commit
-
-
Benedikt Meurer authored
This adds support for unaligned load/store access to the DataView backing store and uses byteswap operations to fix up the endianess when necessary. This changes the Word32ReverseBytes operator to be a required operator and adds the missing support on the Intel and ARM platforms (on 64-bit platforms the Word64ReverseBytes operator is also mandatory now). This further improves the performance on the dataviewperf.js test mentioned in the tracking bug by up to 40%, and at the same time reduces the code complexity in the EffectControlLinearizer. Bug: chromium:225811 Change-Id: I296170b828c2ccc1c317ed37840b564aa14cdec2 Reviewed-on: https://chromium-review.googlesource.com/1172777 Commit-Queue: Benedikt Meurer <bmeurer@chromium.org> Reviewed-by:
Sigurd Schneider <sigurds@chromium.org> Cr-Commit-Position: refs/heads/master@{#55099}
-
- 29 Jan, 2018 1 commit
-
-
Michael Starzinger authored
R=tebbi@chromium.org Change-Id: Iae9a3774eb7913388350ce3cd0a96d6a6cca25e8 Reviewed-on: https://chromium-review.googlesource.com/885845Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Commit-Queue: Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#50926}
-
- 20 Dec, 2017 1 commit
-
-
Andreas Haas authored
This is the implementation of crrev.com/c/766371 for arm. Original description: Add the ability to return (multiple) return values on the stack: - Extend stack frames with a new buffer region for return slots. This region is located at the end of a caller's frame such that its slots can be indexed as caller frame slots in a callee (located beyond its parameters) and assigned return values. - Adjust stack frame constructon and deconstruction accordingly. - Extend linkage computation to support register plus stack returns. - Reserve return slots in caller frame when respective calls occur. - Introduce and generate architecture instructions ('peek') for reading back results from return slots in the caller. - Aggressive tests. - Some minor clean-up. R=v8-arm-ports@googlegroups.com Change-Id: I7d61424a184d5778baf1d1270013f4e0c7ec68b4 Reviewed-on: https://chromium-review.googlesource.com/836608Reviewed-by:
Jaroslav Sevcik <jarin@chromium.org> Commit-Queue: Andreas Haas <ahaas@chromium.org> Cr-Commit-Position: refs/heads/master@{#50237}
-
- 20 Jul, 2017 1 commit
-
-
Bill Budge authored
- Adds opcode for 32/16/8 bit dup instruction. - Matches shuffles that are equivalent to dup's. Bug: v8:6020 Change-Id: I8848d974adf30127d1dc31c09a9517f8f9573ce9 Reviewed-on: https://chromium-review.googlesource.com/571448 Commit-Queue: Bill Budge <bbudge@chromium.org> Reviewed-by:
Martyn Capewell <martyn.capewell@arm.com> Reviewed-by:
Mircea Trofin <mtrofin@chromium.org> Cr-Commit-Position: refs/heads/master@{#46803}
-
- 13 Jun, 2017 1 commit
-
-
bbudge authored
- Eliminates S32x4Shuffle, S16x8Shuffle opcodes. All shuffles are subsumed by S8x16Shuffle. This aligns us with the latest WASM SIMD spec. LOG=N BUG=v8:6020 Review-Url: https://codereview.chromium.org/2923103003 Cr-Commit-Position: refs/heads/master@{#45929}
-
- 21 May, 2017 1 commit
-
-
gdeepti authored
Currently SIMD integer comparison ops are implemented using Lt/Le, this is sub-optimal on Intel, because all compares are done using pcmpgt(d/w/b) that clobber the destination register, and will need additional instructions to when using Lt/Le as the base implementation. This CL proposes moving to Gt/Ge as the underlying implementation as this will only require swapping operands on MIPS and is consistent with x86/ARM instructions. BUG=v8:6020 R=bbudge@chromium.org, bmeurer@chromium.org, bradnelson@chromium.org Review-Url: https://codereview.chromium.org/2874403002 Cr-Commit-Position: refs/heads/master@{#45440}
-
- 09 May, 2017 1 commit
-
-
bbudge authored
- S32x4Shuffle by decomposing into s-register moves if no patterns match. - S16x8Shuffle, S8x16Shuffle implemented with vtbl if no patterns match. LOG=N BUG=v8:6020 Review-Url: https://codereview.chromium.org/2856363003 Cr-Commit-Position: refs/heads/master@{#45210}
-
- 24 Apr, 2017 1 commit
-
-
bbudge authored
- Adds new F32x4AddHoriz, I32x4AddHoriz, etc. to WASM opcodes. - Implements them for ARM. LOG=N BUG=v8:6020 Review-Url: https://codereview.chromium.org/2804883008 Cr-Commit-Position: refs/heads/master@{#44812}
-
- 21 Apr, 2017 1 commit
-
-
bbudge authored
These can be synthesized from existing operations and scheduled for better performance than if we have to generate blocks of instructions that take many cycles to complete. - Remove F32x4RecipRefine, F32x4RecipSqrtRefine. Clients are better off synthesizing these from splats, multiplies and adds. - Remove F32x4Div, F32x4Sqrt, F32x4MinNum, F32x4MaxNum. Clients are better off synthesizing these or using the reciprocal approximations, possibly with a refinement step. LOG=N BUG=v8:6020 Review-Url: https://codereview.chromium.org/2827143002 Cr-Commit-Position: refs/heads/master@{#44784}
-
- 19 Apr, 2017 1 commit
-
-
bbudge authored
- Adds unary Reverse shuffles (swizzles): S32x2Reverse, S16x4Reverse, S16x2Reverse, S8x8Reverse, S8x4Reverse, S8x2Reverse. Reversals are done within the sub-vectors that prefix the opcode name, e.g. S8x2 reverses the 8 consecutive pairs in an S8x16 vector. - Adds binary Zip (interleave) left and right half-shuffles to return a single vector: S32x4ZipLeft, S32x4ZipRightS16x8ZipLeft, S16x8ZipRight, S8x16ZipLeft, S8x16ZipRight. - Adds binary Unzip (de-interleave) left and right half shuffles to return a single vector: S32x4UnzipLeft, S32x4UnzipRight, S16x8UnzipLeft, S16x8UnzipRight, S8x16UnzipLeft, S8x16UnzipRight. - Adds binary Transpose left and right half shuffles to return a single vector: S32x4TransposeLeft, S32x4TransposeRight, S16x8TransposeLeft, S16xTransposeRight, S8x16TransposeLeft, S8x16TransposeRight. - Adds binary Concat (concatenate) byte shuffle: S8x16Concat #bytes to paste two vectors together. LOG=N BUG=v8:6020 Review-Url: https://codereview.chromium.org/2801183002 Cr-Commit-Position: refs/heads/master@{#44734}
-
- 10 Apr, 2017 1 commit
-
-
bbudge authored
- Adds WASM opcodes I32x4SConvertI16x8Low, I32x4SConvertI16x8High, I32x4UConvertI16x8Low, I32x4UConvertI16x8High, which unpack half of an I16x8 register into a whole I32x4 register, with signed or unsigned extension. Having separate Low/High opcodes works around the difficulty of having multiple output registers, which would be necessary if we unpacked the entire I16x8 register. - Adds WASM opcodes I16x8SConvertI8x16Low, I16x8SConvertI8x16High, I16x8UConvertI8x16Low, I16x8UConvertI8x16High, similarly to above. - Adds WASM opcodes I16x8SConvertI32x4, I16x8UConvertI32x4, I8x16SConvert16x8, I8x16UConvertI16x8, which pack two source registers into a single destination register with signed or unsigned saturation. These could have been separated into half operations, but this is simpler to implement with SSE, AVX, and is acceptable on ARM. It also avoids adding operations that only modify half of their destination register. - Implements these opcodes for ARM. LOG=N BUG=v8:6020 Review-Url: https://codereview.chromium.org/2800523002 Cr-Commit-Position: refs/heads/master@{#44541}
-
- 29 Mar, 2017 1 commit
-
-
gdeepti authored
- Fix opcode names to be consistent with opcodes as in wasm-opcodes.h - Fix Ordering of Ops, inconsistencies BUG=v8:6020 Review-Url: https://codereview.chromium.org/2776753004 Cr-Commit-Position: refs/heads/master@{#44239}
-
- 24 Mar, 2017 1 commit
-
-
bbudge authored
- Renames kArmSimd128Load, kArmSimd128Store to kArmVld1S128, kArmVst1S128 - Handles the unaligned load/store cases. LOG=N BUG=v8:6020 Review-Url: https://codereview.chromium.org/2769083003 Cr-Commit-Position: refs/heads/master@{#44117}
-