[wasm-simd] Implement f64x2 min max for arm

Bug: v8:9813
Change-Id: I8907a207448a6d3a38b5454107100959d485b8e6
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1925614Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65309}

src/compiler/backend/arm/code-generator-arm.cc

@@ -1836,6 +1836,46 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       ASSEMBLE_F64X2_ARITHMETIC_BINOP(vdiv);
       break;
     }
+    case kArmF64x2Min: {
+      Simd128Register result = i.OutputSimd128Register();
+      Simd128Register left = i.InputSimd128Register(0);
+      Simd128Register right = i.InputSimd128Register(1);
+      if (left == right) {
+        __ Move(result, left);
+      } else {
+        auto ool_low = new (zone())
+            OutOfLineFloat64Min(this, result.low(), left.low(), right.low());
+        auto ool_high = new (zone())
+            OutOfLineFloat64Min(this, result.high(), left.high(), right.high());
+        __ FloatMin(result.low(), left.low(), right.low(), ool_low->entry());
+        __ bind(ool_low->exit());
+        __ FloatMin(result.high(), left.high(), right.high(),
+                    ool_high->entry());
+        __ bind(ool_high->exit());
+      }
+      DCHECK_EQ(LeaveCC, i.OutputSBit());
+      break;
+    }
+    case kArmF64x2Max: {
+      Simd128Register result = i.OutputSimd128Register();
+      Simd128Register left = i.InputSimd128Register(0);
+      Simd128Register right = i.InputSimd128Register(1);
+      if (left == right) {
+        __ Move(result, left);
+      } else {
+        auto ool_low = new (zone())
+            OutOfLineFloat64Max(this, result.low(), left.low(), right.low());
+        auto ool_high = new (zone())
+            OutOfLineFloat64Max(this, result.high(), left.high(), right.high());
+        __ FloatMax(result.low(), left.low(), right.low(), ool_low->entry());
+        __ bind(ool_low->exit());
+        __ FloatMax(result.high(), left.high(), right.high(),
+                    ool_high->entry());
+        __ bind(ool_high->exit());
+      }
+      DCHECK_EQ(LeaveCC, i.OutputSBit());
+      break;
+    }
 #undef ASSEMBLE_F64X2_ARITHMETIC_BINOP
     case kArmF64x2Eq: {
       UseScratchRegisterScope temps(tasm());

src/compiler/backend/arm/instruction-codes-arm.h

@@ -138,6 +138,8 @@ namespace compiler {
   V(ArmF64x2Sub)                   \
   V(ArmF64x2Mul)                   \
   V(ArmF64x2Div)                   \
+  V(ArmF64x2Min)                   \
+  V(ArmF64x2Max)                   \
   V(ArmF64x2Eq)                    \
   V(ArmF64x2Ne)                    \
   V(ArmF64x2Lt)                    \

src/compiler/backend/arm/instruction-scheduler-arm.cc

@@ -118,6 +118,8 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kArmF64x2Sub:
     case kArmF64x2Mul:
     case kArmF64x2Div:
+    case kArmF64x2Min:
+    case kArmF64x2Max:
     case kArmF64x2Eq:
     case kArmF64x2Ne:
     case kArmF64x2Lt:

src/compiler/backend/arm/instruction-selector-arm.cc

@@ -2496,6 +2496,8 @@ void InstructionSelector::VisitWord32AtomicPairCompareExchange(Node* node) {
   V(F64x2Sub, kArmF64x2Sub)                     \
   V(F64x2Mul, kArmF64x2Mul)                     \
   V(F64x2Div, kArmF64x2Div)                     \
+  V(F64x2Min, kArmF64x2Min)                     \
+  V(F64x2Max, kArmF64x2Max)                     \
   V(F64x2Eq, kArmF64x2Eq)                       \
   V(F64x2Ne, kArmF64x2Ne)                       \
   V(F64x2Lt, kArmF64x2Lt)                       \

src/compiler/backend/instruction-selector.cc

@@ -2635,8 +2635,6 @@ void InstructionSelector::VisitF64x2UConvertI64x2(Node* node) {
 void InstructionSelector::VisitLoadTransform(Node* node) { UNIMPLEMENTED(); }
 #endif  // !V8_TARGET_ARCH_ARM
 #if !V8_TARGET_ARCH_IA32
-void InstructionSelector::VisitF64x2Min(Node* node) { UNIMPLEMENTED(); }
-void InstructionSelector::VisitF64x2Max(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitI64x2Mul(Node* node) { UNIMPLEMENTED(); }
 #endif  // !V8_TARGET_ARCH_IA32
 void InstructionSelector::VisitI64x2Splat(Node* node) { UNIMPLEMENTED(); }

test/cctest/wasm/test-run-wasm-simd.cc

@@ -1441,7 +1441,6 @@ WASM_SIMD_TEST_NO_LOWERING(F64x2Le) {
   RunF64x2CompareOpTest(execution_tier, lower_simd, kExprF64x2Le, LessEqual);
 }
 
-#if V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_IA32
 WASM_SIMD_TEST_NO_LOWERING(F64x2Min) {
   RunF64x2BinOpTest(execution_tier, lower_simd, kExprF64x2Min, JSMin);
 }
@@ -1450,6 +1449,7 @@ WASM_SIMD_TEST_NO_LOWERING(F64x2Max) {
   RunF64x2BinOpTest(execution_tier, lower_simd, kExprF64x2Max, JSMax);
 }
 
+#if V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_IA32
 WASM_SIMD_TEST_NO_LOWERING(I64x2Mul) {
   RunI64x2BinOpTest(execution_tier, lower_simd, kExprI64x2Mul,
                     base::MulWithWraparound);