- 18 Jan, 2016 1 commit
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balazs.kilvady authored
BUG= Review URL: https://codereview.chromium.org/1593713002 Cr-Commit-Position: refs/heads/master@{#33361}
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- 05 Jan, 2016 1 commit
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balazs.kilvady authored
BUG= Review URL: https://codereview.chromium.org/1545013002 Cr-Commit-Position: refs/heads/master@{#33127}
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- 30 Nov, 2015 1 commit
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alan.li authored
BUG= Review URL: https://codereview.chromium.org/1481493002 Cr-Commit-Position: refs/heads/master@{#32417}
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- 27 Nov, 2015 1 commit
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Djordje.Pesic authored
These instructions now show FCSR in disassembly, instead f31 BUG= Review URL: https://codereview.chromium.org/1481023002 Cr-Commit-Position: refs/heads/master@{#32366}
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- 10 Nov, 2015 1 commit
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balazs.kilvady authored
Jic and jialc compact branch ops are fixed as they does not have 'forbidden slot' restriction. Also COP1 branches (CTI instructions) added to IsForbiddenAfterBranchInstr(). TEST=cctest/test-disasm-mips/Type0 BUG= Review URL: https://codereview.chromium.org/1423493006 Cr-Commit-Position: refs/heads/master@{#31922}
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- 03 Nov, 2015 1 commit
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balazs.kilvady authored
BUG= Review URL: https://codereview.chromium.org/1396133002 Cr-Commit-Position: refs/heads/master@{#31761}
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- 08 Sep, 2015 1 commit
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balazs.kilvady authored
For simulator optimization we modified Instruction::InstructionType() function so a simpler but less complete InstructionType() function used by default. This fix enables the full InstructionType checking to properly decode a dd-constant label as unsupported opcode, rather than aborting. BUG=chromium:528875 LOG=NO Review URL: https://codereview.chromium.org/1314673010 Cr-Commit-Position: refs/heads/master@{#30644}
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- 18 Aug, 2015 1 commit
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Djordje.Pesic authored
Adding missing rd register in JALR disassembly, for mips and mipps64 Review URL: https://codereview.chromium.org/1297183002 Cr-Commit-Position: refs/heads/master@{#30214}
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- 17 Aug, 2015 1 commit
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mstarzinger authored
R=yangguo@chromium.org Review URL: https://codereview.chromium.org/1299563003 Cr-Commit-Position: refs/heads/master@{#30187}
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- 30 Jul, 2015 1 commit
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Ilija.Pavlovic authored
Adapted disassembler for J and JAL instructions. TEST=cctest/test-disasm-mips/Type0, cctest/test-disasm-mips64/Type3 BUG= Review URL: https://codereview.chromium.org/1258743004 Cr-Commit-Position: refs/heads/master@{#29921}
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- 23 Jul, 2015 1 commit
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Ilija.Pavlovic authored
In simulator data trace, DSLL did not print result and BAL/BGEZAL omitted result from an instruction executed in delay slot. TEST=cctest/test-assembler-mips[64] BUG= Review URL: https://codereview.chromium.org/1245173002 Cr-Commit-Position: refs/heads/master@{#29796}
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- 03 Jul, 2015 1 commit
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Ilija.Pavlovic authored
MIPS: Disassembler enhancement. Disassembled branch instruction displays branch target absolute address. TEST=cctest/test-disasm-mips[64] BUG= Review URL: https://codereview.chromium.org/1213553004 Cr-Commit-Position: refs/heads/master@{#29462}
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- 19 Jun, 2015 1 commit
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Ilija.Pavlovic authored
Added: JIC, BEQZC, JIALC, LDPC, LWPC, ALUIPC, ADDIUPC, ALIGN/DAILGN, LWUPC, AUIPC, BC, BALC. Additional fixed compact branch offset. TEST=test-assembler-mips[64]/r6_align, r6_dalign, r6_aluipc, r6_lwpc, r6_jic, r6_beqzc, r6_jialc, r6_addiupc, r6_ldpc, r6_lwupc, r6_auipc, r6_bc, r6_balc BUG= Review URL: https://codereview.chromium.org/1195793002 Cr-Commit-Position: refs/heads/master@{#29143}
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- 01 Jun, 2015 1 commit
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erikcorry authored
When compiling on a laptop I like to concatenate the small test files. This makes a big difference to compile times. These changes make that easier. R=ulan@chromium.org BUG= Review URL: https://codereview.chromium.org/1163803002 Cr-Commit-Position: refs/heads/master@{#28742}
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- 22 May, 2015 1 commit
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Djordje.Pesic authored
Implement assembler, disassembler tests for all instructions for mips32 and mips64. Additionally, add missing single precision float instructions for r2 and r6 architecture variants in assembler, simulator and disassembler with corresponding tests. Review URL: https://codereview.chromium.org/1145223002 Cr-Commit-Position: refs/heads/master@{#28595}
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- 19 May, 2015 1 commit
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Djordje.Pesic authored
Implement assembler, disassembler tests for all instructions for mips32 and mips64. Additionally, add missing single precision float instructions for r2 and r6 architecture variants in assembler, simulator and disassembler with corresponding tests. Review URL: https://codereview.chromium.org/1147493002 Cr-Commit-Position: refs/heads/master@{#28472}
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- 14 May, 2015 2 commits
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paul.lind authored
Reason for revert: Simulator test failures in RunChangeFloat64ToInt.., RunChangeTaggedToInt32, div-mul-minus-one Original issue's description: > Implement assembler, disassembler tests for all instructions for mips32 > and mips64. Additionally, add missing single precision float instructions > for r2 and r6 architecture variants in assembler, simulator and disassembler > with corresponding tests. BUG= Review URL: https://codereview.chromium.org/1143473003 Cr-Commit-Position: refs/heads/master@{#28404}
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Djordje.Pesic authored
Implement assembler, disassembler tests for all instructions for mips32 and mips64. Additionally, add missing single precision float instructions for r2 and r6 architecture variants in assembler, simulator and disassembler with corresponding tests. Review URL: https://codereview.chromium.org/1119203003 Cr-Commit-Position: refs/heads/master@{#28402}
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- 30 Apr, 2015 1 commit
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Djordje.Pesic authored
Added rounding according to fcsr, CVT_W_D and RINT.D instruction in assembler, dissasembler and simulator and wrote appropiate tests. BUG= Review URL: https://codereview.chromium.org/1108583003 Cr-Commit-Position: refs/heads/master@{#28143}
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- 06 Apr, 2015 1 commit
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dusan.milosavljevic authored
- Fixed single float register type instruction en[de]coding in assembler and disassembler. - Added max and min instructions for r6 and corresponding tests. - Fixed selection instruction for boundary cases in simulator. - Update assembler tests to be more thorough wrt boundary cases. TEST=cctest/test-assembler-mips64/MIPS17, MIPS18 cctest/test-disasm-mips64/Type1 cctest/test-assembler-mips/MIPS16, MIPS17 cctest/test-disasm-mips/Type1 BUG= Review URL: https://codereview.chromium.org/1057323002 Cr-Commit-Position: refs/heads/master@{#27601}
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- 31 Mar, 2015 1 commit
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balazs.kilvady authored
Add missing parts of the port to MIPS/MIPS64 implementations. BUG= Review URL: https://codereview.chromium.org/1047213002 Cr-Commit-Position: refs/heads/master@{#27551}
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- 30 Mar, 2015 1 commit
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dusan.milosavljevic authored
TEST= BUG= Review URL: https://codereview.chromium.org/1046873004 Cr-Commit-Position: refs/heads/master@{#27530}
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- 01 Oct, 2014 1 commit
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paul.lind@imgtec.com authored
BUG= R=dusan.milosavljevic@imgtec.com Review URL: https://codereview.chromium.org/605113002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24343 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 12 Aug, 2014 1 commit
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dusan.milosavljevic@imgtec.com authored
Fixing gclient runhooks failure caused by reverted commit r23050. TEST= BUG= R=jkummerow@chromium.org, paul.lind@imgtec.com Review URL: https://codereview.chromium.org/467583002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23088 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 11 Aug, 2014 4 commits
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machenbach@chromium.org authored
This reverts commit r23050 for breaking runhooks on chromium. See e.g.: http://build.chromium.org/p/client.v8/builders/Chrome%20Linux%20Perf/builds/1438/steps/runhooks/logs/stdio TBR=jochen@chromium.org Review URL: https://codereview.chromium.org/458983003 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23053 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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dusan.milosavljevic@imgtec.com authored
Original commit r23028 breaks ARM64 build due to conflicting FP64 symbolic constant definition in src/globals.h and src/arm64/constants-arm64.h. TEST= BUG= R=jkummerow@chromium.org, paul.lind@imgtec.com Review URL: https://codereview.chromium.org/457313003 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23050 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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jochen@chromium.org authored
Breaks compilation of ARM64. | Additional summary: | - Introduce fp64 fpu mode into mips32 port required for r6. | - Implement runtime detections for fpu mode and arch. revision to preserve | compatibility with previous architecture revisions. | | TEST= | BUG= | R=jkummerow@chromium.org, paul.lind@imgtec.com | | Review URL: https://codereview.chromium.org/453043002 BUG=none LOG=n TBR=jkummerow@chromium.org Review URL: https://codereview.chromium.org/458193002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23030 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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dusan.milosavljevic@imgtec.com authored
Additional summary: - Introduce fp64 fpu mode into mips32 port required for r6. - Implement runtime detections for fpu mode and arch. revision to preserve compatibility with previous architecture revisions. TEST= BUG= R=jkummerow@chromium.org, paul.lind@imgtec.com Review URL: https://codereview.chromium.org/453043002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23028 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 04 Aug, 2014 1 commit
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bmeurer@chromium.org authored
This way we don't clash with the ASSERT* macros defined by GoogleTest, and we are one step closer to being able to replace our homegrown base/ with base/ from Chrome. R=jochen@chromium.org, svenpanne@chromium.org Review URL: https://codereview.chromium.org/430503007 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22812 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 30 Jun, 2014 1 commit
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jochen@chromium.org authored
Also split v8-core independent methods from checks.h to base/logging.h and merge v8checks with the rest of checks. The CPU::FlushICache method is moved to CpuFeatures::FlushICache RoundUp and related methods are moved to base/macros.h Remove all layering violations from src/libplatform BUG=none R=jkummerow@chromium.org LOG=n Review URL: https://codereview.chromium.org/358363002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22092 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 20 Jun, 2014 1 commit
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mstarzinger@chromium.org authored
R=rossberg@chromium.org Review URL: https://codereview.chromium.org/333013002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21894 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 13 Jun, 2014 1 commit
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jochen@chromium.org authored
Add wrappers to utils.h instead. BUG=none R=jkummerow@chromium.org LOG=n Review URL: https://codereview.chromium.org/328343003 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21846 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 03 Jun, 2014 1 commit
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jochen@chromium.org authored
- this avoids using relative include paths which are forbidden by the style guide - makes the code more readable since it's clear which header is meant - allows for starting to use checkdeps BUG=none R=jkummerow@chromium.org, danno@chromium.org LOG=n Review URL: https://codereview.chromium.org/304153016 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21625 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 09 May, 2014 1 commit
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ishell@chromium.org authored
1) runtime/references checks temporarily disabled (56 items left) 2) other errors fixed R=jkummerow@chromium.org Review URL: https://codereview.chromium.org/277913002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21222 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 29 Apr, 2014 1 commit
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bmeurer@chromium.org authored
R=svenpanne@chromium.org Review URL: https://codereview.chromium.org/259183002 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@21035 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 06 Dec, 2013 1 commit
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plind44@gmail.com authored
BUG= R=jkummerow@chromium.org, plind44@gmail.com Review URL: https://codereview.chromium.org/104353002 Patch from yuyin QQ <xwafish@gmail.com>. git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@18274 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 28 Aug, 2013 1 commit
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bmeurer@chromium.org authored
Don't check for WIN32 define. Use V8_OS_* macros whenever possible, and if not use _WIN32. BUG=v8:2300 R=yangguo@chromium.org Review URL: https://codereview.chromium.org/23687003 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@16380 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 28 Jun, 2013 1 commit
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jkummerow@chromium.org authored
R=jkummerow@chromium.org Review URL: https://codereview.chromium.org/18037002 Patch from Haitao Feng <haitao.feng@intel.com>. git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@15391 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 11 Apr, 2013 1 commit
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palfia@homejinni.com authored
Port r14200 (6ecb8f41), r14204 (08ba63c0) BUG= Review URL: https://codereview.chromium.org/14112003 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14218 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 09 Jan, 2013 1 commit
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yangguo@chromium.org authored
Based on commit r12958 (04586adf). BUG= TEST= Review URL: https://chromiumcodereview.appspot.com/11783049 Patch from Akos Palfi <palfia@homejinni.com>. git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13342 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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