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    • Ng Zhi An's avatar
      [wasm-simd] Share i8x16.splat implementation · bb12c48a
      Ng Zhi An authored
      The optimal implementation is in TurboFan x64 codegen, move it into
      shared-macro-assembler, and have TurboFan ia32 and Liftoff use it. The
      optimal implementation accounts for AVX2 support.
      
      We add a couple of AVX2 instruction to ia32 in sse-instr.h, not all of
      them are used, but follow-up patches will use them, so we add support
      (including diassembly and test) in this change.
      
      Drive-by clean up to test-disasm-x64.cc to merge 2 AVX2 test sections.
      
      Bug: v8:11589
      Change-Id: I1c8d7deb0f8bb70b29e7a680e5dbcfb09ca5505b
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3092555Reviewed-by: 's avatarClemens Backes <clemensb@chromium.org>
      Commit-Queue: Zhi An Ng <zhin@chromium.org>
      Cr-Commit-Position: refs/heads/main@{#76352}
      bb12c48a
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    • Ng Zhi An's avatar
      [wasm-simd][ia32] Implement double precision conversions · fec9c5d6
      Ng Zhi An authored
      Implement these 6 instructions:
      
      - f64x2.convert_low_i32x4_s
      - f64x2.convert_low_i32x4_u
      - i32x4.trunc_sat_f64x2_s_zero
      - i32x4.trunc_sat_f64x2_u_zero
      - f32x4.demote_f64x2_zero
      - f64x2.promote_low_f32x4
      
      The code sequences are exactly the same as on x64.
      
      Needed to add some more instructions, and we don't have macro lists for
      these instructions yet, so individually define them for now. We can
      factor them into lists in a future change.
      
      Bug: v8:11265
      Change-Id: I606e1226201e3c5ecdc7e3f611315437e917d77c
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2668913Reviewed-by: 's avatarDeepti Gandluri <gdeepti@chromium.org>
      Commit-Queue: Zhi An Ng <zhin@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#72535}
      fec9c5d6
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