-
Ng Zhi An authored
By delegating to the macro-assembler, emit AVX instructions for some float opcodes (float sqrt, round, conversions to and from int, extract/insert/load word). Since they now support AVX, we rename the instruction ops to remove the SSE prefix, changing it to be IA32. Bug: v8:12148 Change-Id: Ib488f03928756e7d85ab78e6cb28eb869e0641f9 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3131374Reviewed-by: Adam Klein <adamk@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/main@{#76755}
f331901d
Name |
Last commit
|
Last update |
---|---|---|
.. | ||
disasm-ia32.cc | ||
unwinder-ia32.cc |