1. 30 Apr, 2015 2 commits
  2. 08 Apr, 2015 1 commit
  3. 06 Apr, 2015 1 commit
    • dusan.milosavljevic's avatar
      MIPS: Major fixes and clean-up in asm. for instruction encoding. · 4b5af7b3
      dusan.milosavljevic authored
      - Fixed single float register type instruction en[de]coding in assembler and disassembler.
      - Added max and min instructions for r6 and corresponding tests.
      - Fixed selection instruction for boundary cases in simulator.
      - Update assembler tests to be more thorough wrt boundary cases.
      
      TEST=cctest/test-assembler-mips64/MIPS17, MIPS18
           cctest/test-disasm-mips64/Type1
           cctest/test-assembler-mips/MIPS16, MIPS17
           cctest/test-disasm-mips/Type1
      BUG=
      
      Review URL: https://codereview.chromium.org/1057323002
      
      Cr-Commit-Position: refs/heads/master@{#27601}
      4b5af7b3
  4. 02 Apr, 2015 1 commit
  5. 30 Mar, 2015 1 commit
    • balazs.kilvady's avatar
      MIPS: [turbofan] Add backend support for float32 operations. · dd402998
      balazs.kilvady authored
      Port 8dad78cd
      
      Original commit message:
      This adds the basics necessary to support float32 operations in TurboFan.
      The actual functionality required to detect safe float32 operations will
      be added based on this later. Therefore this does not affect production
      code except for some cleanup/refactoring.
      
      In detail, this patchset contains the following features:
      - Add support for float32 operations to arm, arm64, ia32 and x64
        backends.
      - Add float32 machine operators.
      - Add support for float32 constants to simplified lowering.
      - Handle float32 representation for phis in simplified lowering.
      
      In addition, contains the following (related) cleanups:
      - Fix/unify naming of backend instructions.
      - Use AVX comparisons when available.
      - Extend ArchOpcodeField to 9 bits (required for arm64).
      - Refactor some code duplication in instruction selectors.
      
      BUG=v8:3589
      LOG=n
      
      Review URL: https://codereview.chromium.org/1046953004
      
      Cr-Commit-Position: refs/heads/master@{#27531}
      dd402998
  6. 27 Mar, 2015 1 commit
  7. 23 Mar, 2015 1 commit
  8. 18 Mar, 2015 1 commit
  9. 04 Mar, 2015 1 commit
    • yangguo's avatar
      Refactor BreakLocationIterator. · 1a608493
      yangguo authored
      We now have BreakLocation::Iterator to iterate via RelocIterator, and
      create a BreakLocation when we are done iterating. The reloc info is
      stored in BreakLocation in a GC-safe way and instantiated on demand.
      
      R=ulan@chromium.org
      BUG=v8:3924
      LOG=N
      
      Review URL: https://codereview.chromium.org/967323002
      
      Cr-Commit-Position: refs/heads/master@{#26983}
      1a608493
  10. 27 Feb, 2015 1 commit
  11. 20 Feb, 2015 1 commit
  12. 17 Feb, 2015 1 commit
    • balazs.kilvady's avatar
      MIPS: reland Fix 'Assembler support for internal references.' · 53d04bc1
      balazs.kilvady authored
      Fix compilation problem with android toolchain.
      
      Added new INTERNAL_REFERENCE_ENCODED RelocInfo type to differentiate MIPS existing use of internal references in instructions from the new raw pointer reference needed for dd(Label*).
      
      BUG=
      TEST=cctest/test-assembler-mips/jump_tables1, cctest/test-assembler-mips/jump_tables2, cctest/test-assembler-mips/jump_tables3, cctest/test-run-machops/RunSwitch1
      
      Review URL: https://codereview.chromium.org/935593002
      
      Cr-Commit-Position: refs/heads/master@{#26693}
      53d04bc1
  13. 16 Feb, 2015 1 commit
  14. 15 Feb, 2015 1 commit
    • balazs.kilvady's avatar
      MIPS: Fix 'Assembler support for internal references.' · 244ac6de
      balazs.kilvady authored
      Added new INTERNAL_REFERENCE_ENCODED RelocInfo type to differentiate MIPS existing use of internal references in instructions from the new raw pointer reference needed for dd(Label*).
      
      BUG=
      TEST=cctest/test-assembler-mips/jump_tables1, cctest/test-assembler-mips/jump_tables2, cctest/test-assembler-mips/jump_tables3, cctest/test-run-machops/RunSwitch1
      
      Review URL: https://codereview.chromium.org/922043005
      
      Cr-Commit-Position: refs/heads/master@{#26651}
      244ac6de
  15. 09 Feb, 2015 1 commit
  16. 05 Feb, 2015 3 commits
  17. 04 Feb, 2015 2 commits
    • loislo's avatar
      Revert of Externalize deoptimization reasons. (patchset #6 id:100001 of... · bfc5d83b
      loislo authored
      Revert of Externalize deoptimization reasons. (patchset #6 id:100001 of https://codereview.chromium.org/874323003/)
      
      Reason for revert:
      it broke the build
      
      Original issue's description:
      > Externalize deoptimization reasons.
      >
      > 1) The hardcoded strings were converted into DeoptReason enum.
      >
      > 2) Deopt comment were converted into a pair location and deopt reason entries so
      > the deopt reason tracking mode would less affect the size of the RelocInfo table and heap.
      >
      > 3) DeoptReason entry in RelocInfo reuses kCommentTag value and generates short entry in RelocInfo table.
      >
      > BUG=452067
      > LOG=n
      >
      > Committed: https://crrev.com/c49820e45b57f128a98690940875c049f612dde6
      > Cr-Commit-Position: refs/heads/master@{#26434}
      
      TBR=alph@chromium.org,mstarzinger@chromium.org,svenpanne@chromium.org,yurys@chromium.org
      NOPRESUBMIT=true
      NOTREECHECKS=true
      NOTRY=true
      BUG=452067
      
      Review URL: https://codereview.chromium.org/892843007
      
      Cr-Commit-Position: refs/heads/master@{#26435}
      bfc5d83b
    • loislo's avatar
      Externalize deoptimization reasons. · c49820e4
      loislo authored
      1) The hardcoded strings were converted into DeoptReason enum.
      
      2) Deopt comment were converted into a pair location and deopt reason entries so
      the deopt reason tracking mode would less affect the size of the RelocInfo table and heap.
      
      3) DeoptReason entry in RelocInfo reuses kCommentTag value and generates short entry in RelocInfo table.
      
      BUG=452067
      LOG=n
      
      Review URL: https://codereview.chromium.org/874323003
      
      Cr-Commit-Position: refs/heads/master@{#26434}
      c49820e4
  18. 24 Sep, 2014 1 commit
  19. 12 Aug, 2014 1 commit
  20. 11 Aug, 2014 4 commits
  21. 06 Aug, 2014 1 commit
  22. 04 Aug, 2014 1 commit
  23. 10 Jun, 2014 1 commit
  24. 03 Jun, 2014 1 commit
  25. 20 May, 2014 1 commit
    • plind44@gmail.com's avatar
      MIPS: Avoid flushing the icache unnecessarily when updating target addresses in code. · eabf0602
      plind44@gmail.com authored
      Port r21380 (ef20a0a)
      
      Original commit message:
      This CL updates RelocInfo update operations and set_target_address_at to enable
      skipping of the icache flush if it going to be batched up later.
      Code::CopyFrom and Code::Relocate are modified to avoid individual icache
      flushes since the whole code area will be flushed after the reloc info is
      updated.
      
      These changes reduce a regression when enabling the OOL constant pool on Arm,
      since this change can cause MovT/MovW instructions for relocatable targets
      if the constant pool is full.
      
      Scores for Mandreel latency on a Nexus 5:
      - OOL CP disabled: 3533
      - OOL CP enabled, without this CL: 1825
      - OOL CP enabled, with change: 3015
      
      BUG=
      R=plind44@gmail.com
      
      Review URL: https://codereview.chromium.org/296723003
      
      Patch from Balazs Kilvady <kilvadyb@homejinni.com>.
      
      git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21390 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
      eabf0602
  26. 16 May, 2014 1 commit
    • yangguo@chromium.org's avatar
      Decouple CpuFeatures from serializer state. · fe243379
      yangguo@chromium.org authored
      Traditionally, we cross compile a snapshot iff the serializer is enabled.
      This will change in the future.
      
      Changes:
       - CpuFeatures probing is done once per process, depending on whether we
         cross compile.
       - CpuFeatures are consolidated into the platform-independent assembler.h
         as much as possible.
       - FLAG_enable_<feature> will only be checked at probing time (already the
         case for ARM).
       - The serializer state is cached by the MacroAssembler.
       - PlatformFeatureScope is no longer necessary.
       - CPUFeature enum values no longer map to CPUID bit fields.
      
      R=svenpanne@chromium.org
      
      Review URL: https://codereview.chromium.org/285233010
      
      git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21347 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
      fe243379
  27. 09 May, 2014 1 commit
  28. 05 May, 2014 1 commit
  29. 30 Apr, 2014 1 commit
  30. 28 Apr, 2014 1 commit
  31. 17 Apr, 2014 1 commit
  32. 16 Apr, 2014 1 commit
  33. 15 Apr, 2014 1 commit
    • plind44@gmail.com's avatar
      MIPS: Add big-endian support for MIPS. · 5a016958
      plind44@gmail.com authored
      Important notices:
      
      - The snapshot cannot be created for big-endian target in cross-compilation
        environment on little-endian host using simulator.
      
      - In order to have i18n support working on big-endian target, the icudt46b.dat and
        icudt46b_dat.S files should be generated and upstreamed to ICU repo.
      
      - The mjsunit 'nans' test is endian dependent, it is skipped for mips target.
      
      - The zlib and Mandreel from Octane 2.0 benchmark are endian dependent due to
        use of typed arrays.
      
      TEST=
      BUG=
      R=jkummerow@chromium.org, plind44@gmail.com
      
      Review URL: https://codereview.chromium.org/228943009
      
      Patch from Dusan Milosavljevic <Dusan.Milosavljevic@rt-rk.com>.
      
      git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20778 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
      5a016958