Commit 0f0ce4a9 authored by paul.lind's avatar paul.lind Committed by Commit bot

MIPS: Remove unused J(Label *).

Remove unused macro-asm instruction and associated address patching.

On mips64, remove unused JumpLabelToJumpRegister(). On mips, rename
it appropriately (it's still used there for JR->J optimizations).

BUG=

Review URL: https://codereview.chromium.org/1059433003

Cr-Commit-Position: refs/heads/master@{#27593}
parent 6b03f223
......@@ -123,7 +123,7 @@ void RelocInfo::apply(intptr_t delta, ICacheFlushMode icache_flush_mode) {
uint32_t scope2 = reinterpret_cast<uint32_t>(pc_) & ~kImm28Mask;
if (scope1 != scope2) {
Assembler::JumpLabelToJumpRegister(pc_);
Assembler::JumpToJumpRegister(pc_);
}
}
if (IsInternalReference(rmode_) || IsInternalReferenceEncoded(rmode_)) {
......
......@@ -663,7 +663,7 @@ int Assembler::target_at(int pos, bool is_internal) {
}
}
// Check we have a branch or jump instruction.
DCHECK(IsBranch(instr) || IsJ(instr) || IsLui(instr));
DCHECK(IsBranch(instr) || IsLui(instr));
// Do NOT change this to <<2. We rely on arithmetic shifts here, assuming
// the compiler uses arithmectic shifts for signed integers.
if (IsBranch(instr)) {
......@@ -692,17 +692,8 @@ int Assembler::target_at(int pos, bool is_internal) {
return pos - delta;
}
} else {
int32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
if (imm28 == kEndOfJumpChain) {
// EndOfChain sentinel is returned directly, not relative to pc or pos.
return kEndOfChain;
} else {
uint32_t instr_address = reinterpret_cast<int32_t>(buffer_ + pos);
instr_address &= kImm28Mask;
int delta = static_cast<int>(instr_address - imm28);
DCHECK(pos > delta);
return pos - delta;
}
UNREACHABLE();
return 0;
}
}
......@@ -724,7 +715,7 @@ void Assembler::target_at_put(int32_t pos, int32_t target_pos,
return;
}
DCHECK(IsBranch(instr) || IsJ(instr) || IsLui(instr));
DCHECK(IsBranch(instr) || IsLui(instr));
if (IsBranch(instr)) {
int32_t imm18 = target_pos - (pos + kBranchPCOffset);
DCHECK((imm18 & 3) == 0);
......@@ -749,15 +740,7 @@ void Assembler::target_at_put(int32_t pos, int32_t target_pos,
instr_at_put(pos + 1 * Assembler::kInstrSize,
instr_ori | (imm & kImm16Mask));
} else {
uint32_t imm28 = reinterpret_cast<uint32_t>(buffer_) + target_pos;
imm28 &= kImm28Mask;
DCHECK((imm28 & 3) == 0);
instr &= ~kImm26Mask;
uint32_t imm26 = imm28 >> 2;
DCHECK(is_uint26(imm26));
instr_at_put(pos, instr | (imm26 & kImm26Mask));
UNREACHABLE();
}
}
......@@ -2418,21 +2401,6 @@ int Assembler::RelocateInternalReference(RelocInfo::Mode rmode, byte* pc,
instr_at_put(pc + 1 * Assembler::kInstrSize,
instr_ori | (imm & kImm16Mask));
return 2; // Number of instructions patched.
} else if (IsJ(instr)) {
uint32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
if (static_cast<int32_t>(imm28) == kEndOfJumpChain) {
return 0; // Number of instructions patched.
}
imm28 += pc_delta;
imm28 &= kImm28Mask;
DCHECK((imm28 & 3) == 0);
instr &= ~kImm26Mask;
uint32_t imm26 = imm28 >> 2;
DCHECK(is_uint26(imm26));
instr_at_put(pc, instr | (imm26 & kImm26Mask));
return 1; // Number of instructions patched.
} else {
UNREACHABLE();
return 0;
......@@ -2759,7 +2727,7 @@ void Assembler::set_target_address_at(Address pc,
}
void Assembler::JumpLabelToJumpRegister(Address pc) {
void Assembler::JumpToJumpRegister(Address pc) {
// Address pc points to lui/ori instructions.
// Jump to label may follow at pc + 2 * kInstrSize.
uint32_t* p = reinterpret_cast<uint32_t*>(pc);
......
......@@ -531,7 +531,7 @@ class Assembler : public AssemblerBase {
// Return the code target address of the patch debug break slot
inline static Address break_address_from_return_address(Address pc);
static void JumpLabelToJumpRegister(Address pc);
static void JumpToJumpRegister(Address pc);
static void QuietNaN(HeapObject* nan);
......
......@@ -3092,24 +3092,6 @@ void MacroAssembler::Ret(Condition cond,
}
void MacroAssembler::J(Label* L, BranchDelaySlot bdslot) {
BlockTrampolinePoolScope block_trampoline_pool(this);
uint32_t imm28;
imm28 = jump_address(L);
imm28 &= kImm28Mask;
{ BlockGrowBufferScope block_buf_growth(this);
// Buffer growth (and relocation) must be blocked for internal references
// until associated instructions are emitted and available to be patched.
RecordRelocInfo(RelocInfo::INTERNAL_REFERENCE_ENCODED);
j(imm28);
}
// Emit a nop in the branch delay slot if required.
if (bdslot == PROTECT)
nop();
}
void MacroAssembler::Jr(Label* L, BranchDelaySlot bdslot) {
BlockTrampolinePoolScope block_trampoline_pool(this);
......
......@@ -1633,7 +1633,6 @@ const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT
void BranchAndLinkShort(Label* L, Condition cond, Register rs,
const Operand& rt,
BranchDelaySlot bdslot = PROTECT);
void J(Label* L, BranchDelaySlot bdslot);
void Jr(Label* L, BranchDelaySlot bdslot);
void Jalr(Label* L, BranchDelaySlot bdslot);
......
......@@ -637,7 +637,7 @@ int Assembler::target_at(int pos, bool is_internal) {
}
}
// Check we have a branch or jump instruction.
DCHECK(IsBranch(instr) || IsJ(instr) || IsLui(instr));
DCHECK(IsBranch(instr) || IsLui(instr));
// Do NOT change this to <<2. We rely on arithmetic shifts here, assuming
// the compiler uses arithmetic shifts for signed integers.
if (IsBranch(instr)) {
......@@ -673,17 +673,8 @@ int Assembler::target_at(int pos, bool is_internal) {
return pos - delta;
}
} else {
int32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
if (imm28 == kEndOfJumpChain) {
// EndOfChain sentinel is returned directly, not relative to pc or pos.
return kEndOfChain;
} else {
uint64_t instr_address = reinterpret_cast<int64_t>(buffer_ + pos);
instr_address &= kImm28Mask;
int delta = static_cast<int>(instr_address - imm28);
DCHECK(pos > delta);
return pos - delta;
}
UNREACHABLE();
return 0;
}
}
......@@ -703,7 +694,7 @@ void Assembler::target_at_put(int pos, int target_pos, bool is_internal) {
return;
}
DCHECK(IsBranch(instr) || IsJ(instr) || IsLui(instr));
DCHECK(IsBranch(instr) || IsLui(instr));
if (IsBranch(instr)) {
int32_t imm18 = target_pos - (pos + kBranchPCOffset);
DCHECK((imm18 & 3) == 0);
......@@ -734,15 +725,7 @@ void Assembler::target_at_put(int pos, int target_pos, bool is_internal) {
instr_at_put(pos + 3 * Assembler::kInstrSize,
instr_ori2 | (imm & kImm16Mask));
} else {
uint64_t imm28 = reinterpret_cast<uint64_t>(buffer_) + target_pos;
imm28 &= kImm28Mask;
DCHECK((imm28 & 3) == 0);
instr &= ~kImm26Mask;
uint32_t imm26 = imm28 >> 2;
DCHECK(is_uint26(imm26));
instr_at_put(pos, instr | (imm26 & kImm26Mask));
UNREACHABLE();
}
}
......@@ -2596,7 +2579,6 @@ int Assembler::RelocateInternalReference(RelocInfo::Mode rmode, byte* pc,
}
Instr instr = instr_at(pc);
DCHECK(RelocInfo::IsInternalReferenceEncoded(rmode));
DCHECK(IsJ(instr) || IsLui(instr));
if (IsLui(instr)) {
Instr instr_lui = instr_at(pc + 0 * Assembler::kInstrSize);
Instr instr_ori = instr_at(pc + 1 * Assembler::kInstrSize);
......@@ -2628,21 +2610,8 @@ int Assembler::RelocateInternalReference(RelocInfo::Mode rmode, byte* pc,
instr_ori2 | (imm & kImm16Mask));
return 4; // Number of instructions patched.
} else {
uint32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
if (static_cast<int32_t>(imm28) == kEndOfJumpChain) {
return 0; // Number of instructions patched.
}
imm28 += pc_delta;
imm28 &= kImm28Mask;
DCHECK((imm28 & 3) == 0);
instr &= ~kImm26Mask;
uint32_t imm26 = imm28 >> 2;
DCHECK(is_uint26(imm26));
instr_at_put(pc, instr | (imm26 & kImm26Mask));
return 1; // Number of instructions patched.
UNREACHABLE();
return 0; // Number of instructions patched.
}
}
......@@ -2916,40 +2885,6 @@ void Assembler::set_target_address_at(Address pc,
}
void Assembler::JumpLabelToJumpRegister(Address pc) {
// Address pc points to lui/ori instructions.
// Jump to label may follow at pc + 2 * kInstrSize.
uint32_t* p = reinterpret_cast<uint32_t*>(pc);
#ifdef DEBUG
Instr instr1 = instr_at(pc);
#endif
Instr instr2 = instr_at(pc + 1 * kInstrSize);
Instr instr3 = instr_at(pc + 6 * kInstrSize);
bool patched = false;
if (IsJal(instr3)) {
DCHECK(GetOpcodeField(instr1) == LUI);
DCHECK(GetOpcodeField(instr2) == ORI);
uint32_t rs_field = GetRt(instr2) << kRsShift;
uint32_t rd_field = ra.code() << kRdShift; // Return-address (ra) reg.
*(p+6) = SPECIAL | rs_field | rd_field | JALR;
patched = true;
} else if (IsJ(instr3)) {
DCHECK(GetOpcodeField(instr1) == LUI);
DCHECK(GetOpcodeField(instr2) == ORI);
uint32_t rs_field = GetRt(instr2) << kRsShift;
*(p+6) = SPECIAL | rs_field | JR;
patched = true;
}
if (patched) {
CpuFeatures::FlushICache(pc+6, sizeof(int32_t));
}
}
Handle<ConstantPoolArray> Assembler::NewConstantPool(Isolate* isolate) {
// No out-of-line constant pool support.
DCHECK(!FLAG_enable_ool_constant_pool);
......
......@@ -524,8 +524,6 @@ class Assembler : public AssemblerBase {
// Return the code target address of the patch debug break slot
inline static Address break_address_from_return_address(Address pc);
static void JumpLabelToJumpRegister(Address pc);
static void QuietNaN(HeapObject* nan);
// This sets the branch destination (which gets loaded at the call address).
......
......@@ -3107,24 +3107,6 @@ void MacroAssembler::Ret(Condition cond,
}
void MacroAssembler::J(Label* L, BranchDelaySlot bdslot) {
BlockTrampolinePoolScope block_trampoline_pool(this);
uint64_t imm28;
imm28 = jump_address(L);
imm28 &= kImm28Mask;
{ BlockGrowBufferScope block_buf_growth(this);
// Buffer growth (and relocation) must be blocked for internal references
// until associated instructions are emitted and available to be patched.
RecordRelocInfo(RelocInfo::INTERNAL_REFERENCE_ENCODED);
j(imm28);
}
// Emit a nop in the branch delay slot if required.
if (bdslot == PROTECT)
nop();
}
void MacroAssembler::Jr(Label* L, BranchDelaySlot bdslot) {
BlockTrampolinePoolScope block_trampoline_pool(this);
......
......@@ -1702,7 +1702,6 @@ const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT
void BranchAndLinkShort(Label* L, Condition cond, Register rs,
const Operand& rt,
BranchDelaySlot bdslot = PROTECT);
void J(Label* L, BranchDelaySlot bdslot);
void Jr(Label* L, BranchDelaySlot bdslot);
void Jalr(Label* L, BranchDelaySlot bdslot);
......
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