MIPS: Add min/max suffixed variants.

TEST=
BUG=

Review URL: https://codereview.chromium.org/1118693002

Cr-Commit-Position: refs/heads/master@{#28181}

src/mips/assembler-mips.cc

@@ -2344,6 +2344,46 @@ void Assembler::maxa(SecondaryField fmt, FPURegister fd, FPURegister fs,
 }
 
 
+void Assembler::min_s(FPURegister fd, FPURegister fs, FPURegister ft) {
+  min(S, fd, fs, ft);
+}
+
+
+void Assembler::min_d(FPURegister fd, FPURegister fs, FPURegister ft) {
+  min(D, fd, fs, ft);
+}
+
+
+void Assembler::max_s(FPURegister fd, FPURegister fs, FPURegister ft) {
+  max(S, fd, fs, ft);
+}
+
+
+void Assembler::max_d(FPURegister fd, FPURegister fs, FPURegister ft) {
+  max(D, fd, fs, ft);
+}
+
+
+void Assembler::mina_s(FPURegister fd, FPURegister fs, FPURegister ft) {
+  mina(S, fd, fs, ft);
+}
+
+
+void Assembler::mina_d(FPURegister fd, FPURegister fs, FPURegister ft) {
+  mina(D, fd, fs, ft);
+}
+
+
+void Assembler::maxa_s(FPURegister fd, FPURegister fs, FPURegister ft) {
+  maxa(S, fd, fs, ft);
+}
+
+
+void Assembler::maxa_d(FPURegister fd, FPURegister fs, FPURegister ft) {
+  maxa(D, fd, fs, ft);
+}
+
+
 void Assembler::cvt_s_w(FPURegister fd, FPURegister fs) {
   GenInstrRegister(COP1, W, f0, fs, fd, CVT_S_W);
 }

src/mips/assembler-mips.h

@@ -931,6 +931,14 @@ class Assembler : public AssemblerBase {
   void mina(SecondaryField fmt, FPURegister fd, FPURegister fs, FPURegister ft);
   void max(SecondaryField fmt, FPURegister fd, FPURegister fs, FPURegister ft);
   void maxa(SecondaryField fmt, FPURegister fd, FPURegister fs, FPURegister ft);
+  void min_s(FPURegister fd, FPURegister fs, FPURegister ft);
+  void min_d(FPURegister fd, FPURegister fs, FPURegister ft);
+  void max_s(FPURegister fd, FPURegister fs, FPURegister ft);
+  void max_d(FPURegister fd, FPURegister fs, FPURegister ft);
+  void mina_s(FPURegister fd, FPURegister fs, FPURegister ft);
+  void mina_d(FPURegister fd, FPURegister fs, FPURegister ft);
+  void maxa_s(FPURegister fd, FPURegister fs, FPURegister ft);
+  void maxa_d(FPURegister fd, FPURegister fs, FPURegister ft);
 
   void cvt_s_w(FPURegister fd, FPURegister fs);
   void cvt_s_l(FPURegister fd, FPURegister fs);

src/mips64/assembler-mips64.cc

@@ -2100,6 +2100,46 @@ void Assembler::movf(Register rd, Register rs, uint16_t cc) {
 }
 
 
+void Assembler::min_s(FPURegister fd, FPURegister fs, FPURegister ft) {
+  min(S, fd, fs, ft);
+}
+
+
+void Assembler::min_d(FPURegister fd, FPURegister fs, FPURegister ft) {
+  min(D, fd, fs, ft);
+}
+
+
+void Assembler::max_s(FPURegister fd, FPURegister fs, FPURegister ft) {
+  max(S, fd, fs, ft);
+}
+
+
+void Assembler::max_d(FPURegister fd, FPURegister fs, FPURegister ft) {
+  max(D, fd, fs, ft);
+}
+
+
+void Assembler::mina_s(FPURegister fd, FPURegister fs, FPURegister ft) {
+  mina(S, fd, fs, ft);
+}
+
+
+void Assembler::mina_d(FPURegister fd, FPURegister fs, FPURegister ft) {
+  mina(D, fd, fs, ft);
+}
+
+
+void Assembler::maxa_s(FPURegister fd, FPURegister fs, FPURegister ft) {
+  maxa(S, fd, fs, ft);
+}
+
+
+void Assembler::maxa_d(FPURegister fd, FPURegister fs, FPURegister ft) {
+  maxa(D, fd, fs, ft);
+}
+
+
 void Assembler::sel(SecondaryField fmt, FPURegister fd, FPURegister fs,
                     FPURegister ft) {
   DCHECK(kArchVariant == kMips64r6);

src/mips64/assembler-mips64.h

@@ -962,6 +962,14 @@ class Assembler : public AssemblerBase {
   void mina(SecondaryField fmt, FPURegister fd, FPURegister fs, FPURegister ft);
   void max(SecondaryField fmt, FPURegister fd, FPURegister fs, FPURegister ft);
   void maxa(SecondaryField fmt, FPURegister fd, FPURegister fs, FPURegister ft);
+  void min_s(FPURegister fd, FPURegister fs, FPURegister ft);
+  void min_d(FPURegister fd, FPURegister fs, FPURegister ft);
+  void max_s(FPURegister fd, FPURegister fs, FPURegister ft);
+  void max_d(FPURegister fd, FPURegister fs, FPURegister ft);
+  void mina_s(FPURegister fd, FPURegister fs, FPURegister ft);
+  void mina_d(FPURegister fd, FPURegister fs, FPURegister ft);
+  void maxa_s(FPURegister fd, FPURegister fs, FPURegister ft);
+  void maxa_d(FPURegister fd, FPURegister fs, FPURegister ft);
 
   void cvt_s_w(FPURegister fd, FPURegister fs);
   void cvt_s_l(FPURegister fd, FPURegister fs);

test/cctest/test-assembler-mips.cc

@@ -1425,8 +1425,8 @@ TEST(MIPS17) {
 
     __ ldc1(f4, MemOperand(a0, OFFSET_OF(TestFloat, a)));
     __ ldc1(f8, MemOperand(a0, OFFSET_OF(TestFloat, b)));
-    __ min(D, f10, f4, f8);
-    __ max(D, f12, f4, f8);
+    __ min_d(f10, f4, f8);
+    __ max_d(f12, f4, f8);
     __ sdc1(f10, MemOperand(a0, OFFSET_OF(TestFloat, c)));
     __ sdc1(f12, MemOperand(a0, OFFSET_OF(TestFloat, d)));
     __ jr(ra);

test/cctest/test-assembler-mips64.cc

@@ -1535,8 +1535,8 @@ TEST(MIPS18) {
 
     __ ldc1(f4, MemOperand(a0, OFFSET_OF(TestFloat, a)));
     __ ldc1(f8, MemOperand(a0, OFFSET_OF(TestFloat, b)));
-    __ min(D, f10, f4, f8);
-    __ max(D, f12, f4, f8);
+    __ min_d(f10, f4, f8);
+    __ max_d(f12, f4, f8);
     __ sdc1(f10, MemOperand(a0, OFFSET_OF(TestFloat, c)));
     __ sdc1(f12, MemOperand(a0, OFFSET_OF(TestFloat, d)));
     __ jr(ra);

test/cctest/test-disasm-mips.cc

@@ -536,8 +536,8 @@ TEST(Type1) {
     COMPARE(seleqz(D, f3, f4, f5), "462520d4       seleqz.d    f3, f4, f5");
     COMPARE(selnez(D, f3, f4, f5), "462520d7       selnez.d    f3, f4, f5");
 
-    COMPARE(min(D, f3, f4, f5), "462520dc       min.d    f3, f4, f5");
-    COMPARE(max(D, f3, f4, f5), "462520de       max.d    f3, f4, f5");
+    COMPARE(min_d(f3, f4, f5), "462520dc       min.d    f3, f4, f5");
+    COMPARE(max_d(f3, f4, f5), "462520de       max.d    f3, f4, f5");
     COMPARE(rint_d(f8, f6), "4620321a       rint.d    f8, f6");
 
     VERIFY_RUN();

test/cctest/test-disasm-mips64.cc

@@ -683,8 +683,8 @@ TEST(Type1) {
     COMPARE(seleqz(D, f3, f4, f5), "462520d4       seleqz.d    f3, f4, f5");
     COMPARE(selnez(D, f3, f4, f5), "462520d7       selnez.d    f3, f4, f5");
 
-    COMPARE(min(D, f3, f4, f5), "462520dc       min.d    f3, f4, f5");
-    COMPARE(max(D, f3, f4, f5), "462520de       max.d    f3, f4, f5");
+    COMPARE(min_d(f3, f4, f5), "462520dc       min.d    f3, f4, f5");
+    COMPARE(max_d(f3, f4, f5), "462520de       max.d    f3, f4, f5");
     COMPARE(rint_d(f8, f6), "4620321a       rint.d    f8, f6");
     VERIFY_RUN();
   }