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  1. 30 Jan, 2018 1 commit
  3. 16 Oct, 2017 3 commits
    • Junliang Yan's avatar
      Reland "PPC/s390: Fix arguement handling" · 11291891
      Junliang Yan authored 
      This is a reland of af49af00
Original change's description:
> PPC/s390: Fix arguement handling
> 
> 1. in AssembleMove and AssembleSwap, we need to distinguish Double and Float
> 2. in 32-bit mode, double needs to be counted as 2 slots in stack
> 
> R=joransiu@ca.ibm.com, jbarboza@ca.ibm.com, michael_dawson@ca.ibm.com, mmallick@ca.ibm.com
> 
> Bug: 
> Change-Id: Iffe1844aa72e9d4c9492034c3df9a994e1304a27
> Reviewed-on: https://chromium-review.googlesource.com/720676
> Reviewed-by: Joran Siu <joransiu@ca.ibm.com>
> Commit-Queue: Junliang Yan <jyan@ca.ibm.com>
> Cr-Commit-Position: refs/heads/master@{#48593}

Change-Id: If91125e71b82c92f54f537345e4c213bd185e786
Reviewed-on: https://chromium-review.googlesource.com/721419Reviewed-by: 's avatarJoran Siu <joransiu@ca.ibm.com>
Commit-Queue: Junliang Yan <jyan@ca.ibm.com>
Cr-Commit-Position: refs/heads/master@{#48610}
      11291891
    • Junliang Yan's avatar
      Revert "PPC/s390: Fix arguement handling" · 34ba7e94
      Junliang Yan authored 
      This reverts commit af49af00.

Reason for revert: <INSERT REASONING HERE>

There is a mistake in codegen to cause error in snapshot.

Original change's description:
> PPC/s390: Fix arguement handling
> 
> 1. in AssembleMove and AssembleSwap, we need to distinguish Double and Float
> 2. in 32-bit mode, double needs to be counted as 2 slots in stack
> 
> R=​joransiu@ca.ibm.com, jbarboza@ca.ibm.com, michael_dawson@ca.ibm.com, mmallick@ca.ibm.com
> 
> Bug: 
> Change-Id: Iffe1844aa72e9d4c9492034c3df9a994e1304a27
> Reviewed-on: https://chromium-review.googlesource.com/720676
> Reviewed-by: Joran Siu <joransiu@ca.ibm.com>
> Commit-Queue: Junliang Yan <jyan@ca.ibm.com>
> Cr-Commit-Position: refs/heads/master@{#48593}

TBR=michael_dawson@ca.ibm.com,jyan@ca.ibm.com,joransiu@ca.ibm.com,jbarboza@ca.ibm.com,mmallick@ca.ibm.com

Change-Id: I76b7eb96e7bfc15e3d2b07474543e996b9ea5f86
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Reviewed-on: https://chromium-review.googlesource.com/721140Reviewed-by: 's avatarJoran Siu <joransiu@ca.ibm.com>
Commit-Queue: Junliang Yan <jyan@ca.ibm.com>
Cr-Commit-Position: refs/heads/master@{#48600}
      34ba7e94
    • Junliang Yan's avatar
      PPC/s390: Fix arguement handling · af49af00
      Junliang Yan authored 
      1. in AssembleMove and AssembleSwap, we need to distinguish Double and Float
2. in 32-bit mode, double needs to be counted as 2 slots in stack

R=joransiu@ca.ibm.com, jbarboza@ca.ibm.com, michael_dawson@ca.ibm.com, mmallick@ca.ibm.com

Bug: 
Change-Id: Iffe1844aa72e9d4c9492034c3df9a994e1304a27
Reviewed-on: https://chromium-review.googlesource.com/720676Reviewed-by: 's avatarJoran Siu <joransiu@ca.ibm.com>
Commit-Queue: Junliang Yan <jyan@ca.ibm.com>
Cr-Commit-Position: refs/heads/master@{#48593}
      af49af00
  5. 31 Mar, 2017 1 commit
  7. 17 Feb, 2017 1 commit
  9. 30 Jan, 2017 1 commit
  11. 25 Jan, 2017 1 commit
    • jyan's avatar
      s390: TF Codegen Optimization · f7a3ede0
      jyan authored 
      List of items:
  1. Avoid zero-extending for subsequent 32-bit operations if current operation does not change upper 32-bit or does zero-extending.
  2. Match complex address mode for binary operation where possible (eg. use Add R,MEM).
  3. Detect instruction forms in selector. Eg. kAllowRRR, kAllowRM
  4. Optimize sequence for Int32MulWithOverflow, Int32Div, etc.
  5. Remove Not32/Not64 which is the same as XOR

R=bjaideep@ca.ibm.com, joransiu@ca.ibm.com
BUG=

Review-Url: https://codereview.chromium.org/2649113007
Cr-Commit-Position: refs/heads/master@{#42669}
      f7a3ede0
  13. 16 Jan, 2017 1 commit
  15. 22 Aug, 2016 1 commit
  17. 15 Aug, 2016 1 commit
  19. 09 Aug, 2016 1 commit
  21. 08 Aug, 2016 1 commit
    • jyan's avatar
      S390: Decouple Add/Sub/Neg to 32/64 Bit Op · dc884581
      jyan authored 
      1. Decouple kS390_Add/Sub/Neg to
     kS390_Add32/Sub32/Neg32/Add64/Sub64/Neg64
2. Nuke kS390_Add/SubWithOverflow32
3. Add Support for Load-On-Condition to optimize AssembleArchBoolean

R=joransiu@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com, bjaideep@ca.ibm.com
BUG=

Review-Url: https://codereview.chromium.org/2220313002
Cr-Commit-Position: refs/heads/master@{#38443}
      dc884581
  23. 05 Aug, 2016 1 commit
  25. 04 Aug, 2016 1 commit
  27. 29 Jul, 2016 1 commit
  29. 15 Jul, 2016 1 commit
  31. 15 Jun, 2016 1 commit
    • jyan's avatar
      S390: [turbofan] Prevent storing signalling NaNs into holey double arrays. · 2dedf215
      jyan authored 
      Port 6470ddad

Original commit message:

    This introduces SilenceNaN operator, which makes sure that we only
    store quiet NaNs into holey arrays. We omit the NaN silencing code
    at instruction selection time if the input is an operation that
    cannot possibly produce signalling NaNs.

R=jarin@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com, bjaideep@ca.ibm.com

BUG=
LOG=N

Review-Url: https://codereview.chromium.org/2070583002
Cr-Commit-Position: refs/heads/master@{#37012}
      2dedf215
  33. 14 Jun, 2016 1 commit
    • jyan's avatar
      S390: [builtins] Introduce proper Float64Log1p, Float64Atan and Float64Atan2 operators. · b78b0bf9
      jyan authored 
      Port 7ceed92a
Port 89d8c57b

Original commit message:

    Import base::ieee754::atan() and base::ieee754::atan2() from fdlibm and
    introduce Float64Atan and Float64Atan2 TurboFan operators based on those,
    similar to what we already did for Float64Log and Float64Log1p. Rewrite
    Math.atan() and Math.atan2() as TurboFan builtin and use the operators
    to also inline Math.atan() and Math.atan2() into optimized TurboFan functions.

    Import base::ieee754::log1p() from fdlibm and introduce a Float64Log1p
    TurboFan operator based on that, similar to what we do for Float64Log.
    Rewrite Math.log1p() as TurboFan builtin and use that operator to also
    inline Math.log1p() into optimized TurboFan functions.

    Also unify the handling of the special IEEE 754 functions somewhat in
    the TurboFan backends. At some point we can hopefully express this
    completely in the InstructionSelector (once we have an idea what to do
    with the ST(0) return issue on IA-32/X87).

    Drive-by-fix: Add some more test coverage for the log function.

R=bmeurer@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com, bjaideep@ca.ibm.com
BUG=

Review-Url: https://codereview.chromium.org/2064783002
Cr-Commit-Position: refs/heads/master@{#36946}
      b78b0bf9
  35. 04 Jun, 2016 1 commit
    • jyan's avatar
      S390: [builtins] Migrate Math.log to TurboFan. · 00c158a6
      jyan authored 
      Port f2da19fe

Original commit message:

    Introduce a dedicated Float64Log machine operator, that is either
    implemented by a direct C call or by platform specific code, i.e.
    using the FPU on x64 and ia32.

    This operator is used to implement Math.log as a proper TurboFan
    builtin on top of the CodeStubAssembler.

    Also introduce a NumberLog simplified operator on top of Float64Log
    and use that for the fast inline path of Math.log inside TurboFan
    optimized code.

R=bmeurer@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com, bjaideep@ca.ibm.com
BUG=

Review-Url: https://codereview.chromium.org/2033353003
Cr-Commit-Position: refs/heads/master@{#36724}
      00c158a6
  37. 25 Apr, 2016 1 commit
    • jyan's avatar
      S390X: [turbofan] Word32 loads should be unsigned. · 6382a610
      jyan authored 
      TEST=cctest/test-run-load-store/*
R=joransiu@ca.ibm.com, mbrandy@us.ibm.com, michael_dawson@ca.ibm.com, bjaideep@ca.ibm.com
BUG=

S390: [interpreter] Heal closures when bytecode array is gone.

Port 5c8609de

Original commit message:

    This ensures the InterpreterEntryTrampoline heals code entry fields
    inside closures when being called without a valid bytecode array. This
    is preparatory work to allow removal of bytecode when switching some
    functions to other types of code.

R=mstarzinger@chromium.org, joransiu@ca.ibm.com, bjaideep@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com

BUG=v8:4280
LOG=N

Review URL: https://codereview.chromium.org/1916143002

Cr-Commit-Position: refs/heads/master@{#35779}
      6382a610
  39. 31 Mar, 2016 1 commit
    • jyan's avatar
      S390: [wasm] Int64Lowering of Int64Mul. · b295462e
      jyan authored 
      port 40bdbef9

 Original commit message:
     Int64Mul is lowered to a new turbofan operator, Int32MulPair. The new
     operator takes 4 inputs an generates 2 outputs. The inputs are the low
     word of the left input, high word of the left input, the low word of the
     right input, and high word of the right input. The ouputs are the low
     and high word of the result of the multiplication.

R=titzer@chromium.org, joransiu@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com
BUG=

Review URL: https://codereview.chromium.org/1849543003

Cr-Commit-Position: refs/heads/master@{#35167}
      b295462e
  41. 17 Mar, 2016 1 commit
    • jyan's avatar
      S390: [wasm] Int64Lowering of Int64Sub. · 680f50a9
      jyan authored 
          Port 33c08596

    Original commit message:
        Int64Sub is lowered to a new turbofan operator, Int32SubPair. The new
        operator takes 4 inputs an generates 2 outputs. The inputs are the low
        word of the left input, high word of the left input, the low word of the
        right input, and high word of the right input. The ouputs are the low
        and high word of the result of the subtraction.

        The implementation is very similar to the implementation of Int64Add.

R=ahaas@chromium.org, joransiu@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com
BUG=

Review URL: https://codereview.chromium.org/1807243002

Cr-Commit-Position: refs/heads/master@{#34865}
      680f50a9
  43. 16 Mar, 2016 1 commit
    • jyan's avatar
      S390: [wasm] Int64Lowering of Int64Add · 06bceeb7
      jyan authored 
      Original commit message:
    Int64Add is lowered to a new turbofan operator, Int32AddPair. The new
    operator takes 4 inputs an generates 2 outputs. The inputs are the low
    word of the left input, high word of the left input, the low word of the
    right input, and high word of the right input. The ouputs are the low
    and high word of the result of the addition.

R=ahaas@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com
BUG=

Review URL: https://codereview.chromium.org/1807013002

Cr-Commit-Position: refs/heads/master@{#34840}
      06bceeb7
  45. 15 Mar, 2016 1 commit
  47. 04 Mar, 2016 1 commit