- 21 Feb, 2018 1 commit
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Martyn Capewell authored
Add support for CSDB, equivalent to HINT #20, in the system instruction space. Additionally, relax the "unallocated" identification of hint instructions that we don't support, such that they'll now disassemble as "unimplemented (System)" rather than "unallocated". Change-Id: Ia36d13fe17a98edb872f234e7cdda33d033618e8 Reviewed-on: https://chromium-review.googlesource.com/926806Reviewed-by:
Ross McIlroy <rmcilroy@chromium.org> Commit-Queue: Martyn Capewell <martyn.capewell@arm.com> Cr-Commit-Position: refs/heads/master@{#51420}
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- 16 Jan, 2018 1 commit
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Martyn Capewell authored
Remove remaining references to jssp, and return register to the allocator. Bug: v8:6644 Change-Id: Ia6938e6c9548cd45d8c9c12032920b32d3da3c4c Reviewed-on: https://chromium-review.googlesource.com/866747Reviewed-by:
Benedikt Meurer <bmeurer@chromium.org> Commit-Queue: Martyn Capewell <martyn.capewell@arm.com> Cr-Commit-Position: refs/heads/master@{#50613}
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- 02 Aug, 2017 1 commit
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Julien Brianceau authored
Bug: chromium:750830 Cq-Include-Trybots: master.tryserver.blink:linux_trusty_blink_rel;master.tryserver.chromium.linux:linux_chromium_rel_ng;master.tryserver.v8:v8_linux_noi18n_rel_ng Change-Id: Icab7b5a1c469d5e77d04df8bfca8319784e92af4 Reviewed-on: https://chromium-review.googlesource.com/595655 Commit-Queue: Julien Brianceau <jbriance@cisco.com> Reviewed-by:
Yang Guo <yangguo@chromium.org> Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Reviewed-by:
Clemens Hammacher <clemensh@chromium.org> Reviewed-by:
Daniel Ehrenberg <littledan@chromium.org> Cr-Commit-Position: refs/heads/master@{#47072}
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- 31 May, 2017 1 commit
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martyn.capewell authored
This reverts commit c5aad5f2 The CL was reverted due to missing Chromium dependencies. This commit removes the simulator trace-based tests, and the associated header file dependencies, previously pulled in by DEPS. The NEON support now has only hand-written tests, in test-assembler-arm64.cc. The remaining tests can be added in a later patch. BUG=chromium:718439 Original issue's description: > Reland "ARM64: Add NEON support" > > This reverts commit cc047635. > The CL was reverted due to a missing DEPS mirror. > > Original issue's description: > > ARM64: Add NEON support > > > > Add assembler, disassembler and simulator support for NEON in the ARM64 backend. > > > > BUG= > > > > Review-Url: https://codereview.chromium.org/2622643005 > > Cr-Commit-Position: refs/heads/master@{#44306} > > BUG= > > Review-Url: https://codereview.chromium.org/2812573003 > Cr-Commit-Position: refs/heads/master@{#44652} Review-Url: https://codereview.chromium.org/2896303003 Cr-Commit-Position: refs/heads/master@{#45633}
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- 22 May, 2017 1 commit
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Wiktor Garbacz authored
Change-Id: I20ed35a7fb5104a9cc66bb54fa8966589c43d7f9 Reviewed-on: https://chromium-review.googlesource.com/507287Reviewed-by:
Andreas Haas <ahaas@chromium.org> Reviewed-by:
Benedikt Meurer <bmeurer@chromium.org> Reviewed-by:
Daniel Clifford <danno@chromium.org> Reviewed-by:
Jakob Gruber <jgruber@chromium.org> Reviewed-by:
Marja Hölttä <marja@chromium.org> Reviewed-by:
Jochen Eisinger <jochen@chromium.org> Commit-Queue: Wiktor Garbacz <wiktorg@google.com> Cr-Commit-Position: refs/heads/master@{#45458}
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- 15 Apr, 2017 1 commit
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hablich authored
This reverts commit 8faf3d6f. Reason: blocks roll https://codereview.chromium.org/2820753003/ TBR=martyn.capewell@arm.com,jarin@chromium.org,bmeurer@chromium.org,machenbach@chromium.org NOTRY=true Review-Url: https://codereview.chromium.org/2819093002 Cr-Commit-Position: refs/heads/master@{#44660}
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- 13 Apr, 2017 1 commit
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martyn.capewell authored
This reverts commit cc047635. The CL was reverted due to a missing DEPS mirror. Original issue's description: > ARM64: Add NEON support > > Add assembler, disassembler and simulator support for NEON in the ARM64 backend. > > BUG= > > Review-Url: https://codereview.chromium.org/2622643005 > Cr-Commit-Position: refs/heads/master@{#44306} BUG= Review-Url: https://codereview.chromium.org/2812573003 Cr-Commit-Position: refs/heads/master@{#44652}
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- 31 Mar, 2017 2 commits
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machenbach authored
This reverts commit 4506382d. We don't allow DEPS'ing things outside googlesource. This requires a mirror. Also .gitignore entry is missing. NOTRY=true NOTREECHECKS=true NOPRESUBMIT=true TBR=bmeurer@chromium.org Review-Url: https://codereview.chromium.org/2785183005 Cr-Commit-Position: refs/heads/master@{#44307}
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martyn.capewell authored
Add assembler, disassembler and simulator support for NEON in the ARM64 backend. BUG= Review-Url: https://codereview.chromium.org/2622643005 Cr-Commit-Position: refs/heads/master@{#44306}
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- 28 Mar, 2017 1 commit
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martyn.capewell authored
Implement ASSEMBLE_ATOMIC_LOAD/STORE_INTEGER using acquire/release instructions, to match the existing ASSEMBLE_ATOMIC_EXCHANGE_INTEGER macro. BUG=v8:6097 Review-Url: https://codereview.chromium.org/2760963002 Cr-Commit-Position: refs/heads/master@{#44184}
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- 28 Feb, 2017 1 commit
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aseemgarg authored
Revert "Revert of [Atomics] Implement ldaxr/stlxr instructions in ARM64 simulator (patchset #8 id:140001 of https://codereview.chromium.org/2711473002/ )" This reverts commit 2362f869. BUG=v8:4614 Review-Url: https://codereview.chromium.org/2720133004 Cr-Commit-Position: refs/heads/master@{#43467}
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- 27 Feb, 2017 2 commits
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littledan authored
Revert of [Atomics] Implement ldaxr/stlxr instructions in ARM64 simulator (patchset #8 id:140001 of https://codereview.chromium.org/2711473002/ ) Reason for revert: The tree is closed due to an msan violation (use of uninitialized value) in the arm64 simulator soon after this patch landed; this seems related https://build.chromium.org/p/client.v8/builders/V8%20Linux%20-%20arm64%20-%20sim%20-%20MSAN/builds/13607/steps/Check/logs/simulator_invalidate_.. Original issue's description: > [Atomics] Implement ldaxr/stlxr instructions in ARM64 simulator > > BUG=v8:4614 > R=binji@chromium.org > > Review-Url: https://codereview.chromium.org/2711473002 > Cr-Commit-Position: refs/heads/master@{#43461} > Committed: https://chromium.googlesource.com/v8/v8/+/a2a2c1b9eeccd86e77f2c7e6eda3e1b09bb5306c TBR=binji@chromium.org,jarin@chromium.org,jacob.bramley@arm.com,aseemgarg@chromium.org # Skipping CQ checks because original CL landed less than 1 days ago. NOPRESUBMIT=true NOTREECHECKS=true NOTRY=true BUG=v8:4614 Review-Url: https://codereview.chromium.org/2720133003 Cr-Commit-Position: refs/heads/master@{#43463}
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aseemgarg authored
BUG=v8:4614 R=binji@chromium.org Review-Url: https://codereview.chromium.org/2711473002 Cr-Commit-Position: refs/heads/master@{#43461}
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- 19 May, 2016 1 commit
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binji authored
They are not currently implemented by the ARM64 simulator. R=jarin@chromium.org, bmeurer@chromium.org Review-Url: https://codereview.chromium.org/1990073002 Cr-Commit-Position: refs/heads/master@{#36385}
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- 10 Dec, 2015 1 commit
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mstarzinger authored
R=jochen@chromium.org Review URL: https://codereview.chromium.org/1506233008 Cr-Commit-Position: refs/heads/master@{#32745}
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- 08 Oct, 2015 1 commit
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jacob.bramley authored
This fixes several warnings when cross-building using GCC (since r31087, 5cf1c0bc). In particular, CPURegister::code() now returns 'int', matching the other platforms (and the coding style guide). The rest of the patch consists of similar changes to make this work. BUG= Review URL: https://codereview.chromium.org/1393043003 Cr-Commit-Position: refs/heads/master@{#31176}
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- 02 Oct, 2015 3 commits
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danno authored
Previous to this patch, both the lithium and TurboFan register allocators tracked allocated registers by "indices", rather than the register codes used elsewhere in the runtime. This patch ensures that codes are used everywhere, and in the process cleans up a bunch of redundant code and adds more structure to how the set of allocatable registers is defined. Some highlights of changes: * TurboFan's RegisterConfiguration class moved to V8's top level so that it can be shared with Crankshaft. * Various "ToAllocationIndex" and related methods removed. * Code that can be easily shared between Register classes on different platforms is now shared. * The list of allocatable registers on each platform is declared as a list rather than implicitly via the register index <-> code mapping. Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2 Cr-Commit-Position: refs/heads/master@{#30913} Committed: https://crrev.com/7b7a8205d9a00c678fb7a6e032a55fecbc1509cf Cr-Commit-Position: refs/heads/master@{#31075} Review URL: https://codereview.chromium.org/1287383003 Cr-Commit-Position: refs/heads/master@{#31087}
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danno authored
Revert of Reland: Remove register index/code indirection (patchset #20 id:380001 of https://codereview.chromium.org/1287383003/ ) Reason for revert: Failures on MIPS Original issue's description: > Remove register index/code indirection > > Previous to this patch, both the lithium and TurboFan register > allocators tracked allocated registers by "indices", rather than > the register codes used elsewhere in the runtime. This patch > ensures that codes are used everywhere, and in the process cleans > up a bunch of redundant code and adds more structure to how the > set of allocatable registers is defined. > > Some highlights of changes: > > * TurboFan's RegisterConfiguration class moved to V8's top level > so that it can be shared with Crankshaft. > * Various "ToAllocationIndex" and related methods removed. > * Code that can be easily shared between Register classes on > different platforms is now shared. > * The list of allocatable registers on each platform is declared > as a list rather than implicitly via the register index <-> > code mapping. > > Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2 > Cr-Commit-Position: refs/heads/master@{#30913} > > Committed: https://crrev.com/7b7a8205d9a00c678fb7a6e032a55fecbc1509cf > Cr-Commit-Position: refs/heads/master@{#31075} TBR=akos.palfi@imgtec.com,bmeurer@chromium.org,jarin@chromium.org,paul.lind@imgtec.com,titzer@chromium.org NOPRESUBMIT=true NOTREECHECKS=true NOTRY=true Review URL: https://codereview.chromium.org/1380863004 Cr-Commit-Position: refs/heads/master@{#31083}
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danno authored
Previous to this patch, both the lithium and TurboFan register allocators tracked allocated registers by "indices", rather than the register codes used elsewhere in the runtime. This patch ensures that codes are used everywhere, and in the process cleans up a bunch of redundant code and adds more structure to how the set of allocatable registers is defined. Some highlights of changes: * TurboFan's RegisterConfiguration class moved to V8's top level so that it can be shared with Crankshaft. * Various "ToAllocationIndex" and related methods removed. * Code that can be easily shared between Register classes on different platforms is now shared. * The list of allocatable registers on each platform is declared as a list rather than implicitly via the register index <-> code mapping. Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2 Cr-Commit-Position: refs/heads/master@{#30913} Review URL: https://codereview.chromium.org/1287383003 Cr-Commit-Position: refs/heads/master@{#31075}
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- 30 Sep, 2015 1 commit
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mstarzinger authored
This enables linter checking for "readability/namespace" violations during presubmit and instead marks the few known exceptions that we allow explicitly. R=bmeurer@chromium.org Review URL: https://codereview.chromium.org/1371083003 Cr-Commit-Position: refs/heads/master@{#31019}
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- 24 Sep, 2015 2 commits
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danno authored
Revert of Remove register index/code indirection (patchset #17 id:320001 of https://codereview.chromium.org/1287383003/ ) Reason for revert: Failures on greedy RegAlloc, Fuzzer Original issue's description: > Remove register index/code indirection > > Previous to this patch, both the lithium and TurboFan register > allocators tracked allocated registers by "indices", rather than > the register codes used elsewhere in the runtime. This patch > ensures that codes are used everywhere, and in the process cleans > up a bunch of redundant code and adds more structure to how the > set of allocatable registers is defined. > > Some highlights of changes: > > * TurboFan's RegisterConfiguration class moved to V8's top level > so that it can be shared with Crankshaft. > * Various "ToAllocationIndex" and related methods removed. > * Code that can be easily shared between Register classes on > different platforms is now shared. > * The list of allocatable registers on each platform is declared > as a list rather than implicitly via the register index <-> > code mapping. > > Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2 > Cr-Commit-Position: refs/heads/master@{#30913} TBR=akos.palfi@imgtec.com,bmeurer@chromium.org,jarin@chromium.org,paul.lind@imgtec.com,titzer@chromium.org NOPRESUBMIT=true NOTREECHECKS=true NOTRY=true Review URL: https://codereview.chromium.org/1365073002 Cr-Commit-Position: refs/heads/master@{#30914}
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danno authored
Previous to this patch, both the lithium and TurboFan register allocators tracked allocated registers by "indices", rather than the register codes used elsewhere in the runtime. This patch ensures that codes are used everywhere, and in the process cleans up a bunch of redundant code and adds more structure to how the set of allocatable registers is defined. Some highlights of changes: * TurboFan's RegisterConfiguration class moved to V8's top level so that it can be shared with Crankshaft. * Various "ToAllocationIndex" and related methods removed. * Code that can be easily shared between Register classes on different platforms is now shared. * The list of allocatable registers on each platform is declared as a list rather than implicitly via the register index <-> code mapping. Review URL: https://codereview.chromium.org/1287383003 Cr-Commit-Position: refs/heads/master@{#30913}
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- 12 Aug, 2015 1 commit
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jfb authored
The operations were available on ARM64 and x86-32 but were unused. It has been conjectured that nontemporals can be used for rowhammer-like bitflips more easily than regular load/store operations. It is therefore desirable to avoid generating these instructions in the future. R= titzer, jochen, jln, Mark Seaborn, ruiq Review URL: https://codereview.chromium.org/1276113002 Cr-Commit-Position: refs/heads/master@{#30139}
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- 11 Aug, 2015 1 commit
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mstarzinger authored
This is the first step of turning the v8.h file into a normal header instead of an include-the-world header. The new rule is that no other header files are allowed to include v8.h, which is enforced by DEPS. Also the number of includes inside the v8.h file has been drastically reduced. Basically the last missing piece is the inclusion of the big objects-inl.h file. This in turn makes many headers follow the IWYU principle. R=bmeurer@chromium.org,hpayer@chromium.org,titzer@chromium.org Review URL: https://codereview.chromium.org/1282503003 Cr-Commit-Position: refs/heads/master@{#30102}
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- 20 May, 2015 1 commit
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jacob.bramley authored
These trigger warnings on cross-builds under GCC. BUG= Review URL: https://codereview.chromium.org/1151463002 Cr-Commit-Position: refs/heads/master@{#28509}
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- 04 Aug, 2014 1 commit
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bmeurer@chromium.org authored
This way we don't clash with the ASSERT* macros defined by GoogleTest, and we are one step closer to being able to replace our homegrown base/ with base/ from Chrome. R=jochen@chromium.org, svenpanne@chromium.org Review URL: https://codereview.chromium.org/430503007 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22812 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 23 Jul, 2014 1 commit
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rmcilroy@chromium.org authored
R=jochen@chromium.org, paul.lind@imgtec.com Review URL: https://codereview.chromium.org/404333003 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22554 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 09 Jun, 2014 1 commit
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rodolph.perfetta@arm.com authored
This is the first patch to improve literal pool handling in arm64. Cleans up assembler/macro-assembler access to literal pools. BUG= R=rmcilroy@chromium.org Review URL: https://codereview.chromium.org/318773009 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21723 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 05 Jun, 2014 1 commit
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titzer@chromium.org authored
R=jkummerow@google.com, jkummerow@chromium.org BUG= Review URL: https://codereview.chromium.org/313283003 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21685 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 04 Jun, 2014 2 commits
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titzer@chromium.org authored
R=dcarney@chromium.org, dcarney BUG= Review URL: https://codereview.chromium.org/313083006 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21677 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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titzer@chromium.org authored
R=dcarney@chromium.org, dcarney BUG= Review URL: https://codereview.chromium.org/317663002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21676 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 09 May, 2014 1 commit
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ishell@chromium.org authored
1) runtime/references checks temporarily disabled (56 items left) 2) other errors fixed R=jkummerow@chromium.org Review URL: https://codereview.chromium.org/277913002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21222 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 06 May, 2014 1 commit
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m.m.capewell@googlemail.com authored
When possible, we transform sequences of code of the form lsl x8, x9, #imm add x0, x1, x8 into add x0, x1, x9 LSL #imm R=ulan@chromium.org Review URL: https://codereview.chromium.org/257203002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21161 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 30 Apr, 2014 1 commit
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alexandre.rames@arm.com authored
R=jkummerow@chromium.org, ulan@chromium.org Review URL: https://codereview.chromium.org/258793002 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@21091 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 29 Apr, 2014 1 commit
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bmeurer@chromium.org authored
R=svenpanne@chromium.org Review URL: https://codereview.chromium.org/259183002 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@21035 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 24 Apr, 2014 3 commits
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Jacob.Bramley@arm.com authored
BUG= R=ulan@chromium.org Review URL: https://codereview.chromium.org/247533005 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20946 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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bmeurer@chromium.org authored
This reverts commit r20938 for breaking the windows build. TBR=ulan@chromium.org Review URL: https://codereview.chromium.org/254463003 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20939 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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bmeurer@chromium.org authored
R=svenpanne@chromium.org Review URL: https://codereview.chromium.org/257453003 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20938 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 21 Mar, 2014 1 commit
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jochen@chromium.org authored
BUG=354405 R=ulan@chromium.org, rodolph.perfetta@arm.com LOG=y Review URL: https://codereview.chromium.org/207823003 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20148 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 18 Mar, 2014 1 commit
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alexandre.rames@arm.com authored
R=ulan@chromium.org Review URL: https://codereview.chromium.org/203343003 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20043 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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