Rename InvertCondition and ReverseConditionForCmp on arm64 to be consistent with the other ports.

R=dcarney@chromium.org, dcarney
BUG=

Review URL: https://codereview.chromium.org/317663002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21676 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

src/arm64/assembler-arm64.cc

@@ -1130,32 +1130,32 @@ void Assembler::csneg(const Register& rd,
 void Assembler::cset(const Register &rd, Condition cond) {
   ASSERT((cond != al) && (cond != nv));
   Register zr = AppropriateZeroRegFor(rd);
-  csinc(rd, zr, zr, InvertCondition(cond));
+  csinc(rd, zr, zr, NegateCondition(cond));
 }
 
 
 void Assembler::csetm(const Register &rd, Condition cond) {
   ASSERT((cond != al) && (cond != nv));
   Register zr = AppropriateZeroRegFor(rd);
-  csinv(rd, zr, zr, InvertCondition(cond));
+  csinv(rd, zr, zr, NegateCondition(cond));
 }
 
 
 void Assembler::cinc(const Register &rd, const Register &rn, Condition cond) {
   ASSERT((cond != al) && (cond != nv));
-  csinc(rd, rn, rn, InvertCondition(cond));
+  csinc(rd, rn, rn, NegateCondition(cond));
 }
 
 
 void Assembler::cinv(const Register &rd, const Register &rn, Condition cond) {
   ASSERT((cond != al) && (cond != nv));
-  csinv(rd, rn, rn, InvertCondition(cond));
+  csinv(rd, rn, rn, NegateCondition(cond));
 }
 
 
 void Assembler::cneg(const Register &rd, const Register &rn, Condition cond) {
   ASSERT((cond != al) && (cond != nv));
-  csneg(rd, rn, rn, InvertCondition(cond));
+  csneg(rd, rn, rn, NegateCondition(cond));
 }
 
 

src/arm64/constants-arm64.h

@@ -258,7 +258,7 @@ enum Condition {
   nv = 15  // Behaves as always/al.
 };
 
-inline Condition InvertCondition(Condition cond) {
+inline Condition NegateCondition(Condition cond) {
   // Conditions al and nv behave identically, as "always true". They can't be
   // inverted, because there is no never condition.
   ASSERT((cond != al) && (cond != nv));
@@ -266,7 +266,7 @@ inline Condition InvertCondition(Condition cond) {
 }
 
 // Corresponds to transposing the operands of a comparison.
-inline Condition ReverseConditionForCmp(Condition cond) {
+inline Condition ReverseCondition(Condition cond) {
   switch (cond) {
     case lo:
       return hi;

src/arm64/disasm-arm64.cc

@@ -1559,7 +1559,7 @@ int Disassembler::SubstituteConditionField(Instruction* instr,
   switch (format[1]) {
     case 'B': cond = instr->ConditionBranch(); break;
     case 'I': {
-      cond = InvertCondition(static_cast<Condition>(instr->Condition()));
+      cond = NegateCondition(static_cast<Condition>(instr->Condition()));
       break;
     }
     default: cond = instr->Condition();

src/arm64/full-codegen-arm64.cc

@@ -711,7 +711,7 @@ void FullCodeGenerator::Split(Condition cond,
     __ B(cond, if_true);
   } else if (if_true == fall_through) {
     ASSERT(if_false != fall_through);
-    __ B(InvertCondition(cond), if_false);
+    __ B(NegateCondition(cond), if_false);
   } else {
     __ B(cond, if_true);
     __ B(if_false);

src/arm64/lithium-codegen-arm64.cc

@@ -56,7 +56,7 @@ class BranchOnCondition : public BranchGenerator {
 
   virtual void EmitInverted(Label* label) const {
     if (cond_ != al) {
-      __ B(InvertCondition(cond_), label);
+      __ B(NegateCondition(cond_), label);
     }
   }
 
@@ -86,7 +86,7 @@ class CompareAndBranch : public BranchGenerator {
   }
 
   virtual void EmitInverted(Label* label) const {
-    __ CompareAndBranch(lhs_, rhs_, InvertCondition(cond_), label);
+    __ CompareAndBranch(lhs_, rhs_, NegateCondition(cond_), label);
   }
 
  private:
@@ -136,7 +136,7 @@ class TestAndBranch : public BranchGenerator {
         break;
       default:
         __ Tst(value_, mask_);
-        __ B(InvertCondition(cond_), label);
+        __ B(NegateCondition(cond_), label);
     }
   }
 
@@ -1848,14 +1848,14 @@ void LCodeGen::DoBoundsCheck(LBoundsCheck *instr) {
     Operand index = ToOperand32I(instr->index());
     Register length = ToRegister32(instr->length());
     __ Cmp(length, index);
-    cond = ReverseConditionForCmp(cond);
+    cond = ReverseCondition(cond);
   } else {
     Register index = ToRegister32(instr->index());
     Operand length = ToOperand32I(instr->length());
     __ Cmp(index, length);
   }
   if (FLAG_debug_code && instr->hydrogen()->skip_check()) {
-    __ Assert(InvertCondition(cond), kEliminatedBoundsCheckFailed);
+    __ Assert(NegateCondition(cond), kEliminatedBoundsCheckFailed);
   } else {
     DeoptimizeIf(cond, instr->environment());
   }
@@ -2489,7 +2489,7 @@ void LCodeGen::DoCompareNumericAndBranch(LCompareNumericAndBranch* instr) {
         // Transpose the operands and reverse the condition.
         __ Fcmp(ToDoubleRegister(right),
                 ToDouble(LConstantOperand::cast(left)));
-        cond = ReverseConditionForCmp(cond);
+        cond = ReverseCondition(cond);
       } else {
         __ Fcmp(ToDoubleRegister(left), ToDoubleRegister(right));
       }
@@ -2508,7 +2508,7 @@ void LCodeGen::DoCompareNumericAndBranch(LCompareNumericAndBranch* instr) {
         } else {
           // Transpose the operands and reverse the condition.
           EmitCompareAndBranch(instr,
-                               ReverseConditionForCmp(cond),
+                               ReverseCondition(cond),
                                ToRegister32(right),
                                ToOperand32I(left));
         }
@@ -2524,7 +2524,7 @@ void LCodeGen::DoCompareNumericAndBranch(LCompareNumericAndBranch* instr) {
           // Transpose the operands and reverse the condition.
           int32_t value = ToInteger32(LConstantOperand::cast(left));
           EmitCompareAndBranch(instr,
-                               ReverseConditionForCmp(cond),
+                               ReverseCondition(cond),
                                ToRegister(right),
                                Operand(Smi::FromInt(value)));
         } else {

src/arm64/macro-assembler-arm64.cc

@@ -661,7 +661,7 @@ void MacroAssembler::B(Label* label, Condition cond) {
     NeedExtraInstructionsOrRegisterBranch(label, CondBranchType);
 
   if (need_extra_instructions) {
-    b(&done, InvertCondition(cond));
+    b(&done, NegateCondition(cond));
     B(label);
   } else {
     b(label, cond);
@@ -3826,7 +3826,7 @@ void MacroAssembler::CompareAndSplit(const Register& lhs,
   } else if (if_false == fall_through) {
     CompareAndBranch(lhs, rhs, cond, if_true);
   } else if (if_true == fall_through) {
-    CompareAndBranch(lhs, rhs, InvertCondition(cond), if_false);
+    CompareAndBranch(lhs, rhs, NegateCondition(cond), if_false);
   } else {
     CompareAndBranch(lhs, rhs, cond, if_true);
     B(if_false);

src/arm64/macro-assembler-arm64.h

@@ -81,7 +81,7 @@ enum BranchType {
 inline BranchType InvertBranchType(BranchType type) {
   if (kBranchTypeFirstCondition <= type && type <= kBranchTypeLastCondition) {
     return static_cast<BranchType>(
-        InvertCondition(static_cast<Condition>(type)));
+        NegateCondition(static_cast<Condition>(type)));
   } else {
     return static_cast<BranchType>(type ^ 1);
   }

src/arm64/regexp-macro-assembler-arm64.cc

@@ -1460,7 +1460,7 @@ void RegExpMacroAssemblerARM64::BranchOrBacktrack(Condition condition,
     to = &backtrack_label_;
   }
   // TODO(ulan): do direct jump when jump distance is known and fits in imm19.
-  Condition inverted_condition = InvertCondition(condition);
+  Condition inverted_condition = NegateCondition(condition);
   Label no_branch;
   __ B(inverted_condition, &no_branch);
   __ B(to);
@@ -1601,7 +1601,7 @@ void RegExpMacroAssemblerARM64::StoreRegister(int register_index,
 
 void RegExpMacroAssemblerARM64::CallIf(Label* to, Condition condition) {
   Label skip_call;
-  if (condition != al) __ B(&skip_call, InvertCondition(condition));
+  if (condition != al) __ B(&skip_call, NegateCondition(condition));
   __ Bl(to);
   __ Bind(&skip_call);
 }