- 19 Jan, 2021 1 commit
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Zhi An Ng authored
Code sequence from https://github.com/WebAssembly/simd/pull/379. Bug: v8:11002 Change-Id: I47c1090d792f8cbb9d7846ace9a4f996d0c460b1 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2626717Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#72174}
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- 29 Dec, 2020 2 commits
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Zhi An Ng authored
Prototype these 4 instructions: - i64x2.widen_low_i32x4_s - i64x2.widen_high_i32x4_s - i64x2.widen_low_i32x4_u - i64x2.widen_high_i32x4_u Bug: v8:10972 Change-Id: I3defd0a2431252bc3f5bb45e022e62b37beb34ca Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2601012 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by:
Bill Budge <bbudge@chromium.org> Cr-Commit-Position: refs/heads/master@{#71888}
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Zhi An Ng authored
Bug: v8:10971 Change-Id: I60186a445f3a5ad366cba4e6bcb16519098aa6ad Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2601009 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by:
Bill Budge <bbudge@chromium.org> Cr-Commit-Position: refs/heads/master@{#71886}
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- 22 Dec, 2020 1 commit
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Zhi An Ng authored
When a 8x16 shuffle matches a 32x4 shuffle (every group of 4 indices are consecutive), and the first 2 indices are in the range [0-3], and the other 2 indices are in the range [4-7], then we can match it to a shufps. E.g. [0,2,4,6], [1,3,5,7]. These shuffles are commonly used to extract odd/even floats. Change-Id: I031fe44f71a13bbc72115c22b02a5eaaf29d3794 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2596579 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by:
Bill Budge <bbudge@chromium.org> Cr-Commit-Position: refs/heads/master@{#71860}
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- 15 Dec, 2020 1 commit
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Zhi An Ng authored
Code like: x = wasm_v32x4_shuffle(x, x, 1, 2, 3, 0); is currently matched by S8x16Concat, which lowers to two instructions: movapd xmm_dst, xmm_src palignr xmm_dst, xmm_src, 0x4 There is a special case after a S8x16Concat is matched:. - is_swizzle, the inputs are the same - it is a 32x4 shuffle (offset % 4 == 0) Which can have a better codegen: - (dst == src) shufps dst, src, 0b00111001 - (dst != src) pshufd dst, src, 0b00111001 Add a new simd shuffle matcher which will match 32x4 rotate, and construct the appropriate indices referring to the 32x4 elements. pshufd for the given example. However, this matching happens after S8x16Concat, so we get the palignr first. We could move the pattern matching cases around, but it will lead to some cases where where it would have matched a S8x16Concat, but now matches a S32x4shuffle instead, leading to worse codegen. Note: we also pattern match on 32x4Swizzle, which correctly generates Change-Id: Ie3aca53bbc06826be2cf49632de4c24ec73d0a9a Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2589062Reviewed-by:
Bill Budge <bbudge@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#71754}
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- 10 Dec, 2020 2 commits
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Zhi An Ng authored
Add new macro-assembler instructions that can handle both AVX and SSE. In the SSE case it checks that dst == src1. (This is different from that the AvxHelper does, which passes dst as the first operand to AVX instructions.) Sorted SSSE3_INSTRUCTION_LIST by instruction code. Header additions are added by clangd, we were already using something from those headers via transitive includes, adding them explicitly gets us closer to IWYU. Codegen sequences are from https://github.com/WebAssembly/simd/pull/380 and also https://github.com/WebAssembly/simd/pull/380#issuecomment-707440671. Bug: v8:11086 Change-Id: I4c04f836e471ed8b00f9ff1a1b2e6348a593d4de Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2578797 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by:
Bill Budge <bbudge@chromium.org> Cr-Commit-Position: refs/heads/master@{#71688}
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Zhi An Ng authored
Bug: v8:11008 Change-Id: Ic72e71eb10a5b47c97467bf6d25e55d20425273a Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2575784Reviewed-by:
Bill Budge <bbudge@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#71686}
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- 28 Oct, 2020 1 commit
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Zhi An Ng authored
Prototype i8x16, i16x8, i32x4, i64x2 sign select on x64 and interpreter. Bug: v8:10983 Change-Id: I7d6f39a2cb4c2aefe31daac782978fe8b363dd1a Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2486235 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Reviewed-by:
Bill Budge <bbudge@chromium.org> Cr-Commit-Position: refs/heads/master@{#70818}
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- 27 Oct, 2020 1 commit
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Ng Zhi An authored
i8x16.extract_lane_u is pextrb, and i16x8.extract_lane_u is pextrw, we can merge them instead of having separate opcodes. R=bbudge@chromium.org Bug: v8:10975 Change-Id: I7793a795905157b6094b1470d3437988c982af91 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2481834Reviewed-by:
Bill Budge <bbudge@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#70771}
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- 19 Oct, 2020 2 commits
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Ng Zhi An authored
We don't need separate Load32Zero and Load64Zero instructions, since the implementation is movss and movsd, which we already have. Bug: v8:10713 Change-Id: I5d02e946f3bf9fe08f943a811f2d3cc8aec81ea8 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2486233Reviewed-by:
Bill Budge <bbudge@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#70635}
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Ng Zhi An authored
Not sure why I originally chose to name it LoadMem32Zero instead of Load32Zero like the proposal. This fixes it. Bug: v8:10713 Change-Id: If05603f743213bc6b7aea0ce22c80ae4b3023ccf Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2481824Reviewed-by:
Bill Budge <bbudge@chromium.org> Reviewed-by:
Georg Neis <neis@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#70630}
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- 16 Oct, 2020 1 commit
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Ng Zhi An authored
Store lane loads a value from memory and replaces a single lane of a simd value. This implements store lane for x64 and interpreter. Bug: v8:10975 Change-Id: Ida79a03e0fd2bc18f2c06687311936b3cb550ed5 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2473383Reviewed-by:
Bill Budge <bbudge@chromium.org> Reviewed-by:
Georg Neis <neis@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#70586}
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- 15 Oct, 2020 1 commit
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Ng Zhi An authored
Rename AddSaturate and SubSaturate to the shorter version, AddSat and SubSat, following the spec. Bug: v8:10946,v8:10933 Change-Id: Idf74b3a1eb2e2f6d4e37d2b8e5fa6d96ea090db4 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2436615Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Reviewed-by:
Jakob Kummerow <jkummerow@chromium.org> Reviewed-by:
Bill Budge <bbudge@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#70549}
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- 13 Oct, 2020 1 commit
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Ng Zhi An authored
The only one that doesn't use a pinsr* is f32x4, which uses insertps, so that is kept as it is. Bug: v8:10933 Change-Id: I7442668812c674d4242949e13ef595978290bc8d Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2458787Reviewed-by:
Bill Budge <bbudge@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#70493}
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- 12 Oct, 2020 3 commits
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Ng Zhi An authored
Implement on interpreter and x64. Bug: v8:10997 Change-Id: I3537ce54e1b56cc3b04d91cb07c430c35b88c3aa Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2459109 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by:
Bill Budge <bbudge@chromium.org> Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Cr-Commit-Position: refs/heads/master@{#70459}
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Ng Zhi An authored
Load lane loads a value from memory and replaces a single lane of a simd value. This implements the load (no stores yet) for x64 and interpreter. Bug: v8:10975 Change-Id: I95d1b5e781ee9adaec23dda749e514f2485eda10 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2444578 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Reviewed-by:
Bill Budge <bbudge@chromium.org> Cr-Commit-Position: refs/heads/master@{#70456}
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Ng Zhi An authored
These instructions are not in the proposal, and will be unlikely to be requested (poor performance, insufficient use cases). As we get more instruction suggestions, these are sitting around on useful opcodes and we have to play musical chairs every time we prototype a new instruction. Bug: v8:10933 Change-Id: Ic7ce4e514c343d821f76b8c071e41f9bddfbd1ce Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2457669Reviewed-by:
Bill Budge <bbudge@chromium.org> Reviewed-by:
Georg Neis <neis@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#70455}
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- 29 Sep, 2020 1 commit
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Ng Zhi An authored
Perform the renames for all arch-dependent opcodes too. This is a follow-up of https://crrev.com/c/2422357. Bug: v8:10946,v8:10933 Change-Id: I02f048b64dd4d75f06d6b7919660ffebd0e78b50 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2431798Reviewed-by:
Bill Budge <bbudge@chromium.org> Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#70206}
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- 25 Sep, 2020 1 commit
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Adam Klein authored
These instructions were changed from "s8x16" to "i8x16" prefixes in https://github.com/WebAssembly/simd/pull/321. This CL updates all V8 code, including arch-specific code, to match. Bug: v8:10946, v8:10933 Change-Id: I26ef9ad77571f94501d42c1d65f57380fd507f3d Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2432068Reviewed-by:
Zhi An Ng <zhin@chromium.org> Commit-Queue: Adam Klein <adamk@chromium.org> Cr-Commit-Position: refs/heads/master@{#70143}
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- 21 Jul, 2020 1 commit
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Ng Zhi An authored
Prototype in TurboFan x64 and interpreter, bailout in Liftoff. Suggested in https://github.com/WebAssembly/simd/pull/237. Bug: v8:10713 Change-Id: I5346c351fb2ec5240b74013e62aef07c46d5d9b6 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2300924Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Reviewed-by:
Clemens Backes <clemensb@chromium.org> Reviewed-by:
Bill Budge <bbudge@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#68973}
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- 02 Jul, 2020 1 commit
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Deepti Gandluri authored
- Add wasm opcode, decode and compiler code for v128.const - Add codegen implementations for v128.const on x64/Arm64 - Reuse/Rename some shuffle specific methods to handle generic 128-bit immediates - Tests Bug: v8:8460 Change-Id: Idc365c8f6402c13259400eac92e0b75bd0f991a1 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2276176 Commit-Queue: Deepti Gandluri (OOO Till November) <gdeepti@chromium.org> Reviewed-by:
Sigurd Schneider <sigurds@chromium.org> Reviewed-by:
Zhi An Ng <zhin@chromium.org> Reviewed-by:
Bill Budge <bbudge@chromium.org> Cr-Commit-Position: refs/heads/master@{#68643}
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- 15 Jun, 2020 1 commit
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Ng Zhi An authored
This is a reland of 3692bef9 Integer overflow in the test code is fixed by using MulWithWraparound. Original change's description: > [wasm-simd][x64] Prototype i32x4.dot_i16x8_s > > This implements I32x4DotI16x8S for x64 and interpreter. > > Bug: v8:10583 > Change-Id: I404ac68c19c1686a93f29c3f4fc2d661c9558c67 > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2229056 > Reviewed-by: Tobias Tebbi <tebbi@chromium.org> > Reviewed-by: Deepti Gandluri <gdeepti@chromium.org> > Commit-Queue: Zhi An Ng <zhin@chromium.org> > Cr-Commit-Position: refs/heads/master@{#68244} Bug: v8:10583 Change-Id: Ie7d0032f5398b6f725c02b572764258adacc8578 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2236962Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#68343}
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- 10 Jun, 2020 1 commit
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Ng Zhi An authored
This is a reland of f7f72b7b This was reverted because of a test timing out on slow_path variant (https://crrev.com/c/2237131 for details). Turns out the test is just really slow, and was skipped on this variant in https://crrev.com/c/2237628. Relanding without changes. Original change's description: > [wasm-simd] Prototype f64x2 rounding instructions > > Implements f64x2 ceil, floor, trunc, nearestint, for interpreter and > x64. > > Bug: v8:10553 > Change-Id: I12a260a3b1d728368e5525d317d30fc9581cae04 > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2213082 > Commit-Queue: Zhi An Ng <zhin@chromium.org> > Reviewed-by: Tobias Tebbi <tebbi@chromium.org> > Reviewed-by: Deepti Gandluri <gdeepti@chromium.org> > Cr-Commit-Position: refs/heads/master@{#68241} Tbr: tebbi@chromium.org Bug: v8:10553 Change-Id: I4cdc23d0556f11310d32fa066f40b057fd49d2d7 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2237350 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Reviewed-by:
Adam Klein <adamk@chromium.org> Cr-Commit-Position: refs/heads/master@{#68304}
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- 09 Jun, 2020 3 commits
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Leszek Swirski authored
This reverts commit f7f72b7b. Reason for revert: Flaky timeouts of slow-path tests -- specifically, mjsunit/regress/wasm/regress-9017, which appears to have regressed from ~2 min to ~3-4 min https://logs.chromium.org/logs/v8/buildbucket/cr-buildbucket.appspot.com/8878016799136124416/+/steps/Check_-_slow_path__flakes_/0/logs/regress-9017/0 Original change's description: > [wasm-simd] Prototype f64x2 rounding instructions > > Implements f64x2 ceil, floor, trunc, nearestint, for interpreter and > x64. > > Bug: v8:10553 > Change-Id: I12a260a3b1d728368e5525d317d30fc9581cae04 > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2213082 > Commit-Queue: Zhi An Ng <zhin@chromium.org> > Reviewed-by: Tobias Tebbi <tebbi@chromium.org> > Reviewed-by: Deepti Gandluri <gdeepti@chromium.org> > Cr-Commit-Position: refs/heads/master@{#68241} TBR=gdeepti@chromium.org,tebbi@chromium.org,zhin@chromium.org Change-Id: I9915dd375c7f0e08b5414189efb29ed1c90cb96d No-Presubmit: true No-Tree-Checks: true No-Try: true Bug: v8:10553 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2237131Reviewed-by:
Leszek Swirski <leszeks@chromium.org> Commit-Queue: Leszek Swirski <leszeks@chromium.org> Cr-Commit-Position: refs/heads/master@{#68248}
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Zhi An Ng authored
This reverts commit 3692bef9. Reason for revert: https://ci.chromium.org/p/v8/builders/ci/V8%20Linux64%20UBSan/11514? Original change's description: > [wasm-simd][x64] Prototype i32x4.dot_i16x8_s > > This implements I32x4DotI16x8S for x64 and interpreter. > > Bug: v8:10583 > Change-Id: I404ac68c19c1686a93f29c3f4fc2d661c9558c67 > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2229056 > Reviewed-by: Tobias Tebbi <tebbi@chromium.org> > Reviewed-by: Deepti Gandluri <gdeepti@chromium.org> > Commit-Queue: Zhi An Ng <zhin@chromium.org> > Cr-Commit-Position: refs/heads/master@{#68244} TBR=gdeepti@chromium.org,tebbi@chromium.org,zhin@chromium.org Change-Id: I8760d480a783ba6c8a2ec2eaeb0131c7d4e11159 No-Presubmit: true No-Tree-Checks: true No-Try: true Bug: v8:10583 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2236961Reviewed-by:
Zhi An Ng <zhin@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#68245}
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Ng Zhi An authored
This implements I32x4DotI16x8S for x64 and interpreter. Bug: v8:10583 Change-Id: I404ac68c19c1686a93f29c3f4fc2d661c9558c67 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2229056Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#68244}
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- 08 Jun, 2020 1 commit
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Ng Zhi An authored
Implements f64x2 ceil, floor, trunc, nearestint, for interpreter and x64. Bug: v8:10553 Change-Id: I12a260a3b1d728368e5525d317d30fc9581cae04 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2213082 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Cr-Commit-Position: refs/heads/master@{#68241}
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- 28 May, 2020 1 commit
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Ng Zhi An authored
Implements f32x4 ceil, floor, trunc, nearestint, for interpreter and x64. Bug: v8:10553 Change-Id: Iab747cbd2a872aa6cd4ad23c5b8334d5c8e4da61 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2212435Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#68054}
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- 21 May, 2020 1 commit
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Ng Zhi An authored
The proposal uses the lane shape, e.g. i64x2.anytrue, and we were using s1x2.anytrue in our opcodes. This was a legacy naming, because we were trying to bitpack the booleans. Now that we aren't doing that, rename these to be more consistent with the proposal. This was done with a straightforward sed script, changing both cpp code and also some comments in mjsunit test files. Bug: v8:10506 Change-Id: If077ed805de23520d8580d6b3b1906c80f67b94f Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2207915 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Cr-Commit-Position: refs/heads/master@{#67945}
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- 08 May, 2020 1 commit
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Ng Zhi An authored
This patch implements f32x4.pmin, f32x4.pmax, f64x2.pmin, and f64x2.pmax for x64 and interpreter. Pseudo-min and Pseudo-max instructions were proposed in https://github.com/WebAssembly/simd/pull/122. These instructions exactly match std::min and std::max in C++ STL, and thus have different semantics from the existing min and max. The instruction-selector for x64 switches the operands around, because it allows for defining the dst to be same as first (really the second input node), allowing better codegen. For example, b = f32x4.pmin(a, b) directly maps to vminps(b, b, a) or minps(b, a), as long as we can define dst == b, and switching the instruction operands around allows us to do that. Bug: v8:10501 Change-Id: I06f983fc1764caf673e600ac91d9c0ac5166e17e Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2186630 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Cr-Commit-Position: refs/heads/master@{#67688}
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- 01 May, 2020 1 commit
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Z Nguyen-Huu authored
ROL will be optional operator as arm, arm64 only have ROR. The reason for this CL is inefficient Wasm codegen for 64-bit left-rotation. Bug: v8:10216 Change-Id: I0cd13e4b6de5276a0d0b80eac5ed9c2e52ba1f96 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2157648 Commit-Queue: Z Nguyen-Huu <duongn@microsoft.com> Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Reviewed-by:
Andreas Haas <ahaas@chromium.org> Reviewed-by:
Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#67518}
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- 06 Apr, 2020 1 commit
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Ng Zhi An authored
Implement i8x16.bitmask, i16x8.bitmask, i32x4.bitmask on x64. Bug: v8:10308 Change-Id: Id47cb229de77d80d0a7ec91f4862a91258ff1979 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2127317 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Cr-Commit-Position: refs/heads/master@{#67022}
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- 26 Feb, 2020 1 commit
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Ng Zhi An authored
Implements i8x16.abs, i16x8.abs, and i32x4.abs. Bug: v8:10233 Change-Id: Iefe3c70bdc229c6da6a0ef07273ca654ca1e937e Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2063200Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#66440}
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- 28 Jan, 2020 1 commit
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Ng Zhi An authored
These conversion instructions were removed from the proposal in https://github.com/WebAssembly/simd/pull/178. Change-Id: I212ca2f923362bf08e178f6d28cc2338cf6f5927 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2016006Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#66015}
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- 13 Jan, 2020 1 commit
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Ng Zhi An authored
Note the tricky part in instruction-selector-x64, where we flip the inputs given to the code generator. This is because the semantics we want is: v128.andnot a b = a & !b, but the x64 instruction performs andnps a b = !a & b. Therefore we flip the inputs, and combined with g.DefineSameAsFirst, the output register will be the same as b, and we can use andnps without any modifications in both SSE and AVX cases. Bug: v8:10082 Change-Id: Iff98dc1dd944fbc642875f6306c6633d5d646615 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1980894Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#65738}
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- 19 Dec, 2019 1 commit
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Ng Zhi An authored
This change includes templatization of the test helper to allow the same function to be reused for both signed and unsigned data types. We implement a new function RoundingAverageUnsigned in overflowing-math, rather than in base/utils, since the addition could overflow. SIMD scalar lowering and implementation for other backends will follow in future patches. Bug: v8:10039 Change-Id: I70735f7b6536f197869ef1afbccaf5649e7e8448 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1958007Reviewed-by:
Clemens Backes <clemensb@chromium.org> Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#65531}
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- 03 Dec, 2019 1 commit
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George Wort authored
Replace unsigned extract lane followed by sign extend as added here https://chromium-review.googlesource.com/c/v8/v8/+/1846711 with a signed extract lane for I8x16 and I16x8. Change-Id: I5a701417b772d12f5ef038efbb081716bb27e25a Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1873700 Commit-Queue: Martyn Capewell <martyn.capewell@arm.com> Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#65307}
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- 20 Nov, 2019 1 commit
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Santiago Aboy Solanes authored
Since the old pipeline has been removed (https://chromium-review.googlesource.com/c/v8/v8/+/1903435), these opcodes and methods are unused. Bug: v8:7703 Change-Id: I626645a1405c79c6a202da6075fb64f0a2a41d25 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1921799 Commit-Queue: Santiago Aboy Solanes <solanes@chromium.org> Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Cr-Commit-Position: refs/heads/master@{#65066}
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- 18 Nov, 2019 1 commit
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Ng Zhi An authored
This implements the rest of the load extend instructions: - i32x4.load16x4_s - i32x4.load16x4_u - i64x2.load32x2_s - i64x2.load32x2_u Bug: v8:9886 Change-Id: I4649f77bae5224042a1628d9f0498c050b1e599d Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1903812Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Reviewed-by:
Bill Budge <bbudge@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#65017}
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- 08 Nov, 2019 1 commit
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Ng Zhi An authored
Implements v32x4.load_splat and v64x2.load_splat. Bug: v8:9886 Change-Id: I18f3b012f9980d258985edf2ff26577fe495eff5 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1903747Reviewed-by:
Deepti Gandluri <gdeepti@chromium.org> Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#64866}
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