[wasm-simd][x64] Consolidate v128.load_zero with movss/movsd

We don't need separate Load32Zero and Load64Zero instructions, since the
implementation is movss and movsd, which we already have.

Bug: v8:10713
Change-Id: I5d02e946f3bf9fe08f943a811f2d3cc8aec81ea8
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2486233Reviewed-by: Bill Budge <bbudge@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#70635}

src/compiler/backend/x64/code-generator-x64.cc

@@ -3693,16 +3693,6 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ Pmovzxdq(i.OutputSimd128Register(), i.MemoryOperand());
       break;
     }
-    case kX64S128Load32Zero: {
-      EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset());
-      __ Movd(i.OutputSimd128Register(), i.MemoryOperand());
-      break;
-    }
-    case kX64S128Load64Zero: {
-      EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset());
-      __ Movq(i.OutputSimd128Register(), i.MemoryOperand());
-      break;
-    }
     case kX64S128Store32Lane: {
       EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset());
       size_t index = 0;

src/compiler/backend/x64/instruction-codes-x64.h

@@ -330,8 +330,6 @@ namespace compiler {
   V(X64S128Load16x4U)                     \
   V(X64S128Load32x2S)                     \
   V(X64S128Load32x2U)                     \
-  V(X64S128Load32Zero)                    \
-  V(X64S128Load64Zero)                    \
   V(X64S128Store32Lane)                   \
   V(X64S128Store64Lane)                   \
   V(X64S32x4Swizzle)                      \

src/compiler/backend/x64/instruction-scheduler-x64.cc

@@ -381,8 +381,6 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kX64S128Load16x4U:
     case kX64S128Load32x2S:
     case kX64S128Load32x2U:
-    case kX64S128Load32Zero:
-    case kX64S128Load64Zero:
       return instr->HasOutput() ? kIsLoadOperation : kHasSideEffect;
 
     case kX64Peek:

src/compiler/backend/x64/instruction-selector-x64.cc

@@ -420,10 +420,10 @@ void InstructionSelector::VisitLoadTransform(Node* node) {
       opcode = kX64S128Load32x2U;
       break;
     case LoadTransformation::kS128Load32Zero:
-      opcode = kX64S128Load32Zero;
+      opcode = kX64Movss;
       break;
     case LoadTransformation::kS128Load64Zero:
-      opcode = kX64S128Load64Zero;
+      opcode = kX64Movsd;
       break;
     default:
       UNREACHABLE();