- 11 Dec, 2015 1 commit
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jarin authored
Review URL: https://codereview.chromium.org/1513383003 Cr-Commit-Position: refs/heads/master@{#32803}
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- 10 Dec, 2015 1 commit
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jarin authored
MachineType is now a class with two enum fields: - MachineRepresentation - MachineSemantic Both enums are usable on their own, and this change switches some places from using MachineType to use just MachineRepresentation. Most notably: - register allocator now uses just the representation. - Phi and Select nodes only refer to representations. Review URL: https://codereview.chromium.org/1513543003 Cr-Commit-Position: refs/heads/master@{#32738}
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- 30 Nov, 2015 1 commit
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vogelheim authored
R=bmeurer@chromium.org, mstarzinger@chromium.org BUG=chromium:508898 LOG=Y Review URL: https://codereview.chromium.org/1477413002 Cr-Commit-Position: refs/heads/master@{#32400}
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- 07 Nov, 2015 1 commit
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martyn.capewell authored
Use compare-negate instruction if the right-hand input to a compare is a negate operation. BUG= Review URL: https://codereview.chromium.org/1410123009 Cr-Commit-Position: refs/heads/master@{#31866}
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- 29 Oct, 2015 1 commit
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mstarzinger authored
R=bmeurer@chromium.org Review URL: https://codereview.chromium.org/1424983003 Cr-Commit-Position: refs/heads/master@{#31646}
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- 28 Oct, 2015 1 commit
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jacob.bramley authored
Float(32|64)Min: // (a < b) ? a : b fcmp da, db fcsel dd, da, db, lo Float(32|64)Max: // (b < a) ? a : b fcmp db, da fcsel dd, da, db, lo BUG= Review URL: https://codereview.chromium.org/1360603003 Cr-Commit-Position: refs/heads/master@{#31621}
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- 26 Oct, 2015 1 commit
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rmcilroy authored
Adds support for loading from and storing to outer context variables. Also adds support for declaring functions on contexts and locals. Finally, fixes a couple of issues with StaContextSlot where we weren't emitting the write barrier and therefore would crash in the GC. Also added code so that --print-bytecode will output the function name before the bytecodes, and replaces MachineType with StoreRepresentation in RawMachineAssembler::Store and updates tests. BUG=v8:4280 LOG=N Review URL: https://codereview.chromium.org/1425633002 Cr-Commit-Position: refs/heads/master@{#31584}
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- 14 Oct, 2015 1 commit
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martyn.capewell authored
Support negate with shifted input on ARM64 by supporting lhs zero registers for binary operations, and removing explicit Neg instruction support. Review URL: https://codereview.chromium.org/1404093003 Cr-Commit-Position: refs/heads/master@{#31263}
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- 24 Sep, 2015 1 commit
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pierre.langlois authored
This patch explicitly names commuted conditions for floating point comparisons, instead of relying on CommuteFlagsCondition. Otherwise, a bug in this function would not be caught. BUG= Review URL: https://codereview.chromium.org/1364773002 Cr-Commit-Position: refs/heads/master@{#30905}
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- 23 Sep, 2015 1 commit
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pierre.langlois authored
This patch checks the type of the lhs operand of a floating point comparison, and commutes the operands if it is #0.0. It allows us to optimize a comparison with zero, as the fcmp instruction accepts #0.0 as rhs operand. Code before for "0.0 < 0.123": ------------------------------ fmov d1, xzr ldr d0, pc+96 fcmp d1, d0 b.lo #+0xc Code after: ----------- ldr d0, pc+92 fcmp d0, #0.0 b.gt #+0xc Before this patch, we used unsigned condition codes for floating point comparisons, but the unordered case was not correctly commuted. Review URL: https://codereview.chromium.org/1356283003 Cr-Commit-Position: refs/heads/master@{#30881}
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- 31 Jul, 2015 1 commit
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martyn.capewell authored
Improve code generated for flag materialization. Review URL: https://codereview.chromium.org/1260733003 Cr-Commit-Position: refs/heads/master@{#29954}
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- 02 Jul, 2015 1 commit
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martyn.capewell authored
Support 32-bit cmp with shift/extend by reusing the existing add/sub shift and extend code. Review URL: https://codereview.chromium.org/1218103005 Cr-Commit-Position: refs/heads/master@{#29435}
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- 30 Jun, 2015 1 commit
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martyn.capewell authored
Move the arithmetic shift from Int32MulHigh to a following Int32Add on ARM64. This graph is commonly generated on reduction of signed integer division. Review URL: https://codereview.chromium.org/1209413008 Cr-Commit-Position: refs/heads/master@{#29380}
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- 12 Jun, 2015 2 commits
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jacob.bramley authored
With this patch, we can generate simple immediate-shift instructions for immediates outside the range "0 <= imm < width". Several related instruction selectors have also been updated accordingly. Example of generated code: ---- Before --- ---- After ---- movz w0, #33 lsr w0, w1, #1 lsr w0, w1, w0 BUG= Review URL: https://codereview.chromium.org/1179893003 Cr-Commit-Position: refs/heads/master@{#28977}
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martyn.capewell authored
Before selecting multiply-accumulate for a multiplication with add operation, check that the multiply can't be reduced to add-with-shift. This prevents simple multiplications by 3, 5, etc turning into register moves and madd instructions. Review URL: https://codereview.chromium.org/1180863002 Cr-Commit-Position: refs/heads/master@{#28976}
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- 11 Jun, 2015 3 commits
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martyn.capewell authored
Merge a following arithmetic or logical right shift into the existing shift of ARM64's Int32MulHigh or Uint32MulHigh code. BUG= Review URL: https://codereview.chromium.org/1179503003 Cr-Commit-Position: refs/heads/master@{#28945}
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jacob.bramley authored
Revert of [arm64][turbofan]: Handle any immediate shift. (patchset #1 id:1 of https://codereview.chromium.org/1179733004/) Reason for revert: Breaks InstructionSelectorTest.Word64ShrWithWord64AndWithImmediate on debug builds (but not optdebug builds). I'll investigate. Original issue's description: > [arm64][turbofan]: Handle any immediate shift. > > With this patch, we can generate simple immediate-shift instructions for > immediates outside the range "0 <= imm < width". Several related > instruction selectors have also been updated accordingly. > > Example of generated code: > > ---- Before --- ---- After ---- > movz w0, #33 lsr w0, w1, #1 > lsr w0, w1, w0 > > BUG= > > Committed: https://crrev.com/36d771bbfa4af5efcc1c1dcf5b234445cb7ee722 > Cr-Commit-Position: refs/heads/master@{#28943} TBR=bmeurer@chromium.org,ulan@chromium.org NOPRESUBMIT=true NOTREECHECKS=true NOTRY=true BUG= Review URL: https://codereview.chromium.org/1176393002 Cr-Commit-Position: refs/heads/master@{#28944}
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jacob.bramley authored
With this patch, we can generate simple immediate-shift instructions for immediates outside the range "0 <= imm < width". Several related instruction selectors have also been updated accordingly. Example of generated code: ---- Before --- ---- After ---- movz w0, #33 lsr w0, w1, #1 lsr w0, w1, w0 BUG= Review URL: https://codereview.chromium.org/1179733004 Cr-Commit-Position: refs/heads/master@{#28943}
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- 02 Jun, 2015 1 commit
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martyn.capewell authored
Select ubfiz for (x & mask) << imm where mask is contiguous and imm is non-zero. BUG= Review URL: https://codereview.chromium.org/1161643003 Cr-Commit-Position: refs/heads/master@{#28755}
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- 15 May, 2015 1 commit
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martyn.capewell authored
Enable clang's shorten-64-to-32 warning flag on ARM64, and fix the warnings that arise. BUG= Review URL: https://codereview.chromium.org/1131573006 Cr-Commit-Position: refs/heads/master@{#28412}
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- 08 May, 2015 1 commit
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martyn.capewell authored
Select sbfx for ((x << k) >> k) in ARM64 instruction selector, and similarly for ubfx. This is a more generic version of the previous sxtb/h selector. BUG= Review URL: https://codereview.chromium.org/1135543002 Cr-Commit-Position: refs/heads/master@{#28318}
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- 08 Apr, 2015 1 commit
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Benedikt Meurer authored
These operators compute the absolute floating point value of some arbitrary input, and are implemented without any branches (i.e. using vabs on arm, and andps/andpd on x86). R=svenpanne@chromium.org Review URL: https://codereview.chromium.org/1066393002 Cr-Commit-Position: refs/heads/master@{#27662}
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- 07 Apr, 2015 2 commits
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martyn.capewell authored
Support sxtb and sxth extend operators on add and subtract, as we've done for ubtx/h. This is similar to ARM support for sxtab/h. BUG= Review URL: https://codereview.chromium.org/1064813003 Cr-Commit-Position: refs/heads/master@{#27624}
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baptiste.afsa authored
R=bmeurer@chromium.org Review URL: https://codereview.chromium.org/1056543002 Cr-Commit-Position: refs/heads/master@{#27612}
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- 30 Mar, 2015 1 commit
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baptiste.afsa authored
R=bmeurer@chromium.org Review URL: https://codereview.chromium.org/1040053002 Cr-Commit-Position: refs/heads/master@{#27516}
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- 27 Mar, 2015 2 commits
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yangguo authored
Revert of [turbofan][arm64] Match fneg for -0.0 - x pattern. (patchset #1 id:1 of https://codereview.chromium.org/1013743006/) Reason for revert: Revert due to crash. Original issue's description: > [turbofan][arm64] Match fneg for -0.0 - x pattern. > > Note that this patch add an extra bit to the ArchOpcodeField. > > R=bmeurer@chromium.org > > Committed: https://crrev.com/fe7441225100660d01e66ce3bcaefe368f62df81 > Cr-Commit-Position: refs/heads/master@{#27494} TBR=bmeurer@chromium.org,baptiste.afsa@arm.com NOPRESUBMIT=true NOTREECHECKS=true NOTRY=true Review URL: https://codereview.chromium.org/1041633002 Cr-Commit-Position: refs/heads/master@{#27495}
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baptiste.afsa authored
Note that this patch add an extra bit to the ArchOpcodeField. R=bmeurer@chromium.org Review URL: https://codereview.chromium.org/1013743006 Cr-Commit-Position: refs/heads/master@{#27494}
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- 20 Mar, 2015 1 commit
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Benedikt Meurer authored
R=dcarney@chromium.org, yangguo@chromium.org BUG=v8:3952 LOG=n Review URL: https://codereview.chromium.org/1021183002 Cr-Commit-Position: refs/heads/master@{#27329}
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- 19 Mar, 2015 1 commit
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jacob.bramley authored
Add support for appending extend modes uxtb or uxth to add and subtract instructions, and using them in the instruction selector. BUG= Review URL: https://codereview.chromium.org/1021533002 Cr-Commit-Position: refs/heads/master@{#27303}
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- 26 Feb, 2015 1 commit
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bmeurer authored
Review URL: https://codereview.chromium.org/960783002 Cr-Commit-Position: refs/heads/master@{#26870}
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- 15 Jan, 2015 1 commit
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baptiste.afsa authored
R=bmeurer@chromium.org Review URL: https://codereview.chromium.org/850073002 Cr-Commit-Position: refs/heads/master@{#26066}
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- 13 Jan, 2015 1 commit
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bmeurer authored
TEST=cctest,unittests Review URL: https://codereview.chromium.org/850653002 Cr-Commit-Position: refs/heads/master@{#26034}
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- 11 Dec, 2014 1 commit
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baptiste.afsa authored
The instruction selector now selects pseudo instructions: CompareAndBranch or TestAndBranch which are associated with their continuations so that generic code in the code generator will treat them as branch instruction and will be able to apply optimization like avoiding branches when the code can falltrhough. R=bmeurer@chromium.org Review URL: https://codereview.chromium.org/798553002 Cr-Commit-Position: refs/heads/master@{#25773}
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- 24 Nov, 2014 1 commit
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baptiste.afsa authored
R=bmeurer@chromium.org Review URL: https://codereview.chromium.org/730183005 Cr-Commit-Position: refs/heads/master@{#25475}
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- 12 Nov, 2014 1 commit
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baptiste.afsa@arm.com authored
R=bmeurer@chromium.org Review URL: https://codereview.chromium.org/715433004 Cr-Commit-Position: refs/heads/master@{#25288} git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@25288 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 07 Nov, 2014 1 commit
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baptiste.afsa@arm.com authored
R=bmeurer@chromium.org Review URL: https://codereview.chromium.org/705983002 Cr-Commit-Position: refs/heads/master@{#25210} git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@25210 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 03 Nov, 2014 1 commit
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baptiste.afsa@arm.com authored
R=bmeurer@chromium.org Review URL: https://codereview.chromium.org/697653002 Cr-Commit-Position: refs/heads/master@{#25063} git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@25063 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 29 Oct, 2014 2 commits
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baptiste.afsa@arm.com authored
R=bmeurer@chromium.org Review URL: https://codereview.chromium.org/687193002 Cr-Commit-Position: refs/heads/master@{#24989} git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24989 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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baptiste.afsa@arm.com authored
Also add corresponding unit tests. R=bmeurer@chromium.org Review URL: https://codereview.chromium.org/684813004 Cr-Commit-Position: refs/heads/master@{#24974} git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24974 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 24 Oct, 2014 1 commit
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baptiste.afsa@arm.com authored
R=bmeurer@chromium.org BUG= Review URL: https://codereview.chromium.org/668633003 Cr-Commit-Position: refs/heads/master@{#24882} git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24882 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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