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Commit 26fc85aa authored by mstarzinger's avatar mstarzinger Committed by Commit bot
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[turbofan] Cleanup RawMachineAssembler::Store interface. 

R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/1424983003

Cr-Commit-Position: refs/heads/master@{#31646}
parent a0b8650e
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Showing with 129 additions and 148 deletions
src/compiler/interpreter-assembler.cc
View file @ 26fc85aa
......@@ -125,9 +125,9 @@ Node* InterpreterAssembler::LoadRegister(Node* reg_index) {
Node* InterpreterAssembler::StoreRegister(Node* value, Node* reg_index) {
return raw_assembler_->Store(
StoreRepresentation(kMachAnyTagged, kNoWriteBarrier),
RegisterFileRawPointer(), RegisterFrameOffset(reg_index), value);
return raw_assembler_->Store(kMachAnyTagged, RegisterFileRawPointer(),
RegisterFrameOffset(reg_index), value,
kNoWriteBarrier);
}
......@@ -317,9 +317,8 @@ Node* InterpreterAssembler::StoreContextSlot(Node* context, Node* slot_index,
Node* offset =
IntPtrAdd(WordShl(slot_index, kPointerSizeLog2),
Int32Constant(Context::kHeaderSize - kHeapObjectTag));
return raw_assembler_->Store(
StoreRepresentation(kMachAnyTagged, kFullWriteBarrier), context, offset,
value);
return raw_assembler_->Store(kMachAnyTagged, context, offset, value,
kFullWriteBarrier);
}
......
src/compiler/raw-machine-assembler.h
View file @ 26fc85aa
......@@ -126,12 +126,14 @@ class RawMachineAssembler {
return AddNode(machine()->Load(rep), base, index, graph()->start(),
graph()->start());
}
Node* Store(StoreRepresentation rep, Node* base, Node* value) {
return Store(rep, base, IntPtrConstant(0), value);
Node* Store(MachineType rep, Node* base, Node* value,
WriteBarrierKind write_barrier) {
return Store(rep, base, IntPtrConstant(0), value, write_barrier);
}
Node* Store(StoreRepresentation rep, Node* base, Node* index, Node* value) {
return AddNode(machine()->Store(rep), base, index, value, graph()->start(),
graph()->start());
Node* Store(MachineType rep, Node* base, Node* index, Node* value,
WriteBarrierKind write_barrier) {
return AddNode(machine()->Store(StoreRepresentation(rep, write_barrier)),
base, index, value, graph()->start(), graph()->start());
}
// Arithmetic Operations.
......@@ -498,8 +500,8 @@ class RawMachineAssembler {
Node* LoadFromPointer(void* address, MachineType rep, int32_t offset = 0) {
return Load(rep, PointerConstant(address), Int32Constant(offset));
}
Node* StoreToPointer(void* address, StoreRepresentation rep, Node* node) {
return Store(rep, PointerConstant(address), node);
Node* StoreToPointer(void* address, MachineType rep, Node* node) {
return Store(rep, PointerConstant(address), node, kNoWriteBarrier);
}
Node* StringConstant(const char* string) {
return HeapConstant(isolate()->factory()->InternalizeUtf8String(string));
......
test/cctest/compiler/c-signature.h
View file @ 26fc85aa
......@@ -36,12 +36,6 @@ inline MachineType MachineTypeForC() {
return kMachAnyTagged;
}
template <typename T>
inline StoreRepresentation StoreRepresentationForC(
WriteBarrierKind write_barrier_kind) {
return StoreRepresentation(MachineTypeForC<T>(), write_barrier_kind);
}
#define DECLARE_TEMPLATE_SPECIALIZATION(ctype, mtype) \
template <> \
inline MachineType MachineTypeForC<ctype>() { \
......
test/cctest/compiler/codegen-tester.h
View file @ 26fc85aa
......@@ -108,8 +108,8 @@ class BinopTester {
void AddReturn(Node* val) {
if (use_result_buffer) {
T->Store(StoreRepresentation(rep, kNoWriteBarrier),
T->PointerConstant(&result), T->Int32Constant(0), val);
T->Store(rep, T->PointerConstant(&result), T->Int32Constant(0), val,
kNoWriteBarrier);
T->Return(T->Int32Constant(CHECK_VALUE));
} else {
T->Return(val);
......
test/cctest/compiler/test-run-machops.cc
View file @ 26fc85aa
This diff is collapsed.
test/cctest/compiler/test-run-native-calls.cc
View file @ 26fc85aa
......@@ -364,8 +364,8 @@ class ArgsBuffer {
Node* StoreOutput(RawMachineAssembler& raw, Node* value) {
Node* base = raw.PointerConstant(&output);
Node* offset = raw.Int32Constant(0);
return raw.Store(StoreRepresentationForC<CType>(kNoWriteBarrier), base,
offset, value);
return raw.Store(MachineTypeForC<CType>(), base, offset, value,
kNoWriteBarrier);
}
// Computes the next set of inputs by updating the {input} array.
......@@ -577,8 +577,7 @@ static void CopyTwentyInt32(CallDescriptor* desc) {
Node* base = raw.PointerConstant(output);
for (int i = 0; i < kNumParams; i++) {
Node* offset = raw.Int32Constant(i * sizeof(int32_t));
raw.Store(StoreRepresentation(kMachInt32, kNoWriteBarrier), base, offset,
raw.Parameter(i));
raw.Store(kMachInt32, base, offset, raw.Parameter(i), kNoWriteBarrier);
}
raw.Return(raw.Int32Constant(42));
inner = CompileGraph("CopyTwentyInt32", desc, &graph, raw.Export());
......@@ -1146,8 +1145,7 @@ void MixedParamTest(int start) {
}
Node* call = raw.CallN(desc, target, args);
StoreRepresentation store_rep(sig->GetReturn(), kNoWriteBarrier);
Node* store = raw.StoreToPointer(output, store_rep, call);
Node* store = raw.StoreToPointer(output, sig->GetReturn(), call);
USE(store);
expected_ret = static_cast<int32_t>(constant);
raw.Return(raw.Int32Constant(expected_ret));
......
test/unittests/compiler/arm/instruction-selector-arm-unittest.cc
View file @ 26fc85aa
......@@ -1320,8 +1320,8 @@ TEST_P(InstructionSelectorMemoryAccessTest, LoadWithImmediateIndex) {
TEST_P(InstructionSelectorMemoryAccessTest, StoreWithParameters) {
const MemoryAccess memacc = GetParam();
StreamBuilder m(this, kMachInt32, kMachPtr, kMachInt32, memacc.type);
StoreRepresentation store_rep(memacc.type, kNoWriteBarrier);
m.Store(store_rep, m.Parameter(0), m.Parameter(1), m.Parameter(2));
m.Store(memacc.type, m.Parameter(0), m.Parameter(1), m.Parameter(2),
kNoWriteBarrier);
m.Return(m.Int32Constant(0));
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
......@@ -1336,8 +1336,8 @@ TEST_P(InstructionSelectorMemoryAccessTest, StoreWithImmediateIndex) {
const MemoryAccess memacc = GetParam();
TRACED_FOREACH(int32_t, index, memacc.immediates) {
StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type);
StoreRepresentation store_rep(memacc.type, kNoWriteBarrier);
m.Store(store_rep, m.Parameter(0), m.Int32Constant(index), m.Parameter(1));
m.Store(memacc.type, m.Parameter(0), m.Int32Constant(index), m.Parameter(1),
kNoWriteBarrier);
m.Return(m.Int32Constant(0));
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
......
test/unittests/compiler/arm64/instruction-selector-arm64-unittest.cc
View file @ 26fc85aa
......@@ -2156,8 +2156,8 @@ TEST_P(InstructionSelectorMemoryAccessTest, LoadWithImmediateIndex) {
TEST_P(InstructionSelectorMemoryAccessTest, StoreWithParameters) {
const MemoryAccess memacc = GetParam();
StreamBuilder m(this, kMachInt32, kMachPtr, kMachInt32, memacc.type);
StoreRepresentation store_rep(memacc.type, kNoWriteBarrier);
m.Store(store_rep, m.Parameter(0), m.Parameter(1), m.Parameter(2));
m.Store(memacc.type, m.Parameter(0), m.Parameter(1), m.Parameter(2),
kNoWriteBarrier);
m.Return(m.Int32Constant(0));
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
......@@ -2172,8 +2172,8 @@ TEST_P(InstructionSelectorMemoryAccessTest, StoreWithImmediateIndex) {
const MemoryAccess memacc = GetParam();
TRACED_FOREACH(int32_t, index, memacc.immediates) {
StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type);
StoreRepresentation store_rep(memacc.type, kNoWriteBarrier);
m.Store(store_rep, m.Parameter(0), m.Int32Constant(index), m.Parameter(1));
m.Store(memacc.type, m.Parameter(0), m.Int32Constant(index), m.Parameter(1),
kNoWriteBarrier);
m.Return(m.Int32Constant(0));
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
......
test/unittests/compiler/ia32/instruction-selector-ia32-unittest.cc
View file @ 26fc85aa
......@@ -249,8 +249,8 @@ TEST_P(InstructionSelectorMemoryAccessTest, LoadWithImmediateIndex) {
TEST_P(InstructionSelectorMemoryAccessTest, StoreWithParameters) {
const MemoryAccess memacc = GetParam();
StreamBuilder m(this, kMachInt32, kMachPtr, kMachInt32, memacc.type);
StoreRepresentation store_rep(memacc.type, kNoWriteBarrier);
m.Store(store_rep, m.Parameter(0), m.Parameter(1), m.Parameter(2));
m.Store(memacc.type, m.Parameter(0), m.Parameter(1), m.Parameter(2),
kNoWriteBarrier);
m.Return(m.Int32Constant(0));
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
......@@ -264,8 +264,8 @@ TEST_P(InstructionSelectorMemoryAccessTest, StoreWithImmediateBase) {
const MemoryAccess memacc = GetParam();
TRACED_FOREACH(int32_t, base, kImmediates) {
StreamBuilder m(this, kMachInt32, kMachInt32, memacc.type);
StoreRepresentation store_rep(memacc.type, kNoWriteBarrier);
m.Store(store_rep, m.Int32Constant(base), m.Parameter(0), m.Parameter(1));
m.Store(memacc.type, m.Int32Constant(base), m.Parameter(0), m.Parameter(1),
kNoWriteBarrier);
m.Return(m.Int32Constant(0));
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
......@@ -286,8 +286,8 @@ TEST_P(InstructionSelectorMemoryAccessTest, StoreWithImmediateIndex) {
const MemoryAccess memacc = GetParam();
TRACED_FOREACH(int32_t, index, kImmediates) {
StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type);
StoreRepresentation store_rep(memacc.type, kNoWriteBarrier);
m.Store(store_rep, m.Parameter(0), m.Int32Constant(index), m.Parameter(1));
m.Store(memacc.type, m.Parameter(0), m.Int32Constant(index), m.Parameter(1),
kNoWriteBarrier);
m.Return(m.Int32Constant(0));
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
......@@ -321,8 +321,7 @@ class AddressingModeUnitTest : public InstructionSelectorTest {
void Run(Node* base, Node* load_index, Node* store_index,
AddressingMode mode) {
Node* load = m->Load(kMachInt32, base, load_index);
m->Store(StoreRepresentation(kMachInt32, kNoWriteBarrier), base,
store_index, load);
m->Store(kMachInt32, base, store_index, load, kNoWriteBarrier);
m->Return(m->Int32Constant(0));
Stream s = m->Build();
ASSERT_EQ(2U, s.size());
......
test/unittests/compiler/mips/instruction-selector-mips-unittest.cc
View file @ 26fc85aa
......@@ -646,8 +646,7 @@ TEST_P(InstructionSelectorMemoryAccessTest, LoadWithParameters) {
TEST_P(InstructionSelectorMemoryAccessTest, StoreWithParameters) {
const MemoryAccess memacc = GetParam();
StreamBuilder m(this, kMachInt32, kMachPtr, kMachInt32, memacc.type);
StoreRepresentation store_rep(memacc.type, kNoWriteBarrier);
m.Store(store_rep, m.Parameter(0), m.Parameter(1));
m.Store(memacc.type, m.Parameter(0), m.Parameter(1), kNoWriteBarrier);
m.Return(m.Int32Constant(0));
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
......@@ -697,8 +696,8 @@ TEST_P(InstructionSelectorMemoryAccessImmTest, StoreWithImmediateIndex) {
const MemoryAccessImm memacc = GetParam();
TRACED_FOREACH(int32_t, index, memacc.immediates) {
StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type);
StoreRepresentation store_rep(memacc.type, kNoWriteBarrier);
m.Store(store_rep, m.Parameter(0), m.Int32Constant(index), m.Parameter(1));
m.Store(memacc.type, m.Parameter(0), m.Int32Constant(index), m.Parameter(1),
kNoWriteBarrier);
m.Return(m.Int32Constant(0));
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
......@@ -749,8 +748,8 @@ TEST_P(InstructionSelectorMemoryAccessImmMoreThan16bitTest,
const MemoryAccessImm1 memacc = GetParam();
TRACED_FOREACH(int32_t, index, memacc.immediates) {
StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type);
StoreRepresentation store_rep(memacc.type, kNoWriteBarrier);
m.Store(store_rep, m.Parameter(0), m.Int32Constant(index), m.Parameter(1));
m.Store(memacc.type, m.Parameter(0), m.Int32Constant(index), m.Parameter(1),
kNoWriteBarrier);
m.Return(m.Int32Constant(0));
Stream s = m.Build();
ASSERT_EQ(2U, s.size());
......
test/unittests/compiler/mips64/instruction-selector-mips64-unittest.cc
View file @ 26fc85aa
......@@ -649,8 +649,7 @@ TEST_P(InstructionSelectorMemoryAccessTest, LoadWithParameters) {
TEST_P(InstructionSelectorMemoryAccessTest, StoreWithParameters) {
const MemoryAccess memacc = GetParam();
StreamBuilder m(this, kMachInt32, kMachPtr, kMachInt32, memacc.type);
StoreRepresentation store_rep(memacc.type, kNoWriteBarrier);
m.Store(store_rep, m.Parameter(0), m.Parameter(1));
m.Store(memacc.type, m.Parameter(0), m.Parameter(1), kNoWriteBarrier);
m.Return(m.Int32Constant(0));
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
......@@ -698,8 +697,8 @@ TEST_P(InstructionSelectorMemoryAccessImmTest, StoreWithImmediateIndex) {
const MemoryAccessImm memacc = GetParam();
TRACED_FOREACH(int32_t, index, memacc.immediates) {
StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type);
StoreRepresentation store_rep(memacc.type, kNoWriteBarrier);
m.Store(store_rep, m.Parameter(0), m.Int32Constant(index), m.Parameter(1));
m.Store(memacc.type, m.Parameter(0), m.Int32Constant(index), m.Parameter(1),
kNoWriteBarrier);
m.Return(m.Int32Constant(0));
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
......@@ -747,8 +746,8 @@ TEST_P(InstructionSelectorMemoryAccessImmMoreThan16bitTest,
const MemoryAccessImm1 memacc = GetParam();
TRACED_FOREACH(int32_t, index, memacc.immediates) {
StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type);
StoreRepresentation store_rep(memacc.type, kNoWriteBarrier);
m.Store(store_rep, m.Parameter(0), m.Int32Constant(index), m.Parameter(1));
m.Store(memacc.type, m.Parameter(0), m.Int32Constant(index), m.Parameter(1),
kNoWriteBarrier);
m.Return(m.Int32Constant(0));
Stream s = m.Build();
ASSERT_EQ(2U, s.size());
......
test/unittests/compiler/x64/instruction-selector-x64-unittest.cc
View file @ 26fc85aa
......@@ -124,8 +124,8 @@ TEST_P(InstructionSelectorMemoryAccessTest, LoadWithParameters) {
TEST_P(InstructionSelectorMemoryAccessTest, StoreWithParameters) {
const MemoryAccess memacc = GetParam();
StreamBuilder m(this, kMachInt32, kMachPtr, kMachInt32, memacc.type);
StoreRepresentation store_rep(memacc.type, kNoWriteBarrier);
m.Store(store_rep, m.Parameter(0), m.Parameter(1), m.Parameter(2));
m.Store(memacc.type, m.Parameter(0), m.Parameter(1), m.Parameter(2),
kNoWriteBarrier);
m.Return(m.Int32Constant(0));
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
......
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