- 18 Jun, 2019 1 commit
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Sigurd Schneider authored
This is a reland of ac79b539 This CL adds a missing BlockPoolsScope to guard a RequestHeapObject call. This fixes a latend bug that the original land flushed out. Original change's description: > [arm64] Refactor constant pool implementation > > This refactors the constant pool handling for arm64. The immediate goal > is to allow 32bit compressed pointers in the pool. The mediate goal is > to unify the implementation with the arm constant pool, which will be > done in a follow-up CL. > > Bug: v8:8054 > Change-Id: I74db4245e5e1025f2e4de4144090fa4ce25883ab > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1645316 > Reviewed-by: Michael Starzinger <mstarzinger@chromium.org> > Reviewed-by: Jakob Gruber <jgruber@chromium.org> > Commit-Queue: Sigurd Schneider <sigurds@chromium.org> > Cr-Commit-Position: refs/heads/master@{#62209} TBR=mstarzinger@chromium.org,jgruber@chromium.org,georgia.kouveli@arm.com Bug: v8:8054 Change-Id: I1e3ab13619a48caad33d77ed8bed86782f9d9674 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1664054Reviewed-by:
Sigurd Schneider <sigurds@chromium.org> Commit-Queue: Sigurd Schneider <sigurds@chromium.org> Cr-Commit-Position: refs/heads/master@{#62237}
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- 17 Jun, 2019 2 commits
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Sigurd Schneider authored
This reverts commit ac79b539. Reason for revert: https://ci.chromium.org/p/v8/builders/ci/V8%20Linux%20-%20arm64%20-%20sim/18611 Original change's description: > [arm64] Refactor constant pool implementation > > This refactors the constant pool handling for arm64. The immediate goal > is to allow 32bit compressed pointers in the pool. The mediate goal is > to unify the implementation with the arm constant pool, which will be > done in a follow-up CL. > > Bug: v8:8054 > Change-Id: I74db4245e5e1025f2e4de4144090fa4ce25883ab > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1645316 > Reviewed-by: Michael Starzinger <mstarzinger@chromium.org> > Reviewed-by: Jakob Gruber <jgruber@chromium.org> > Commit-Queue: Sigurd Schneider <sigurds@chromium.org> > Cr-Commit-Position: refs/heads/master@{#62209} TBR=mstarzinger@chromium.org,sigurds@chromium.org,jgruber@chromium.org,georgia.kouveli@arm.com Change-Id: Iff03e81a2e70d125ef2c06b6ff3aff8d0e3688ef No-Presubmit: true No-Tree-Checks: true No-Try: true Bug: v8:8054 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1662293Reviewed-by:
Sigurd Schneider <sigurds@chromium.org> Commit-Queue: Sigurd Schneider <sigurds@chromium.org> Cr-Commit-Position: refs/heads/master@{#62211}
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Sigurd Schneider authored
This refactors the constant pool handling for arm64. The immediate goal is to allow 32bit compressed pointers in the pool. The mediate goal is to unify the implementation with the arm constant pool, which will be done in a follow-up CL. Bug: v8:8054 Change-Id: I74db4245e5e1025f2e4de4144090fa4ce25883ab Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1645316Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Reviewed-by:
Jakob Gruber <jgruber@chromium.org> Commit-Queue: Sigurd Schneider <sigurds@chromium.org> Cr-Commit-Position: refs/heads/master@{#62209}
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- 28 May, 2019 1 commit
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Yang Guo authored
Bug: v8:9247 Change-Id: I2f999ed3a8cc0931e5092f2ac6e709b8ff3f9e42 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1630678 Commit-Queue: Yang Guo <yangguo@chromium.org> Reviewed-by:
Ross McIlroy <rmcilroy@chromium.org> Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#61896}
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- 27 May, 2019 1 commit
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Clemens Hammacher authored
This replaces all typedefs that define types and not functions by the equivalent "using" declaration. This was done mostly automatically using this command: ag -l '\btypedef\b' src test | xargs -L1 \ perl -i -p0e 's/typedef ([^*;{}]+) (\w+);/using \2 = \1;/sg' Patchset 2 then adds some manual changes for typedefs for pointer types, where the regular expression did not match. R=mstarzinger@chromium.org TBR=yangguo@chromium.org, jarin@chromium.org Bug: v8:9183 Change-Id: I6f6ee28d1793b7ac34a58f980b94babc21874b78 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1631409 Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#61849}
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- 24 May, 2019 1 commit
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Yang Guo authored
TBR=mvstanton@chromium.org,neis@chromium.org,ahaas@chromium.org Bug: v8:9247 Change-Id: I5433c863a54f3412d73df0d38aba3fdbcfac7ebe Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1627973 Commit-Queue: Yang Guo <yangguo@chromium.org> Auto-Submit: Yang Guo <yangguo@chromium.org> Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#61830}
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- 14 Jan, 2019 1 commit
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Camillo Bruni authored
This is a reland of e2d44ede Original change's description: > [parser] Inline byte scope data into PreparseData object > > Each PreparseData object had at least one pointer to a PodArray for its > serialized scope data. These objects usually have only tens of bytes of > payload. By inlining the byte data we save 3 words per PreparseData object. > This optimization saves 140KB of data on cnn.com. > > > - Store data_length and inner_length as int32 saving a words on 64bit > - Inline store byte data into PreparseData > - OnHeapConsumedPreparseData directly uses the PreparseData object > - get_inner, set_inner no longer allow Null sentinels > > Change-Id: I1f62154d05ea2f98a6574efa738b32a8a84319d5 > Reviewed-on: https://chromium-review.googlesource.com/c/1406673 > Reviewed-by: Leszek Swirski <leszeks@chromium.org> > Reviewed-by: Ulan Degenbaev <ulan@chromium.org> > Commit-Queue: Camillo Bruni <cbruni@chromium.org> > Cr-Commit-Position: refs/heads/master@{#58751} Change-Id: I1f0a22c641d0d67f435b01c82daf8da7f144bff4 Reviewed-on: https://chromium-review.googlesource.com/c/1407066Reviewed-by:
Leszek Swirski <leszeks@chromium.org> Reviewed-by:
Ulan Degenbaev <ulan@chromium.org> Commit-Queue: Camillo Bruni <cbruni@chromium.org> Cr-Commit-Position: refs/heads/master@{#58785}
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- 11 Jan, 2019 2 commits
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Maya Lekova authored
This reverts commit e2d44ede. Reason for revert: Breaks GC stress tests - https://ci.chromium.org/p/v8/builders/luci.v8.ci/V8%20Linux64%20GC%20Stress%20-%20custom%20snapshot/23527 Original change's description: > [parser] Inline byte scope data into PreparseData object > > Each PreparseData object had at least one pointer to a PodArray for its > serialized scope data. These objects usually have only tens of bytes of > payload. By inlining the byte data we save 3 words per PreparseData object. > This optimization saves 140KB of data on cnn.com. > > > - Store data_length and inner_length as int32 saving a words on 64bit > - Inline store byte data into PreparseData > - OnHeapConsumedPreparseData directly uses the PreparseData object > - get_inner, set_inner no longer allow Null sentinels > > Change-Id: I1f62154d05ea2f98a6574efa738b32a8a84319d5 > Reviewed-on: https://chromium-review.googlesource.com/c/1406673 > Reviewed-by: Leszek Swirski <leszeks@chromium.org> > Reviewed-by: Ulan Degenbaev <ulan@chromium.org> > Commit-Queue: Camillo Bruni <cbruni@chromium.org> > Cr-Commit-Position: refs/heads/master@{#58751} TBR=ulan@chromium.org,cbruni@chromium.org,leszeks@chromium.org Change-Id: I39d92ee7bd2864e1b0c3a8fed4a11b68b3e14d58 No-Presubmit: true No-Tree-Checks: true No-Try: true Reviewed-on: https://chromium-review.googlesource.com/c/1407073Reviewed-by:
Maya Lekova <mslekova@chromium.org> Commit-Queue: Maya Lekova <mslekova@chromium.org> Cr-Commit-Position: refs/heads/master@{#58753}
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Camillo Bruni authored
Each PreparseData object had at least one pointer to a PodArray for its serialized scope data. These objects usually have only tens of bytes of payload. By inlining the byte data we save 3 words per PreparseData object. This optimization saves 140KB of data on cnn.com. - Store data_length and inner_length as int32 saving a words on 64bit - Inline store byte data into PreparseData - OnHeapConsumedPreparseData directly uses the PreparseData object - get_inner, set_inner no longer allow Null sentinels Change-Id: I1f62154d05ea2f98a6574efa738b32a8a84319d5 Reviewed-on: https://chromium-review.googlesource.com/c/1406673Reviewed-by:
Leszek Swirski <leszeks@chromium.org> Reviewed-by:
Ulan Degenbaev <ulan@chromium.org> Commit-Queue: Camillo Bruni <cbruni@chromium.org> Cr-Commit-Position: refs/heads/master@{#58751}
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- 24 Oct, 2018 1 commit
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Tom Tan authored
This is a reland of fcbb023b Original change's description: > Add Windows ARM64 ABI support to V8 > > This change added Windows ARM64 ABI support, major things are: > 1. Excluding x18 register from any usage because it is reserved as > platform register. Preserve alignment after the change. > 2. Fix the assumption of LP64 in arm64 backend. Windows ARM64 is > still LLP64. > 3. Stack guard page probe for large allocation on stack. > > Reference: > Windows ARM64 ABI: > https://docs.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions?view=vs-2017 > > Bug: chromium:893460 > Change-Id: I325884ac8dab719154a0047141e18a9fcb8dff7e > Reviewed-on: https://chromium-review.googlesource.com/c/1285129 > Commit-Queue: Michael Achenbach <machenbach@chromium.org> > Reviewed-by: Andreas Haas <ahaas@chromium.org> > Reviewed-by: Michael Lippautz <mlippautz@chromium.org> > Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> > Reviewed-by: Ulan Degenbaev <ulan@chromium.org> > Cr-Commit-Position: refs/heads/master@{#56881} CQ_INCLUDE_TRYBOTS=luci.chromium.try:android_arm64_dbg_recipe TBR=mlippautz@chromium.org Bug: chromium:893460 Change-Id: Icc45fd091c33f7df805842a70236b79b14756f52 Reviewed-on: https://chromium-review.googlesource.com/c/1297300 Commit-Queue: Michael Achenbach <machenbach@chromium.org> Reviewed-by:
Ulan Degenbaev <ulan@chromium.org> Reviewed-by:
Michael Achenbach <machenbach@chromium.org> Cr-Commit-Position: refs/heads/master@{#56965}
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- 23 Oct, 2018 2 commits
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Michael Hablich authored
This reverts commit fcbb023b. Reason for revert: blocks roll https://chromium-review.googlesource.com/c/chromium/src/+/1296315 Original change's description: > Add Windows ARM64 ABI support to V8 > > This change added Windows ARM64 ABI support, major things are: > 1. Excluding x18 register from any usage because it is reserved as > platform register. Preserve alignment after the change. > 2. Fix the assumption of LP64 in arm64 backend. Windows ARM64 is > still LLP64. > 3. Stack guard page probe for large allocation on stack. > > Reference: > Windows ARM64 ABI: > https://docs.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions?view=vs-2017 > > Bug: chromium:893460 > Change-Id: I325884ac8dab719154a0047141e18a9fcb8dff7e > Reviewed-on: https://chromium-review.googlesource.com/c/1285129 > Commit-Queue: Michael Achenbach <machenbach@chromium.org> > Reviewed-by: Andreas Haas <ahaas@chromium.org> > Reviewed-by: Michael Lippautz <mlippautz@chromium.org> > Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> > Reviewed-by: Ulan Degenbaev <ulan@chromium.org> > Cr-Commit-Position: refs/heads/master@{#56881} TBR=bbudge@chromium.org,ulan@chromium.org,machenbach@chromium.org,hpayer@chromium.org,brucedawson@chromium.org,mlippautz@chromium.org,ahaas@chromium.org,bmeurer@chromium.org,Tom.Tan@microsoft.com Change-Id: I0b804af6dfca9409a655194fa6e5407f209be2dc No-Presubmit: true No-Tree-Checks: true No-Try: true Bug: chromium:893460 Reviewed-on: https://chromium-review.googlesource.com/c/1296460Reviewed-by:
Michael Hablich <hablich@chromium.org> Commit-Queue: Michael Hablich <hablich@chromium.org> Cr-Commit-Position: refs/heads/master@{#56912}
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Tom Tan authored
This change added Windows ARM64 ABI support, major things are: 1. Excluding x18 register from any usage because it is reserved as platform register. Preserve alignment after the change. 2. Fix the assumption of LP64 in arm64 backend. Windows ARM64 is still LLP64. 3. Stack guard page probe for large allocation on stack. Reference: Windows ARM64 ABI: https://docs.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions?view=vs-2017 Bug: chromium:893460 Change-Id: I325884ac8dab719154a0047141e18a9fcb8dff7e Reviewed-on: https://chromium-review.googlesource.com/c/1285129 Commit-Queue: Michael Achenbach <machenbach@chromium.org> Reviewed-by:
Andreas Haas <ahaas@chromium.org> Reviewed-by:
Michael Lippautz <mlippautz@chromium.org> Reviewed-by:
Benedikt Meurer <bmeurer@chromium.org> Reviewed-by:
Ulan Degenbaev <ulan@chromium.org> Cr-Commit-Position: refs/heads/master@{#56881}
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- 05 Oct, 2018 1 commit
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Peter Marshall authored
For each intrinsic/runtime function we define in runtime.h, an inline version is automatically declared. We only ever use 24 of the inline functions. Even though we don't call the other ones, macro magic means they still take up space by existing in various arrays and tables like kIntrinsicFunctions. They also create code in switch statements. Some drive-by cleanups: - Remove the switch in NameForRuntimeId() and just use the table of runtime functions to lookup the name directly. - Remove tests for IsFunction, ClassOf and StringAdd intrinsics as they are the last users of the inline versions of these. - Remove the MaxSmi inline version as it is only used in tests. Saves 64 KiB binary size. Change-Id: I4c870ddacd2655ffcffa97d93200ed8f853752f5 Reviewed-on: https://chromium-review.googlesource.com/c/1261939 Commit-Queue: Peter Marshall <petermarshall@chromium.org> Reviewed-by:
Benedikt Meurer <bmeurer@chromium.org> Reviewed-by:
Leszek Swirski <leszeks@chromium.org> Cr-Commit-Position: refs/heads/master@{#56412}
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- 23 Aug, 2018 2 commits
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Michael Starzinger authored
R=sigurds@chromium.org Change-Id: Ib024d099946d4351bfce9de8eb61be1dba5e1ce5 Reviewed-on: https://chromium-review.googlesource.com/1186415 Commit-Queue: Michael Starzinger <mstarzinger@chromium.org> Reviewed-by:
Sigurd Schneider <sigurds@chromium.org> Cr-Commit-Position: refs/heads/master@{#55351}
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Michael Starzinger authored
R=titzer@chromium.org BUG=v8:6408 Change-Id: I277beafaace334883ddbe63b9615e3f18085ce5e Reviewed-on: https://chromium-review.googlesource.com/1186411 Commit-Queue: Michael Starzinger <mstarzinger@chromium.org> Reviewed-by:
Ben Titzer <titzer@chromium.org> Cr-Commit-Position: refs/heads/master@{#55350}
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- 07 Aug, 2018 1 commit
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Sigurd Schneider authored
The instruction size in bytes is now kInstrSize on all platforms. Bug: v8:6666 Change-Id: I2f9880a6a74199a439c8327a4117efb74240aa22 Reviewed-on: https://chromium-review.googlesource.com/1164955 Commit-Queue: Sigurd Schneider <sigurds@chromium.org> Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Reviewed-by:
Georg Neis <neis@chromium.org> Cr-Commit-Position: refs/heads/master@{#54944}
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- 09 Jul, 2018 1 commit
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Sigurd Schneider authored
This CL uses pc-relative jumps and calls (B/BL) for calls from embedded builtins to embedded builtins. To make this work, the code range size is limited to 32MB on arm during mksnapshot, which ensures that all builtin to builtin offsets for jumps/calls fit into the B/BL immediate. At code generation time, we put a placeholder into the instruction offset which we resolve to the right code object when the code is copied to the heap. We use a new relocation mode RELATIVE_CODE_TARGET for these relative jumps. The relocation mode RELATIVE_CODE_TARGET should never appear after generating the snapshot. We modify the target_address/set_target_address methods of RelocInfo such that they return the absolute target addresses for pc-relative B/BL instructions. This ensures that the GC can treat RELATIVE_CODE_TARGET in the same way as code targets. This, however, only matters during snapshot creation time, and production code never contains RELATIVE_CODE_TARGET relocations. Bug: v8:6666 Cq-Include-Trybots: luci.chromium.try:linux_chromium_rel_ng Change-Id: If7eab83ad588859ca87c654a5ddc3e37caea884c Reviewed-on: https://chromium-review.googlesource.com/1117181Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Reviewed-by:
Ulan Degenbaev <ulan@chromium.org> Reviewed-by:
Jakob Gruber <jgruber@chromium.org> Commit-Queue: Sigurd Schneider <sigurds@chromium.org> Cr-Commit-Position: refs/heads/master@{#54320}
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- 26 Jun, 2018 1 commit
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Sigurd Schneider authored
We had a kRootRegisterBias on x64 before. This CL ports the feature to all other platforms as well. The root register bias is helpful to adjust the value of the root register, which allows to better utilize signed immediate offset constants in load instructions. We currently use a separate add instruction to add kRootRegisterBias in the code that initializes the root register. This could be improved by adding a custom relocation mode ensuring that instead of the root address, the root address plus the bias is inserted (and in this way the add instruction can be omitted). Bug: v8:6666 Change-Id: I55cf02ab85d11e3c6d0d83a8f7905dbf924890f1 Reviewed-on: https://chromium-review.googlesource.com/1113539 Commit-Queue: Sigurd Schneider <sigurds@chromium.org> Reviewed-by:
Jakob Gruber <jgruber@chromium.org> Cr-Commit-Position: refs/heads/master@{#54023}
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- 21 Feb, 2018 1 commit
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Martyn Capewell authored
Add support for CSDB, equivalent to HINT #20, in the system instruction space. Additionally, relax the "unallocated" identification of hint instructions that we don't support, such that they'll now disassemble as "unimplemented (System)" rather than "unallocated". Change-Id: Ia36d13fe17a98edb872f234e7cdda33d033618e8 Reviewed-on: https://chromium-review.googlesource.com/926806Reviewed-by:
Ross McIlroy <rmcilroy@chromium.org> Commit-Queue: Martyn Capewell <martyn.capewell@arm.com> Cr-Commit-Position: refs/heads/master@{#51420}
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- 16 Jan, 2018 1 commit
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Martyn Capewell authored
Remove remaining references to jssp, and return register to the allocator. Bug: v8:6644 Change-Id: Ia6938e6c9548cd45d8c9c12032920b32d3da3c4c Reviewed-on: https://chromium-review.googlesource.com/866747Reviewed-by:
Benedikt Meurer <bmeurer@chromium.org> Commit-Queue: Martyn Capewell <martyn.capewell@arm.com> Cr-Commit-Position: refs/heads/master@{#50613}
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- 02 Aug, 2017 1 commit
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Julien Brianceau authored
Bug: chromium:750830 Cq-Include-Trybots: master.tryserver.blink:linux_trusty_blink_rel;master.tryserver.chromium.linux:linux_chromium_rel_ng;master.tryserver.v8:v8_linux_noi18n_rel_ng Change-Id: Icab7b5a1c469d5e77d04df8bfca8319784e92af4 Reviewed-on: https://chromium-review.googlesource.com/595655 Commit-Queue: Julien Brianceau <jbriance@cisco.com> Reviewed-by:
Yang Guo <yangguo@chromium.org> Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Reviewed-by:
Clemens Hammacher <clemensh@chromium.org> Reviewed-by:
Daniel Ehrenberg <littledan@chromium.org> Cr-Commit-Position: refs/heads/master@{#47072}
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- 31 May, 2017 1 commit
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martyn.capewell authored
This reverts commit c5aad5f2 The CL was reverted due to missing Chromium dependencies. This commit removes the simulator trace-based tests, and the associated header file dependencies, previously pulled in by DEPS. The NEON support now has only hand-written tests, in test-assembler-arm64.cc. The remaining tests can be added in a later patch. BUG=chromium:718439 Original issue's description: > Reland "ARM64: Add NEON support" > > This reverts commit cc047635. > The CL was reverted due to a missing DEPS mirror. > > Original issue's description: > > ARM64: Add NEON support > > > > Add assembler, disassembler and simulator support for NEON in the ARM64 backend. > > > > BUG= > > > > Review-Url: https://codereview.chromium.org/2622643005 > > Cr-Commit-Position: refs/heads/master@{#44306} > > BUG= > > Review-Url: https://codereview.chromium.org/2812573003 > Cr-Commit-Position: refs/heads/master@{#44652} Review-Url: https://codereview.chromium.org/2896303003 Cr-Commit-Position: refs/heads/master@{#45633}
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- 22 May, 2017 1 commit
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Wiktor Garbacz authored
Change-Id: I20ed35a7fb5104a9cc66bb54fa8966589c43d7f9 Reviewed-on: https://chromium-review.googlesource.com/507287Reviewed-by:
Andreas Haas <ahaas@chromium.org> Reviewed-by:
Benedikt Meurer <bmeurer@chromium.org> Reviewed-by:
Daniel Clifford <danno@chromium.org> Reviewed-by:
Jakob Gruber <jgruber@chromium.org> Reviewed-by:
Marja Hölttä <marja@chromium.org> Reviewed-by:
Jochen Eisinger <jochen@chromium.org> Commit-Queue: Wiktor Garbacz <wiktorg@google.com> Cr-Commit-Position: refs/heads/master@{#45458}
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- 15 Apr, 2017 1 commit
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hablich authored
This reverts commit 8faf3d6f. Reason: blocks roll https://codereview.chromium.org/2820753003/ TBR=martyn.capewell@arm.com,jarin@chromium.org,bmeurer@chromium.org,machenbach@chromium.org NOTRY=true Review-Url: https://codereview.chromium.org/2819093002 Cr-Commit-Position: refs/heads/master@{#44660}
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- 13 Apr, 2017 1 commit
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martyn.capewell authored
This reverts commit cc047635. The CL was reverted due to a missing DEPS mirror. Original issue's description: > ARM64: Add NEON support > > Add assembler, disassembler and simulator support for NEON in the ARM64 backend. > > BUG= > > Review-Url: https://codereview.chromium.org/2622643005 > Cr-Commit-Position: refs/heads/master@{#44306} BUG= Review-Url: https://codereview.chromium.org/2812573003 Cr-Commit-Position: refs/heads/master@{#44652}
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- 31 Mar, 2017 2 commits
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machenbach authored
This reverts commit 4506382d. We don't allow DEPS'ing things outside googlesource. This requires a mirror. Also .gitignore entry is missing. NOTRY=true NOTREECHECKS=true NOPRESUBMIT=true TBR=bmeurer@chromium.org Review-Url: https://codereview.chromium.org/2785183005 Cr-Commit-Position: refs/heads/master@{#44307}
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martyn.capewell authored
Add assembler, disassembler and simulator support for NEON in the ARM64 backend. BUG= Review-Url: https://codereview.chromium.org/2622643005 Cr-Commit-Position: refs/heads/master@{#44306}
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- 28 Mar, 2017 1 commit
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martyn.capewell authored
Implement ASSEMBLE_ATOMIC_LOAD/STORE_INTEGER using acquire/release instructions, to match the existing ASSEMBLE_ATOMIC_EXCHANGE_INTEGER macro. BUG=v8:6097 Review-Url: https://codereview.chromium.org/2760963002 Cr-Commit-Position: refs/heads/master@{#44184}
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- 28 Feb, 2017 1 commit
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aseemgarg authored
Revert "Revert of [Atomics] Implement ldaxr/stlxr instructions in ARM64 simulator (patchset #8 id:140001 of https://codereview.chromium.org/2711473002/ )" This reverts commit 2362f869. BUG=v8:4614 Review-Url: https://codereview.chromium.org/2720133004 Cr-Commit-Position: refs/heads/master@{#43467}
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- 27 Feb, 2017 2 commits
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littledan authored
Revert of [Atomics] Implement ldaxr/stlxr instructions in ARM64 simulator (patchset #8 id:140001 of https://codereview.chromium.org/2711473002/ ) Reason for revert: The tree is closed due to an msan violation (use of uninitialized value) in the arm64 simulator soon after this patch landed; this seems related https://build.chromium.org/p/client.v8/builders/V8%20Linux%20-%20arm64%20-%20sim%20-%20MSAN/builds/13607/steps/Check/logs/simulator_invalidate_.. Original issue's description: > [Atomics] Implement ldaxr/stlxr instructions in ARM64 simulator > > BUG=v8:4614 > R=binji@chromium.org > > Review-Url: https://codereview.chromium.org/2711473002 > Cr-Commit-Position: refs/heads/master@{#43461} > Committed: https://chromium.googlesource.com/v8/v8/+/a2a2c1b9eeccd86e77f2c7e6eda3e1b09bb5306c TBR=binji@chromium.org,jarin@chromium.org,jacob.bramley@arm.com,aseemgarg@chromium.org # Skipping CQ checks because original CL landed less than 1 days ago. NOPRESUBMIT=true NOTREECHECKS=true NOTRY=true BUG=v8:4614 Review-Url: https://codereview.chromium.org/2720133003 Cr-Commit-Position: refs/heads/master@{#43463}
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aseemgarg authored
BUG=v8:4614 R=binji@chromium.org Review-Url: https://codereview.chromium.org/2711473002 Cr-Commit-Position: refs/heads/master@{#43461}
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- 19 May, 2016 1 commit
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binji authored
They are not currently implemented by the ARM64 simulator. R=jarin@chromium.org, bmeurer@chromium.org Review-Url: https://codereview.chromium.org/1990073002 Cr-Commit-Position: refs/heads/master@{#36385}
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- 10 Dec, 2015 1 commit
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mstarzinger authored
R=jochen@chromium.org Review URL: https://codereview.chromium.org/1506233008 Cr-Commit-Position: refs/heads/master@{#32745}
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- 08 Oct, 2015 1 commit
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jacob.bramley authored
This fixes several warnings when cross-building using GCC (since r31087, 5cf1c0bc). In particular, CPURegister::code() now returns 'int', matching the other platforms (and the coding style guide). The rest of the patch consists of similar changes to make this work. BUG= Review URL: https://codereview.chromium.org/1393043003 Cr-Commit-Position: refs/heads/master@{#31176}
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- 02 Oct, 2015 3 commits
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danno authored
Previous to this patch, both the lithium and TurboFan register allocators tracked allocated registers by "indices", rather than the register codes used elsewhere in the runtime. This patch ensures that codes are used everywhere, and in the process cleans up a bunch of redundant code and adds more structure to how the set of allocatable registers is defined. Some highlights of changes: * TurboFan's RegisterConfiguration class moved to V8's top level so that it can be shared with Crankshaft. * Various "ToAllocationIndex" and related methods removed. * Code that can be easily shared between Register classes on different platforms is now shared. * The list of allocatable registers on each platform is declared as a list rather than implicitly via the register index <-> code mapping. Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2 Cr-Commit-Position: refs/heads/master@{#30913} Committed: https://crrev.com/7b7a8205d9a00c678fb7a6e032a55fecbc1509cf Cr-Commit-Position: refs/heads/master@{#31075} Review URL: https://codereview.chromium.org/1287383003 Cr-Commit-Position: refs/heads/master@{#31087}
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danno authored
Revert of Reland: Remove register index/code indirection (patchset #20 id:380001 of https://codereview.chromium.org/1287383003/ ) Reason for revert: Failures on MIPS Original issue's description: > Remove register index/code indirection > > Previous to this patch, both the lithium and TurboFan register > allocators tracked allocated registers by "indices", rather than > the register codes used elsewhere in the runtime. This patch > ensures that codes are used everywhere, and in the process cleans > up a bunch of redundant code and adds more structure to how the > set of allocatable registers is defined. > > Some highlights of changes: > > * TurboFan's RegisterConfiguration class moved to V8's top level > so that it can be shared with Crankshaft. > * Various "ToAllocationIndex" and related methods removed. > * Code that can be easily shared between Register classes on > different platforms is now shared. > * The list of allocatable registers on each platform is declared > as a list rather than implicitly via the register index <-> > code mapping. > > Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2 > Cr-Commit-Position: refs/heads/master@{#30913} > > Committed: https://crrev.com/7b7a8205d9a00c678fb7a6e032a55fecbc1509cf > Cr-Commit-Position: refs/heads/master@{#31075} TBR=akos.palfi@imgtec.com,bmeurer@chromium.org,jarin@chromium.org,paul.lind@imgtec.com,titzer@chromium.org NOPRESUBMIT=true NOTREECHECKS=true NOTRY=true Review URL: https://codereview.chromium.org/1380863004 Cr-Commit-Position: refs/heads/master@{#31083}
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danno authored
Previous to this patch, both the lithium and TurboFan register allocators tracked allocated registers by "indices", rather than the register codes used elsewhere in the runtime. This patch ensures that codes are used everywhere, and in the process cleans up a bunch of redundant code and adds more structure to how the set of allocatable registers is defined. Some highlights of changes: * TurboFan's RegisterConfiguration class moved to V8's top level so that it can be shared with Crankshaft. * Various "ToAllocationIndex" and related methods removed. * Code that can be easily shared between Register classes on different platforms is now shared. * The list of allocatable registers on each platform is declared as a list rather than implicitly via the register index <-> code mapping. Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2 Cr-Commit-Position: refs/heads/master@{#30913} Review URL: https://codereview.chromium.org/1287383003 Cr-Commit-Position: refs/heads/master@{#31075}
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- 30 Sep, 2015 1 commit
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mstarzinger authored
This enables linter checking for "readability/namespace" violations during presubmit and instead marks the few known exceptions that we allow explicitly. R=bmeurer@chromium.org Review URL: https://codereview.chromium.org/1371083003 Cr-Commit-Position: refs/heads/master@{#31019}
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- 24 Sep, 2015 2 commits
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danno authored
Revert of Remove register index/code indirection (patchset #17 id:320001 of https://codereview.chromium.org/1287383003/ ) Reason for revert: Failures on greedy RegAlloc, Fuzzer Original issue's description: > Remove register index/code indirection > > Previous to this patch, both the lithium and TurboFan register > allocators tracked allocated registers by "indices", rather than > the register codes used elsewhere in the runtime. This patch > ensures that codes are used everywhere, and in the process cleans > up a bunch of redundant code and adds more structure to how the > set of allocatable registers is defined. > > Some highlights of changes: > > * TurboFan's RegisterConfiguration class moved to V8's top level > so that it can be shared with Crankshaft. > * Various "ToAllocationIndex" and related methods removed. > * Code that can be easily shared between Register classes on > different platforms is now shared. > * The list of allocatable registers on each platform is declared > as a list rather than implicitly via the register index <-> > code mapping. > > Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2 > Cr-Commit-Position: refs/heads/master@{#30913} TBR=akos.palfi@imgtec.com,bmeurer@chromium.org,jarin@chromium.org,paul.lind@imgtec.com,titzer@chromium.org NOPRESUBMIT=true NOTREECHECKS=true NOTRY=true Review URL: https://codereview.chromium.org/1365073002 Cr-Commit-Position: refs/heads/master@{#30914}
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danno authored
Previous to this patch, both the lithium and TurboFan register allocators tracked allocated registers by "indices", rather than the register codes used elsewhere in the runtime. This patch ensures that codes are used everywhere, and in the process cleans up a bunch of redundant code and adds more structure to how the set of allocatable registers is defined. Some highlights of changes: * TurboFan's RegisterConfiguration class moved to V8's top level so that it can be shared with Crankshaft. * Various "ToAllocationIndex" and related methods removed. * Code that can be easily shared between Register classes on different platforms is now shared. * The list of allocatable registers on each platform is declared as a list rather than implicitly via the register index <-> code mapping. Review URL: https://codereview.chromium.org/1287383003 Cr-Commit-Position: refs/heads/master@{#30913}
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