- 28 Apr, 2016 1 commit
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balazs.kilvady authored
TEST=mjsunit/asm/embenchen/zlib BUG= Review-Url: https://codereview.chromium.org/1925543003 Cr-Commit-Position: refs/heads/master@{#35854}
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- 11 Apr, 2016 1 commit
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Ilija.Pavlovic authored
Enabled big endian testing for MIPS32 and MIPS64. The tests are also adapted for big endian variant. TEST=cctest/test-assembler-mips[64] BUG= Review URL: https://codereview.chromium.org/1867503002 Cr-Commit-Position: refs/heads/master@{#35369}
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- 25 Mar, 2016 1 commit
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balazs.kilvady authored
Use macro instructions for min, max ops to get the same functionality on pre-r6 and r6 targets. BUG= TEST=mjsunit/math-min-max, cctest/test-macro-assembler-mips64/min_max_nan, cctest/test-macro-assembler-mips/min_max_nan, cctest/test-assembler-mips64/min_max, cctest/test-assembler-mips/min_max Review URL: https://codereview.chromium.org/1694833002 Cr-Commit-Position: refs/heads/master@{#35073}
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- 10 Mar, 2016 1 commit
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balazs.kilvady authored
Make the low level assembler implementation exact and protected to disallow explicit usage. BUG= Review URL: https://codereview.chromium.org/1749263002 Cr-Commit-Position: refs/heads/master@{#34673}
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- 08 Feb, 2016 1 commit
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ivica.bogosavljevic authored
Fix failures on MIPS simulator because incomplete handling of MTHC1 and MFHC1 in Fp32 mode Fix failures on older kernels that have problems with MTHC1 and MFHC1 in kernel FPU emulation Original issue's description: > Revert of MIPS: Add FPXX support to MIPS32R2 (patchset #3 > id:40001 of https://codereview.chromium.org/1586223004/ ) > > Reason for revert: > Revert patch due to a number of failures appearing on the > MIPS v8 simulator > > Original issue's description: >> MIPS: Add FPXX support to MIPS32R2 >> >> The JIT code generated by V8 is FPXX compliant >> when v8 compiled with FPXX flag. This allows the code to >> run in both FP=1 and FP=0 mode. It also alows v8 to be used >> as a library by both FP32 and FP64 binaries. >> >> BUG= >> >> Committed: https://crrev.com/95110dde666158a230a823fd50a68558ad772320 >> Cr-Commit-Position: refs/heads/master@{#33576} BUG= Review URL: https://codereview.chromium.org/1659883002 Cr-Commit-Position: refs/heads/master@{#33808}
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- 05 Feb, 2016 1 commit
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balazs.kilvady authored
BUG= TEST=cctest/test-assembler-mips/min_max, cctest/test-assembler-mips/mina_maxa, cctest/test-assembler-mips64/min_max, cctest/test-assembler-mips64/mina_maxa Review URL: https://codereview.chromium.org/1668143002 Cr-Commit-Position: refs/heads/master@{#33790}
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- 03 Feb, 2016 1 commit
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balazs.kilvady authored
BUG= Review URL: https://codereview.chromium.org/1628453002 Cr-Commit-Position: refs/heads/master@{#33703}
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- 28 Jan, 2016 2 commits
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ivica.bogosavljevic authored
Revert of MIPS: Add FPXX support to MIPS32R2 (patchset #3 id:40001 of https://codereview.chromium.org/1586223004/ ) Reason for revert: Revert patch due to a number of failures appearing on the MIPS v8 simulator Original issue's description: > MIPS: Add FPXX support to MIPS32R2 > > The JIT code generated by V8 is FPXX compliant > when v8 compiled with FPXX flag. This allows the code to > run in both FP=1 and FP=0 mode. It also alows v8 to be used > as a library by both FP32 and FP64 binaries. > > BUG= > > Committed: https://crrev.com/95110dde666158a230a823fd50a68558ad772320 > Cr-Commit-Position: refs/heads/master@{#33576} TBR=paul.lind@imgtec.com,gergely.kis@imgtec.com,akos.palfi@imgtec.com,ilija.pavlovic@imgtec.com,marija.antic@imgtec.com,miran.karic@imgtec.com,balazs.kilvady@imgtec.com # Skipping CQ checks because original CL landed less than 1 days ago. NOPRESUBMIT=true NOTREECHECKS=true NOTRY=true BUG= Review URL: https://codereview.chromium.org/1646813003 Cr-Commit-Position: refs/heads/master@{#33583}
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ivica.bogosavljevic authored
The JIT code generated by V8 is FPXX compliant when v8 compiled with FPXX flag. This allows the code to run in both FP=1 and FP=0 mode. It also alows v8 to be used as a library by both FP32 and FP64 binaries. BUG= Review URL: https://codereview.chromium.org/1586223004 Cr-Commit-Position: refs/heads/master@{#33576}
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- 12 Jan, 2016 1 commit
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balazs.kilvady authored
BUG= Review URL: https://codereview.chromium.org/1573953002 Cr-Commit-Position: refs/heads/master@{#33249}
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- 05 Jan, 2016 1 commit
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balazs.kilvady authored
BUG= Review URL: https://codereview.chromium.org/1545013002 Cr-Commit-Position: refs/heads/master@{#33127}
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- 24 Dec, 2015 1 commit
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paul.lind authored
Per request in https://codereview.chromium.org/1047213002/ These files will continue to have a lot of churn in next two months as we finish support for MIPS r6 instruction set. When things settle down, we will do a clang-format --full to clean them up. For now, we'd prefer to be able to do easy diffs, and will do incremental re-formats as we make changes. BUG= Review URL: https://codereview.chromium.org/1546973003 Cr-Commit-Position: refs/heads/master@{#33038}
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- 21 Dec, 2015 1 commit
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ivica.bogosavljevic authored
After Cvt_d_uw macro, upper 32 bits of the output remain unitnitialized which caused flaky failures on some tests on MIPS32R6 TEST=cctest/test-assembler-mips/MIPS13,mjsunit/asm/int32-umod BUG= Review URL: https://codereview.chromium.org/1537973002 Cr-Commit-Position: refs/heads/master@{#32983}
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- 09 Dec, 2015 1 commit
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jochen authored
Embedders still can use those APIs by default test-api.cc still has an exception to use the old APIs... BUG=v8:4143 R=vogelheim@chromium.org LOG=n Review URL: https://codereview.chromium.org/1505803004 Cr-Commit-Position: refs/heads/master@{#32701}
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- 07 Dec, 2015 1 commit
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bmeurer authored
The test expectations should fail consistently in both release and debug builds. DCHECK is only meant for debug-only checks in production code. R=yangguo@chromium.org Review URL: https://codereview.chromium.org/1506753002 Cr-Commit-Position: refs/heads/master@{#32639}
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- 02 Dec, 2015 1 commit
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ivica.bogosavljevic authored
MIPS R6 introduced new behavior for handling of NaN values for TRUNC, FLOOR, CEIL and CVT instructions. Adding support for the new behavior in MIPS and MIPS64 simulators. Fixing tests for MIPS and MIPS64 to align them with the new behavior. BUG= Review URL: https://codereview.chromium.org/1488613007 Cr-Commit-Position: refs/heads/master@{#32499}
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- 30 Nov, 2015 2 commits
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alan.li authored
BUG= Review URL: https://codereview.chromium.org/1453373002 Cr-Commit-Position: refs/heads/master@{#32418}
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alan.li authored
BUG= Review URL: https://codereview.chromium.org/1481493002 Cr-Commit-Position: refs/heads/master@{#32417}
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- 25 Nov, 2015 1 commit
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jochen authored
We always want to have an Isolate, so just use an extra ctor arg BUG=2487 R=yangguo@chromium.org,mstarzinger@chromium.org LOG=n Review URL: https://codereview.chromium.org/1476763002 Cr-Commit-Position: refs/heads/master@{#32277}
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- 23 Nov, 2015 1 commit
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jochen authored
BUG=2487 R=ulan@chromium.org LOG=n Review URL: https://codereview.chromium.org/1457223005 Cr-Commit-Position: refs/heads/master@{#32164}
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- 20 Nov, 2015 1 commit
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jochen authored
BUG=4134 R=epertoso@chromium.org LOG=n Review URL: https://codereview.chromium.org/1460193002 Cr-Commit-Position: refs/heads/master@{#32137}
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- 19 Nov, 2015 1 commit
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ivica.bogosavljevic authored
Fixing failures in cctest/test-assembler-mips/CVT on Mips32R2 without FP64 support BUG= Review URL: https://codereview.chromium.org/1459763003 Cr-Commit-Position: refs/heads/master@{#32121}
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- 18 Nov, 2015 1 commit
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balazs.kilvady authored
BUG=chromium:555543 LOG=N Review URL: https://codereview.chromium.org/1446343002 Cr-Commit-Position: refs/heads/master@{#32094}
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- 13 Oct, 2015 1 commit
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akos.palfi authored
Correctly initialize the high FP registers. TEST=test-assembler-mips/movz_movn,test-assembler-mips64/movz_movn BUG= Review URL: https://codereview.chromium.org/1399413003 Cr-Commit-Position: refs/heads/master@{#31245}
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- 15 Sep, 2015 1 commit
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Ilija.Pavlovic authored
Remove incorrect usage of callee-saved FPU regs (f20 and above). Also remove unnecessary push/pop which were occasionally unpaired, and caused crash. TEST=cctest/test-assembler-mips[64] BUG= Review URL: https://codereview.chromium.org/1338713004 Cr-Commit-Position: refs/heads/master@{#30729}
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- 07 Aug, 2015 1 commit
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Djordje.Pesic authored
Also clean up variable naming in min_max and other tests. Fix class_fmt in mips64 assembler test for proper NaN checking Review URL: https://codereview.chromium.org/1276813004 Cr-Commit-Position: refs/heads/master@{#30073}
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- 23 Jul, 2015 1 commit
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Ilija.Pavlovic authored
In simulator data trace, DSLL did not print result and BAL/BGEZAL omitted result from an instruction executed in delay slot. TEST=cctest/test-assembler-mips[64] BUG= Review URL: https://codereview.chromium.org/1245173002 Cr-Commit-Position: refs/heads/master@{#29796}
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- 13 Jul, 2015 1 commit
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paul.lind authored
Fixes possible failure in AssembleArchTableSwitch(). BUG=v8:4294 LOG=y Review URL: https://codereview.chromium.org/1229863004 Cr-Commit-Position: refs/heads/master@{#29589}
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- 01 Jul, 2015 1 commit
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Djordje.Pesic authored
Disabling rsqrt and recip for mips32r1 in assembler, disassembler and simulator Review URL: https://codereview.chromium.org/1221663006 Cr-Commit-Position: refs/heads/master@{#29425}
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- 19 Jun, 2015 1 commit
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Ilija.Pavlovic authored
Added: JIC, BEQZC, JIALC, LDPC, LWPC, ALUIPC, ADDIUPC, ALIGN/DAILGN, LWUPC, AUIPC, BC, BALC. Additional fixed compact branch offset. TEST=test-assembler-mips[64]/r6_align, r6_dalign, r6_aluipc, r6_lwpc, r6_jic, r6_beqzc, r6_jialc, r6_addiupc, r6_ldpc, r6_lwupc, r6_auipc, r6_bc, r6_balc BUG= Review URL: https://codereview.chromium.org/1195793002 Cr-Commit-Position: refs/heads/master@{#29143}
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- 17 Jun, 2015 1 commit
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svenpanne authored
The remaining uses need some non-mechanical work: * non-standard-layout type, probably due to mixed access control * extended field designators Review URL: https://codereview.chromium.org/1173343006 Cr-Commit-Position: refs/heads/master@{#29071}
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- 10 Jun, 2015 1 commit
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balazs.kilvady authored
On Mac for the requested minimal version (10.5) only old stl (from gcc 4.2.1) can be used so unfortunately we can't use numeric_limits<>::lowest() which were added in 874c54e0 BUG= TEST=cctest/test-assembler-mips64, cctest/test-assembler-mips Review URL: https://codereview.chromium.org/1175463003 Cr-Commit-Position: refs/heads/master@{#28907}
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- 04 Jun, 2015 1 commit
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Djordje.Pesic authored
Review URL: https://codereview.chromium.org/1152993005 Cr-Commit-Position: refs/heads/master@{#28800}
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- 22 May, 2015 1 commit
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Djordje.Pesic authored
Implement assembler, disassembler tests for all instructions for mips32 and mips64. Additionally, add missing single precision float instructions for r2 and r6 architecture variants in assembler, simulator and disassembler with corresponding tests. Review URL: https://codereview.chromium.org/1145223002 Cr-Commit-Position: refs/heads/master@{#28595}
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- 19 May, 2015 1 commit
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Djordje.Pesic authored
Implement assembler, disassembler tests for all instructions for mips32 and mips64. Additionally, add missing single precision float instructions for r2 and r6 architecture variants in assembler, simulator and disassembler with corresponding tests. Review URL: https://codereview.chromium.org/1147493002 Cr-Commit-Position: refs/heads/master@{#28472}
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- 18 May, 2015 1 commit
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dusan.milosavljevic authored
TEST=cctest/test-assembler-mips/MIPS11 BUG= Review URL: https://codereview.chromium.org/1133663007 Cr-Commit-Position: refs/heads/master@{#28440}
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- 14 May, 2015 2 commits
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paul.lind authored
Reason for revert: Simulator test failures in RunChangeFloat64ToInt.., RunChangeTaggedToInt32, div-mul-minus-one Original issue's description: > Implement assembler, disassembler tests for all instructions for mips32 > and mips64. Additionally, add missing single precision float instructions > for r2 and r6 architecture variants in assembler, simulator and disassembler > with corresponding tests. BUG= Review URL: https://codereview.chromium.org/1143473003 Cr-Commit-Position: refs/heads/master@{#28404}
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Djordje.Pesic authored
Implement assembler, disassembler tests for all instructions for mips32 and mips64. Additionally, add missing single precision float instructions for r2 and r6 architecture variants in assembler, simulator and disassembler with corresponding tests. Review URL: https://codereview.chromium.org/1119203003 Cr-Commit-Position: refs/heads/master@{#28402}
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- 30 Apr, 2015 2 commits
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dusan.milosavljevic authored
TEST= BUG= Review URL: https://codereview.chromium.org/1118693002 Cr-Commit-Position: refs/heads/master@{#28181}
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Djordje.Pesic authored
Added rounding according to fcsr, CVT_W_D and RINT.D instruction in assembler, dissasembler and simulator and wrote appropiate tests. BUG= Review URL: https://codereview.chromium.org/1108583003 Cr-Commit-Position: refs/heads/master@{#28143}
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