1. 20 Apr, 2016 2 commits
    • titzer's avatar
      [turbofan] Length and index2 are unsigned in CheckedLoad/CheckedStore. · b994ad45
      titzer authored
      Also factor out test cases from test-run-machops.cc into test-run-load-store.cc
      
      BUG=chromium:599717
      LOG=Y
      
      Review URL: https://codereview.chromium.org/1858323003
      
      Cr-Commit-Position: refs/heads/master@{#35651}
      b994ad45
    • mtrofin's avatar
      [turbofan] CodeGenerator: Frame setup refactoring · 81a1530e
      mtrofin authored
      Before frame elision, we finalized the frame shape when assembling the
      prologue, which is also when we prepared the frame (saving sp, etc).
      
      The frame finalization only needs to happen once, and happens to be
      actually a set of idempotent operations. With frame elision, the logic for
      frame finalization was happening every time we constructed the frame.
      Albeit idempotent operations, the code would become hard to maintain.
      
      This change separates frame shape finalization from frame
      construction. When constructing the CodeGenerator, we finalize the
      frame. Subsequent access is to a const Frame*.
      
      Also renamed AssemblePrologue to AssembleConstructFrame, as
      suggested in the frame elision CR.
      
      Separating frame setup gave the opportunity to do away with
      architecture-independent frame aligning (which is something just arm64
      cares about), and also with stack pointer setup (also arm64). Both of
      these happen now at frame finalization on arm64.
      
      BUG=
      
      Review URL: https://codereview.chromium.org/1843143002
      
      Cr-Commit-Position: refs/heads/master@{#35642}
      81a1530e
  2. 24 Feb, 2016 1 commit
  3. 24 Nov, 2015 1 commit
    • danno's avatar
      [turbofan] Add general support for sp-based frame access · 51669873
      danno authored
      Some highlights of this CL:
      * Refactor the mutable state out of Frame into FrameAccessState,
        which is maintained and updated during code generation to
        record whether sp- or fp-based frame access is currently active
        and how deep the stack on top of the frame is.
      * The operand resultion in linkage.cc now uses FrameAccessState
        to determine how to generate frame-accessing operands.
      * Update all platforms to accurately track additionally pushed
        stack slots (e.g. arguments for calls) in the FrameAccessState.
      * Add a flag, --turbo_sp_frame_access, which forces all frame
        access to be sp-based whenever possible. This will likely never
        be used in production, but for testing it's useful in verifying
        that the stack-tracking of each platform maintained in the
        FrameAccessState is correct.
      * Use sp-based frame access for gap resolving before tail
        calls. This will allow for slightly more efficient restoration
        of the frame pointer in the tail call in a later CL.
      * Remove most ad hoc groping into CallDescriptors to
        determine if a frame is needed, instead consistently use
        predicates like needs_frame(), IsCFunctionCall() and
        IsJSFunctionCall().
      
      BUG=v8:4076
      LOG=n
      
      Review URL: https://codereview.chromium.org/1460183002
      
      Cr-Commit-Position: refs/heads/master@{#32234}
      51669873
  4. 10 Nov, 2015 1 commit
  5. 27 Oct, 2015 1 commit
    • danno's avatar
      [turbofan] Create ExplicitOperands to specify operands without virtual registers · f1aa5562
      danno authored
      Up until now, if one wanted to specify an explicit stack location                                                                                                                                                                                                or register as an operand for an instruction, it had to also be
      explicitly associated with a virtual register as a so-called
      FixedRegister or FixedStackSlot.
      
      For the implementation of tail calls, the plan is to use the gap
      resolver needs to shuffle stack locations from the caller to the
      tail-called callee. In order to do this, it must be possible to
      explicitly address operand locations on the stack that are not
      associated with virtual registers.
      
      This CL introduces ExplictOperands, which can specify a specific
      register or stack location that is not associated with virtual
      register. This will allow tail calls to specify the target
      locations for the necessary stack moves in the gap for the tail
      call without the core register allocation having to know about
      the target of the stack moves at all.
      
      In the process this CL:
      * creates a new Operand kind, ExplicitOperand, with which
        instructions can specify register and stack slots without an
        associated virtual register.
      * creates a LocationOperand class from which AllocatedOperand and
        ExplicitOperand are derived and provides a common interface to
        get Register, DoubleRegister and spill slot information.
      * removes RegisterOperand, DoubleRegisterOperand,
        StackSlotOperand and DoubleStackSlotOperand, they are subsumed
        by LocationOperand.
      * addresses a cleanup TODO in AllocatedOperand to reduce the
        redundancy of AllocatedOperand::Kind by using machine_type() to
        determine if an operand corresponds to a general purpose or
        double register.
      
      BUG=v8:4076
      LOG=n
      
      Review URL: https://codereview.chromium.org/1389373002
      
      Cr-Commit-Position: refs/heads/master@{#31603}
      f1aa5562
  6. 14 Oct, 2015 1 commit
  7. 02 Oct, 2015 3 commits
    • danno's avatar
      Re-reland: Remove register index/code indirection · 5cf1c0bc
      danno authored
      Previous to this patch, both the lithium and TurboFan register
      allocators tracked allocated registers by "indices", rather than
      the register codes used elsewhere in the runtime. This patch
      ensures that codes are used everywhere, and in the process cleans
      up a bunch of redundant code and adds more structure to how the
      set of allocatable registers is defined.
      
      Some highlights of changes:
      
      * TurboFan's RegisterConfiguration class moved to V8's top level
        so that it can be shared with Crankshaft.
      * Various "ToAllocationIndex" and related methods removed.
      * Code that can be easily shared between Register classes on
        different platforms is now shared.
      * The list of allocatable registers on each platform is declared
        as a list rather than implicitly via the register index <->
        code mapping.
      
      Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2
      Cr-Commit-Position: refs/heads/master@{#30913}
      
      Committed: https://crrev.com/7b7a8205d9a00c678fb7a6e032a55fecbc1509cf
      Cr-Commit-Position: refs/heads/master@{#31075}
      
      Review URL: https://codereview.chromium.org/1287383003
      
      Cr-Commit-Position: refs/heads/master@{#31087}
      5cf1c0bc
    • danno's avatar
      Revert of Reland: Remove register index/code indirection (patchset #20... · 00e07b00
      danno authored
      Revert of Reland: Remove register index/code indirection (patchset #20 id:380001 of https://codereview.chromium.org/1287383003/ )
      
      Reason for revert:
      Failures on MIPS
      
      Original issue's description:
      > Remove register index/code indirection
      >
      > Previous to this patch, both the lithium and TurboFan register
      > allocators tracked allocated registers by "indices", rather than
      > the register codes used elsewhere in the runtime. This patch
      > ensures that codes are used everywhere, and in the process cleans
      > up a bunch of redundant code and adds more structure to how the
      > set of allocatable registers is defined.
      >
      > Some highlights of changes:
      >
      > * TurboFan's RegisterConfiguration class moved to V8's top level
      >   so that it can be shared with Crankshaft.
      > * Various "ToAllocationIndex" and related methods removed.
      > * Code that can be easily shared between Register classes on
      >   different platforms is now shared.
      > * The list of allocatable registers on each platform is declared
      >   as a list rather than implicitly via the register index <->
      >   code mapping.
      >
      > Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2
      > Cr-Commit-Position: refs/heads/master@{#30913}
      >
      > Committed: https://crrev.com/7b7a8205d9a00c678fb7a6e032a55fecbc1509cf
      > Cr-Commit-Position: refs/heads/master@{#31075}
      
      TBR=akos.palfi@imgtec.com,bmeurer@chromium.org,jarin@chromium.org,paul.lind@imgtec.com,titzer@chromium.org
      NOPRESUBMIT=true
      NOTREECHECKS=true
      NOTRY=true
      
      Review URL: https://codereview.chromium.org/1380863004
      
      Cr-Commit-Position: refs/heads/master@{#31083}
      00e07b00
    • danno's avatar
      Remove register index/code indirection · 7b7a8205
      danno authored
      Previous to this patch, both the lithium and TurboFan register
      allocators tracked allocated registers by "indices", rather than
      the register codes used elsewhere in the runtime. This patch
      ensures that codes are used everywhere, and in the process cleans
      up a bunch of redundant code and adds more structure to how the
      set of allocatable registers is defined.
      
      Some highlights of changes:
      
      * TurboFan's RegisterConfiguration class moved to V8's top level
        so that it can be shared with Crankshaft.
      * Various "ToAllocationIndex" and related methods removed.
      * Code that can be easily shared between Register classes on
        different platforms is now shared.
      * The list of allocatable registers on each platform is declared
        as a list rather than implicitly via the register index <->
        code mapping.
      
      Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2
      Cr-Commit-Position: refs/heads/master@{#30913}
      
      Review URL: https://codereview.chromium.org/1287383003
      
      Cr-Commit-Position: refs/heads/master@{#31075}
      7b7a8205
  8. 24 Sep, 2015 3 commits
    • danno's avatar
      Revert of Remove register index/code indirection (patchset #17 id:320001 of... · 3ac27431
      danno authored
      Revert of Remove register index/code indirection (patchset #17 id:320001 of https://codereview.chromium.org/1287383003/ )
      
      Reason for revert:
      Failures on greedy RegAlloc, Fuzzer
      
      Original issue's description:
      > Remove register index/code indirection
      >
      > Previous to this patch, both the lithium and TurboFan register
      > allocators tracked allocated registers by "indices", rather than
      > the register codes used elsewhere in the runtime. This patch
      > ensures that codes are used everywhere, and in the process cleans
      > up a bunch of redundant code and adds more structure to how the
      > set of allocatable registers is defined.
      >
      > Some highlights of changes:
      >
      > * TurboFan's RegisterConfiguration class moved to V8's top level
      >   so that it can be shared with Crankshaft.
      > * Various "ToAllocationIndex" and related methods removed.
      > * Code that can be easily shared between Register classes on
      >   different platforms is now shared.
      > * The list of allocatable registers on each platform is declared
      >   as a list rather than implicitly via the register index <->
      >   code mapping.
      >
      > Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2
      > Cr-Commit-Position: refs/heads/master@{#30913}
      
      TBR=akos.palfi@imgtec.com,bmeurer@chromium.org,jarin@chromium.org,paul.lind@imgtec.com,titzer@chromium.org
      NOPRESUBMIT=true
      NOTREECHECKS=true
      NOTRY=true
      
      Review URL: https://codereview.chromium.org/1365073002
      
      Cr-Commit-Position: refs/heads/master@{#30914}
      3ac27431
    • danno's avatar
      Remove register index/code indirection · 80bc6f6e
      danno authored
      Previous to this patch, both the lithium and TurboFan register
      allocators tracked allocated registers by "indices", rather than
      the register codes used elsewhere in the runtime. This patch
      ensures that codes are used everywhere, and in the process cleans
      up a bunch of redundant code and adds more structure to how the
      set of allocatable registers is defined.
      
      Some highlights of changes:
      
      * TurboFan's RegisterConfiguration class moved to V8's top level
        so that it can be shared with Crankshaft.
      * Various "ToAllocationIndex" and related methods removed.
      * Code that can be easily shared between Register classes on
        different platforms is now shared.
      * The list of allocatable registers on each platform is declared
        as a list rather than implicitly via the register index <->
        code mapping.
      
      Review URL: https://codereview.chromium.org/1287383003
      
      Cr-Commit-Position: refs/heads/master@{#30913}
      80bc6f6e
    • martyn.capewell's avatar
      [turbofan] Elide fp32 convert for const compares · 809f6b15
      martyn.capewell authored
      Reduce operations of the form f64cmp(fp32to64(x), k) to f32cmp(x, k) when k
      can be encoded as a 32-bit float.
      
      Review URL: https://codereview.chromium.org/1365623002
      
      Cr-Commit-Position: refs/heads/master@{#30909}
      809f6b15
  9. 25 Jun, 2015 1 commit
  10. 09 Apr, 2015 2 commits
  11. 25 Feb, 2015 1 commit
  12. 23 Feb, 2015 1 commit
  13. 09 Feb, 2015 1 commit
  14. 02 Dec, 2014 1 commit
  15. 26 Nov, 2014 1 commit
  16. 06 Nov, 2014 1 commit
  17. 30 Oct, 2014 1 commit
  18. 14 Oct, 2014 1 commit
  19. 30 Sep, 2014 1 commit
  20. 08 Aug, 2014 1 commit
  21. 06 Aug, 2014 2 commits
  22. 04 Aug, 2014 1 commit
  23. 01 Aug, 2014 1 commit
  24. 30 Jul, 2014 1 commit