- 03 Nov, 2015 1 commit
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balazs.kilvady authored
BUG= Review URL: https://codereview.chromium.org/1396133002 Cr-Commit-Position: refs/heads/master@{#31761}
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- 13 Oct, 2015 1 commit
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Djordje.Pesic authored
Fix mina instruction in mips32 and mips64 simulator according to IEEE 754-2008 standard BUG= Review URL: https://codereview.chromium.org/1402923002 Cr-Commit-Position: refs/heads/master@{#31243}
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- 04 Sep, 2015 1 commit
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balazs.kilvady authored
The patch decreases the calls of huge switch instructions making the DecodeType*() functions to work in one phase and optimizing Instruction::InstructionType(). Speed gain in release full check is about 33% (6:13 s -> 4:09 s) and in optdebug full test is about 50% (12:29 -> 6:17) BUG= Review URL: https://codereview.chromium.org/1310883005 Cr-Commit-Position: refs/heads/master@{#30596}
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- 24 Aug, 2015 1 commit
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mstarzinger authored
The simulator uses a separate JS stack, exhaustion of the C stack however is not caught by JS limit checks. This change now lowers the limit of the JS stack accordingly on function calls. R=mvstanton@chromium.org BUG=chromium:522380 TEST=mjsunit/regress/regress-crbug-522380 LOG=n Review URL: https://codereview.chromium.org/1314623002 Cr-Commit-Position: refs/heads/master@{#30334}
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- 17 Aug, 2015 1 commit
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mstarzinger authored
R=yangguo@chromium.org Review URL: https://codereview.chromium.org/1299563003 Cr-Commit-Position: refs/heads/master@{#30187}
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- 01 Jul, 2015 1 commit
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Djordje.Pesic authored
Disabling rsqrt and recip for mips32r1 in assembler, disassembler and simulator Review URL: https://codereview.chromium.org/1221663006 Cr-Commit-Position: refs/heads/master@{#29425}
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- 19 Jun, 2015 2 commits
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Djordje.Pesic authored
Added memory and register data tracing to mips32 simulator Review URL: https://codereview.chromium.org/1195783002 Cr-Commit-Position: refs/heads/master@{#29163}
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Ilija.Pavlovic authored
Added: JIC, BEQZC, JIALC, LDPC, LWPC, ALUIPC, ADDIUPC, ALIGN/DAILGN, LWUPC, AUIPC, BC, BALC. Additional fixed compact branch offset. TEST=test-assembler-mips[64]/r6_align, r6_dalign, r6_aluipc, r6_lwpc, r6_jic, r6_beqzc, r6_jialc, r6_addiupc, r6_ldpc, r6_lwupc, r6_auipc, r6_bc, r6_balc BUG= Review URL: https://codereview.chromium.org/1195793002 Cr-Commit-Position: refs/heads/master@{#29143}
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- 17 Jun, 2015 1 commit
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svenpanne authored
The remaining uses need some non-mechanical work: * non-standard-layout type, probably due to mixed access control * extended field designators Review URL: https://codereview.chromium.org/1173343006 Cr-Commit-Position: refs/heads/master@{#29071}
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- 08 Jun, 2015 1 commit
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mbrandy authored
We see this error using GCC 4.8.2. R=michael_dawson@ca.ibm.com BUG= Review URL: https://codereview.chromium.org/1153213003 Cr-Commit-Position: refs/heads/master@{#28844}
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- 01 Jun, 2015 1 commit
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erikcorry authored
When compiling on a laptop I like to concatenate the small test files. This makes a big difference to compile times. These changes make that easier. R=ulan@chromium.org BUG= Review URL: https://codereview.chromium.org/1163803002 Cr-Commit-Position: refs/heads/master@{#28742}
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- 22 May, 2015 1 commit
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Djordje.Pesic authored
Implement assembler, disassembler tests for all instructions for mips32 and mips64. Additionally, add missing single precision float instructions for r2 and r6 architecture variants in assembler, simulator and disassembler with corresponding tests. Review URL: https://codereview.chromium.org/1145223002 Cr-Commit-Position: refs/heads/master@{#28595}
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- 20 May, 2015 1 commit
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svenpanne authored
Alas, this involved quite a bit of copy-n-paste between the architectures, but this is caused by the very convoluted relationships, lifetimes and distribution of responsibilities. This should really be cleaned up by moving code around and using STL maps, but that's not really a priority right now. Bonus: Fixed leaks in the ARM64 disassembler tests. Review URL: https://codereview.chromium.org/1132943007 Cr-Commit-Position: refs/heads/master@{#28496}
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- 19 May, 2015 1 commit
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Djordje.Pesic authored
Implement assembler, disassembler tests for all instructions for mips32 and mips64. Additionally, add missing single precision float instructions for r2 and r6 architecture variants in assembler, simulator and disassembler with corresponding tests. Review URL: https://codereview.chromium.org/1147493002 Cr-Commit-Position: refs/heads/master@{#28472}
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- 14 May, 2015 2 commits
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paul.lind authored
Reason for revert: Simulator test failures in RunChangeFloat64ToInt.., RunChangeTaggedToInt32, div-mul-minus-one Original issue's description: > Implement assembler, disassembler tests for all instructions for mips32 > and mips64. Additionally, add missing single precision float instructions > for r2 and r6 architecture variants in assembler, simulator and disassembler > with corresponding tests. BUG= Review URL: https://codereview.chromium.org/1143473003 Cr-Commit-Position: refs/heads/master@{#28404}
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Djordje.Pesic authored
Implement assembler, disassembler tests for all instructions for mips32 and mips64. Additionally, add missing single precision float instructions for r2 and r6 architecture variants in assembler, simulator and disassembler with corresponding tests. Review URL: https://codereview.chromium.org/1119203003 Cr-Commit-Position: refs/heads/master@{#28402}
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- 30 Apr, 2015 1 commit
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Djordje.Pesic authored
Added rounding according to fcsr, CVT_W_D and RINT.D instruction in assembler, dissasembler and simulator and wrote appropiate tests. BUG= Review URL: https://codereview.chromium.org/1108583003 Cr-Commit-Position: refs/heads/master@{#28143}
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- 14 Apr, 2015 1 commit
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paul.lind authored
Port 5277c410. BUG= Review URL: https://codereview.chromium.org/1084723003 Cr-Commit-Position: refs/heads/master@{#27800}
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- 06 Apr, 2015 1 commit
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dusan.milosavljevic authored
- Fixed single float register type instruction en[de]coding in assembler and disassembler. - Added max and min instructions for r6 and corresponding tests. - Fixed selection instruction for boundary cases in simulator. - Update assembler tests to be more thorough wrt boundary cases. TEST=cctest/test-assembler-mips64/MIPS17, MIPS18 cctest/test-disasm-mips64/Type1 cctest/test-assembler-mips/MIPS16, MIPS17 cctest/test-disasm-mips/Type1 BUG= Review URL: https://codereview.chromium.org/1057323002 Cr-Commit-Position: refs/heads/master@{#27601}
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- 30 Mar, 2015 2 commits
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balazs.kilvady authored
Port 8dad78cd Original commit message: This adds the basics necessary to support float32 operations in TurboFan. The actual functionality required to detect safe float32 operations will be added based on this later. Therefore this does not affect production code except for some cleanup/refactoring. In detail, this patchset contains the following features: - Add support for float32 operations to arm, arm64, ia32 and x64 backends. - Add float32 machine operators. - Add support for float32 constants to simplified lowering. - Handle float32 representation for phis in simplified lowering. In addition, contains the following (related) cleanups: - Fix/unify naming of backend instructions. - Use AVX comparisons when available. - Extend ArchOpcodeField to 9 bits (required for arm64). - Refactor some code duplication in instruction selectors. BUG=v8:3589 LOG=n Review URL: https://codereview.chromium.org/1046953004 Cr-Commit-Position: refs/heads/master@{#27531}
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dusan.milosavljevic authored
TEST= BUG= Review URL: https://codereview.chromium.org/1046873004 Cr-Commit-Position: refs/heads/master@{#27530}
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- 04 Mar, 2015 1 commit
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thakis authored
Shouldn't make a difference in practice, but it's a bit more readable and it gets the case of a 0 shift correct without undefined behavior. BUG=463436 LOG=N Review URL: https://codereview.chromium.org/975283002 Cr-Commit-Position: refs/heads/master@{#26975}
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- 20 Jan, 2015 1 commit
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yangguo authored
This prevents clang from inlining and returning inconsistent results. R=bmeurer@chromium.org BUG=v8:3802 LOG=N Review URL: https://codereview.chromium.org/831393006 Cr-Commit-Position: refs/heads/master@{#26158}
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- 20 Dec, 2014 1 commit
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machenbach authored
Revert of Remove obsolete V8_INFINITY macro. (patchset #3 id:40001 of https://codereview.chromium.org/798413003/) Reason for revert: Speculative revert. This seems to block the current roll: https://codereview.chromium.org/819653003/ I retried several times, also with a new roll. The error is internal - but that doesn't make much of a difference. Original issue's description: > Remove obsolete V8_INFINITY macro. > > Use std::numeric_limits consistently. > > R=svenpanne@chromium.org > > Committed: https://crrev.com/31c66e2d53569c4e229d55483d28208491e73612 > Cr-Commit-Position: refs/heads/master@{#25897} TBR=svenpanne@chromium.org,bmeurer@chromium.org NOTREECHECKS=true NOTRY=true Review URL: https://codereview.chromium.org/813813003 Cr-Commit-Position: refs/heads/master@{#25912}
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- 19 Dec, 2014 1 commit
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bmeurer authored
Use std::numeric_limits consistently. R=svenpanne@chromium.org Review URL: https://codereview.chromium.org/798413003 Cr-Commit-Position: refs/heads/master@{#25897}
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- 08 Sep, 2014 1 commit
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bmeurer@chromium.org authored
R=svenpanne@chromium.org Review URL: https://codereview.chromium.org/553843002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23767 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 20 Aug, 2014 1 commit
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bmeurer@chromium.org authored
The bit counting functions provided by CompilerIntrinsics were undefined for zero, which was easily overlooked and unsafe in general. Also their implementation was kinda hacky and mostly untested. Fixed the implementation and moved the functions to base/bits.h. TEST=base-unittests,cctest,compiler-unittests,mjsunit R=hpayer@chromium.org Review URL: https://codereview.chromium.org/494633002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23229 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 13 Aug, 2014 1 commit
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dusan.milosavljevic@imgtec.com authored
TEST=mjsunit tests in debug BUG= R=paul.lind@imgtec.com Review URL: https://codereview.chromium.org/467203002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23109 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 12 Aug, 2014 1 commit
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dusan.milosavljevic@imgtec.com authored
Fixing gclient runhooks failure caused by reverted commit r23050. TEST= BUG= R=jkummerow@chromium.org, paul.lind@imgtec.com Review URL: https://codereview.chromium.org/467583002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23088 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 11 Aug, 2014 4 commits
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machenbach@chromium.org authored
This reverts commit r23050 for breaking runhooks on chromium. See e.g.: http://build.chromium.org/p/client.v8/builders/Chrome%20Linux%20Perf/builds/1438/steps/runhooks/logs/stdio TBR=jochen@chromium.org Review URL: https://codereview.chromium.org/458983003 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23053 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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dusan.milosavljevic@imgtec.com authored
Original commit r23028 breaks ARM64 build due to conflicting FP64 symbolic constant definition in src/globals.h and src/arm64/constants-arm64.h. TEST= BUG= R=jkummerow@chromium.org, paul.lind@imgtec.com Review URL: https://codereview.chromium.org/457313003 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23050 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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jochen@chromium.org authored
Breaks compilation of ARM64. | Additional summary: | - Introduce fp64 fpu mode into mips32 port required for r6. | - Implement runtime detections for fpu mode and arch. revision to preserve | compatibility with previous architecture revisions. | | TEST= | BUG= | R=jkummerow@chromium.org, paul.lind@imgtec.com | | Review URL: https://codereview.chromium.org/453043002 BUG=none LOG=n TBR=jkummerow@chromium.org Review URL: https://codereview.chromium.org/458193002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23030 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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dusan.milosavljevic@imgtec.com authored
Additional summary: - Introduce fp64 fpu mode into mips32 port required for r6. - Implement runtime detections for fpu mode and arch. revision to preserve compatibility with previous architecture revisions. TEST= BUG= R=jkummerow@chromium.org, paul.lind@imgtec.com Review URL: https://codereview.chromium.org/453043002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23028 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 04 Aug, 2014 1 commit
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bmeurer@chromium.org authored
This way we don't clash with the ASSERT* macros defined by GoogleTest, and we are one step closer to being able to replace our homegrown base/ with base/ from Chrome. R=jochen@chromium.org, svenpanne@chromium.org Review URL: https://codereview.chromium.org/430503007 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22812 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 31 Jul, 2014 1 commit
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danno@chromium.org authored
R=titzer@chromium.org Review URL: https://codereview.chromium.org/426833005 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22753 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 07 Jul, 2014 1 commit
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kilvadyb@homejinni.com authored
Port r22232 (f837b91) Original commit message: This is a mostly mechanical CL (more than 90% Emacs macros and query-replace-regexp) moving FILE*/StringStream*-based APIs to OStream-based APIs. There are a few places where this had to stop, otherwise the CL would be even bigger, but this can easily and incrementally cleaned up later. BUG= R=palfia@homejinni.com Review URL: https://codereview.chromium.org/373773002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22250 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 30 Jun, 2014 1 commit
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jochen@chromium.org authored
Also split v8-core independent methods from checks.h to base/logging.h and merge v8checks with the rest of checks. The CPU::FlushICache method is moved to CpuFeatures::FlushICache RoundUp and related methods are moved to base/macros.h Remove all layering violations from src/libplatform BUG=none R=jkummerow@chromium.org LOG=n Review URL: https://codereview.chromium.org/358363002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22092 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 20 Jun, 2014 1 commit
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mstarzinger@chromium.org authored
R=rossberg@chromium.org Review URL: https://codereview.chromium.org/333013002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21894 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 03 Jun, 2014 2 commits
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ishell@chromium.org authored
Fixed lint errors caused by "runtime/references" rule (Is this a non-const reference?) and the rule itself is restored. BUG=v8:3326 LOG=N R=jkummerow@chromium.org Review URL: https://codereview.chromium.org/314723002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21651 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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jochen@chromium.org authored
- this avoids using relative include paths which are forbidden by the style guide - makes the code more readable since it's clear which header is meant - allows for starting to use checkdeps BUG=none R=jkummerow@chromium.org, danno@chromium.org LOG=n Review URL: https://codereview.chromium.org/304153016 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21625 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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