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Commit c9879cfb authored by dusan.milosavljevic@imgtec.com's avatar dusan.milosavljevic@imgtec.com
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MIPS: Fix DCHECK failure in simulator for fp32 mode. 

TEST=mjsunit tests in debug
BUG=
R=paul.lind@imgtec.com

Review URL: https://codereview.chromium.org/467203002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23109 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
parent fdd094ab
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Showing with 4 additions and 4 deletions
src/mips/simulator-mips.cc
View file @ c9879cfb
......@@ -2290,7 +2290,7 @@ void Simulator::DecodeTypeRegister(Instruction* instr) {
}
set_fpu_register_word(fd_reg, result);
if (set_fcsr_round_error(fs, rounded)) {
set_fpu_register(fd_reg, kFPUInvalidResult);
set_fpu_register_word(fd_reg, kFPUInvalidResult);
}
}
break;
......@@ -2300,7 +2300,7 @@ void Simulator::DecodeTypeRegister(Instruction* instr) {
int32_t result = static_cast<int32_t>(rounded);
set_fpu_register_word(fd_reg, result);
if (set_fcsr_round_error(fs, rounded)) {
set_fpu_register(fd_reg, kFPUInvalidResult);
set_fpu_register_word(fd_reg, kFPUInvalidResult);
}
}
break;
......@@ -2310,7 +2310,7 @@ void Simulator::DecodeTypeRegister(Instruction* instr) {
int32_t result = static_cast<int32_t>(rounded);
set_fpu_register_word(fd_reg, result);
if (set_fcsr_round_error(fs, rounded)) {
set_fpu_register(fd_reg, kFPUInvalidResult);
set_fpu_register_word(fd_reg, kFPUInvalidResult);
}
}
break;
......@@ -2320,7 +2320,7 @@ void Simulator::DecodeTypeRegister(Instruction* instr) {
int32_t result = static_cast<int32_t>(rounded);
set_fpu_register_word(fd_reg, result);
if (set_fcsr_round_error(fs, rounded)) {
set_fpu_register(fd_reg, kFPUInvalidResult);
set_fpu_register_word(fd_reg, kFPUInvalidResult);
}
}
break;
......
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