1. 28 May, 2019 1 commit
  2. 27 May, 2019 1 commit
    • Clemens Hammacher's avatar
      [cleanup] Replace simple typedefs by using · a335f2ae
      Clemens Hammacher authored
      This replaces all typedefs that define types and not functions by the
      equivalent "using" declaration.
      
      This was done mostly automatically using this command:
      ag -l '\btypedef\b' src test | xargs -L1 \
           perl -i -p0e 's/typedef ([^*;{}]+) (\w+);/using \2 = \1;/sg'
      
      Patchset 2 then adds some manual changes for typedefs for pointer types,
      where the regular expression did not match.
      
      R=mstarzinger@chromium.org
      TBR=yangguo@chromium.org, jarin@chromium.org
      
      Bug: v8:9183
      Change-Id: I6f6ee28d1793b7ac34a58f980b94babc21874b78
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1631409
      Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
      Reviewed-by: 's avatarMichael Starzinger <mstarzinger@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#61849}
      a335f2ae
  3. 23 May, 2019 1 commit
  4. 06 Mar, 2019 1 commit
  5. 18 Feb, 2019 1 commit
  6. 09 Jan, 2019 1 commit
  7. 12 Nov, 2018 1 commit
  8. 26 Jul, 2018 1 commit
  9. 09 Feb, 2018 1 commit
  10. 02 Dec, 2017 1 commit
    • Mathias Bynens's avatar
      Normalize casing of hexadecimal digits · 822be9b2
      Mathias Bynens authored
      This patch normalizes the casing of hexadecimal digits in escape
      sequences of the form `\xNN` and integer literals of the form
      `0xNNNN`.
      
      Previously, the V8 code base used an inconsistent mixture of uppercase
      and lowercase.
      
      Google’s C++ style guide uses uppercase in its examples:
      https://google.github.io/styleguide/cppguide.html#Non-ASCII_Characters
      
      Moreover, uppercase letters more clearly stand out from the lowercase
      `x` (or `u`) characters at the start, as well as lowercase letters
      elsewhere in strings.
      
      BUG=v8:7109
      TBR=marja@chromium.org,titzer@chromium.org,mtrofin@chromium.org,mstarzinger@chromium.org,rossberg@chromium.org,yangguo@chromium.org,mlippautz@chromium.org
      NOPRESUBMIT=true
      
      Cq-Include-Trybots: master.tryserver.blink:linux_trusty_blink_rel;master.tryserver.chromium.linux:linux_chromium_rel_ng
      Change-Id: I790e21c25d96ad5d95c8229724eb45d2aa9e22d6
      Reviewed-on: https://chromium-review.googlesource.com/804294
      Commit-Queue: Mathias Bynens <mathias@chromium.org>
      Reviewed-by: 's avatarJakob Kummerow <jkummerow@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#49810}
      822be9b2
  11. 01 Dec, 2017 1 commit
  12. 10 Nov, 2017 1 commit
  13. 13 Sep, 2017 1 commit
  14. 03 Aug, 2017 2 commits
  15. 03 Jul, 2017 1 commit
  16. 12 May, 2017 1 commit
  17. 16 Jan, 2017 1 commit
  18. 15 Dec, 2016 1 commit
    • ivica.bogosavljevic's avatar
      MIPS[64]: Disable fusion multiple-accumulate instructions · ee7281f8
      ivica.bogosavljevic authored
      MIPS[64]R6 supports only fusion multiply-accumulate instructions, and using
      these causes failures of several tests that expect exact floating-point
      results. Therefore we disable fusion multiply-accumulate in both emitted and
      compiled code on R6.
      
      TEST=cctest/test-run-machops/RunFloat64MulAndFloat64Add1,mjsunit/es6/math-expm1.js
      mjsunit/es6/math-fround.js,mjsunit/compiler/multiply-add.js
      
      BUG=
      
      Review-Url: https://codereview.chromium.org/2569683002
      Cr-Commit-Position: refs/heads/master@{#41717}
      ee7281f8
  19. 25 Nov, 2016 1 commit
  20. 15 Nov, 2016 1 commit
  21. 11 Nov, 2016 1 commit
  22. 04 Nov, 2016 1 commit
    • ivica.bogosavljevic's avatar
      MIPS64: Port `ARM64: [turbofan] Avoid zero-extension after a 32-bit load` · 4125ba8b
      ivica.bogosavljevic authored
      Port f07d2cdd
      
      Original commit message:
      A load instruction will implicitely clear the top 32 bits when writing to a W
      register. This patch avoids generating a `mov` instruction to zero-extend the
      result in this case.
      
      For example, this occurs in the generated code for dispatching to the next
      bytecode in the interpreter:
      
        kind = BYTECODE_HANDLER
        name = LdaZero
        compiler = turbofan
        Instructions (size = 36)
        0x32e64c60     0  add x19, x19, #0x1 (1)
        0x32e64c64     4  ldrb w0, [x20, x19]
        0x32e64c68     8  mov w0, w0
                          ^^^^^^^^^^
        0x32e64c6c    12  lsl x0, x0, #3
        0x32e64c70    16  ldr x1, [x21, x0]
        0x32e64c74    20  movz x0, #0x0
        0x32e64c78    24  br x1
      
      Review-Url: https://codereview.chromium.org/2469253002
      Cr-Commit-Position: refs/heads/master@{#40758}
      4125ba8b
  23. 25 Oct, 2016 1 commit
  24. 18 Oct, 2016 1 commit
    • ivica.bogosavljevic's avatar
      MIPS64: Fix Word32Compare turbofan operator implementation when comparing... · 7499d92d
      ivica.bogosavljevic authored
      MIPS64: Fix Word32Compare turbofan operator implementation when comparing signed with unsigned operand
      
      MIPS64 doesn't support Word32 compare instructions. Instead it relies
      that the values in registers are correctly sign-extended and uses
      Word64 comparison instead. This behavior is correct in most cases,
      but doesn't work when comparing signed with unsigned operands.
      The solution proposed here tries to match a comparison of signed
      with unsigned operand, and perform Word32Compare simulation only
      in those cases. Unfortunately, the solution is not complete because
      it might skip cases where Word32 compare simulation is needed, so
      basically it is a hack.
      
      BUG=
      TEST=mjsunit/compiler/uint32
      
      Review-Url: https://codereview.chromium.org/2391393003
      Cr-Commit-Position: refs/heads/master@{#40398}
      7499d92d
  25. 22 Sep, 2016 1 commit
    • Ilija.Pavlovic's avatar
      MIPS: Port for (fused) multiply add/subtract. · 502b9aa7
      Ilija.Pavlovic authored
      Port for VisitFloat32Add, VisitFloat64Add, VisitFloat32Sub and
      VisitFloat64Sub in InstructionSelector.
      
      TEST=unittests/InstructionSelectorTest.Float32AddWithFloat32Mul,
           unittests/InstructionSelectorTest.Float64AddWithFloat64Mul,
           unittests/InstructionSelectorTest.Float32SubWithFloat32Mul,
           unittests/InstructionSelectorTest.Float64SubWithFloat64Mul
      BUG=
      
      Review-Url: https://codereview.chromium.org/2341303002
      Cr-Commit-Position: refs/heads/master@{#39616}
      502b9aa7
  26. 21 Sep, 2016 1 commit
  27. 23 Aug, 2016 1 commit
  28. 22 Jul, 2016 1 commit
    • bmeurer's avatar
      [turbofan] Change Float64Max/Float64Min to JavaScript semantics. · ba092fb0
      bmeurer authored
      So far we don't have a useful way to inline Math.max or Math.min in
      TurboFan optimized code. This adds new operators NumberMax and NumberMin
      and changes the Float64Max/Float64Min operators to have JavaScript
      semantics instead of the C++ semantics that it had previously.
      
      This also removes support for recognizing the tenary case in the
      CommonOperatorReducer, since that doesn't seem to have any positive
      impact (and actually doesn't show up in regular JavaScript, where
      people use Math.max/Math.min instead).
      
      Drive-by-fix: Also nuke the unused Float32Max/Float32Min operators.
      
      R=jarin@chromium.org
      
      Review-Url: https://codereview.chromium.org/2170343002
      Cr-Commit-Position: refs/heads/master@{#37971}
      ba092fb0
  29. 13 Jul, 2016 1 commit
  30. 18 Dec, 2015 1 commit
  31. 17 Dec, 2015 1 commit
  32. 11 Dec, 2015 1 commit
  33. 10 Dec, 2015 1 commit
    • jarin's avatar
      [turbofan] Make MachineType a pair of enums. · bb2a830d
      jarin authored
      MachineType is now a class with two enum fields:
      - MachineRepresentation
      - MachineSemantic
      
      Both enums are usable on their own, and this change switches some places from using MachineType to use just MachineRepresentation. Most notably:
      - register allocator now uses just the representation.
      - Phi and Select nodes only refer to representations.
      
      Review URL: https://codereview.chromium.org/1513543003
      
      Cr-Commit-Position: refs/heads/master@{#32738}
      bb2a830d
  34. 07 Dec, 2015 1 commit
  35. 04 Dec, 2015 1 commit
  36. 01 Dec, 2015 2 commits
  37. 20 Nov, 2015 1 commit
  38. 17 Nov, 2015 1 commit