1. 10 Jul, 2017 2 commits
  2. 05 Jul, 2017 1 commit
  3. 28 Jun, 2017 2 commits
  4. 20 Jun, 2017 1 commit
  5. 01 Jun, 2017 1 commit
  6. 31 May, 2017 1 commit
    • neis's avatar
      [compiler] Delay allocation of code-embedded heap numbers. · 659e8f7b
      neis authored
      Instead of allocating and embedding certain heap numbers into the code
      during code assembly, emit dummies but record the allocation requests.
      Later then, in Assembler::GetCode, allocate the heap numbers and patch
      the code by replacing the dummies with the actual objects. The
      RelocInfos for the embedded objects are already recorded correctly when
      emitting the dummies.
      
      R=jarin@chromium.org
      BUG=v8:6048
      
      Review-Url: https://codereview.chromium.org/2900683002
      Cr-Commit-Position: refs/heads/master@{#45635}
      659e8f7b
  7. 10 May, 2017 1 commit
  8. 28 Apr, 2017 1 commit
  9. 20 Apr, 2017 1 commit
  10. 12 Apr, 2017 1 commit
  11. 27 Mar, 2017 1 commit
  12. 17 Mar, 2017 1 commit
    • neis's avatar
      Disentangle assembler from isolate. · 94b088ca
      neis authored
      This is a first step towards moving Turbofan code generation off the main thread.
      
      Summary of the changes:
      - AssemblerBase no longer has a pointer to the isolate. Instead, its
        constructor receives the few things that it needs from the isolate (on most
        architectures this is just the serializer_enabled flag).
      - RelocInfo no longer has a pointer to the isolate. Instead, the functions
        that need it take it as an argument.  (There are currently still a few that
        implicitly access the isolate through a HeapObject.)
      - The MacroAssembler now explicitly holds a pointer to the isolate (before, it
        used to get it from the Assembler).
      - The jit_cookie also moved from AssemblerBase to the MacroAssemblers, since
        it's not used at all in the Assemblers.
      - A few architectures implemented parts of the Assembler with the help
        of a Codepatcher that is based on MacroAssembler.  Since the Assembler no
        longer has the isolate, but the MacroAssembler still needs it, this doesn't
        work anymore.  Instead, these Assemblers now use a new PatchingAssembler.
      
      BUG=v8:6048
      
      Review-Url: https://codereview.chromium.org/2732273003
      Cr-Commit-Position: refs/heads/master@{#43890}
      94b088ca
  13. 08 Mar, 2017 1 commit
  14. 07 Mar, 2017 1 commit
    • Clemens Hammacher's avatar
      [assembler] Make register definitions constexpr · e82b7ccd
      Clemens Hammacher authored
      I originally needed this for the initialization of a constexpr array in
      the wasm lazy compile builtin, but since it's a bigger change, I now
      split it off as this separate CL.
      The style guide recommends constexpr over const. I thus apply the
      constexprificaton over all headers that I touched anyway.
      
      I also remove the ARM64_DEFINE_REG_STATICS hack. It was introduced when
      merging in arm64 support more than three years ago, and I don't see the
      purpose for this.
      Also, some #defines can now be constexpr definitions, which was not
      possible before according to the comment.
      
      R=bmeurer@chromium.org, mstarzinger@chromium.org, ishell@chromium.org
      
      Change-Id: I6d743b4462c347d363f99e28007bc9e8c84ae617
      Reviewed-on: https://chromium-review.googlesource.com/451277Reviewed-by: 's avatarMichael Starzinger <mstarzinger@chromium.org>
      Reviewed-by: 's avatarIgor Sheludko <ishell@chromium.org>
      Reviewed-by: 's avatarBenedikt Meurer <bmeurer@chromium.org>
      Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#43637}
      e82b7ccd
  15. 21 Feb, 2017 1 commit
    • bbudge's avatar
      [V8] Implement SIMD Boolean vector types to allow mask registers. · 9fe0b4c7
      bbudge authored
      - Adds new machine types SimdBool4/8/16 for the different boolean vector types.
      - Adds a kSimdMaskRegisters flag for each platform. These are all false for now.
      - Removes Create, ExtractLane, ReplaceLane, Equal, NotEqual, Swizzle and Shuffle
        opcodes from the Boolean types. These are unlikely to be well supported natively,
        and can be synthesized using Select.
      - Changes the signature of Relational opcodes to return boolean vectors.
      - Changes the signature of Select opcodes to take boolean vectors.
      - Updates the ARM implementation of Relational and Select opcodes.
      
      LOG=N
      BUG=v8:4124
      
      Review-Url: https://codereview.chromium.org/2700813002
      Cr-Commit-Position: refs/heads/master@{#43348}
      9fe0b4c7
  16. 09 Feb, 2017 1 commit
  17. 07 Dec, 2016 1 commit
  18. 01 Dec, 2016 1 commit
    • dusan.simicic's avatar
      MIPS: Fix trampoline emission after switch table generation · d735f3ab
      dusan.simicic authored
      Trampolines are generated when the value of pc_offset is greater than
      next_buffer_check_ (attribute from Assembler class). This value
      shouldn't be incremented in bind_to() method when internal reference
      label is bound, because it is not decremented when the switch table is
      generated (dd() method from Assemler class).
      
      This patch fixes this problem. Regression test are also included for
      mips and mips64 arch.
      
      BUG=
      
      Review-Url: https://codereview.chromium.org/2530143002
      Cr-Commit-Position: refs/heads/master@{#41423}
      d735f3ab
  19. 25 Nov, 2016 1 commit
  20. 22 Nov, 2016 1 commit
  21. 14 Nov, 2016 1 commit
    • tebbi's avatar
      This CL enables precise source positions for all V8 compilers. It merges... · c3a6ca68
      tebbi authored
      This CL enables precise source positions for all V8 compilers. It merges compiler::SourcePosition and internal::SourcePosition to a single class used throughout the codebase. The new internal::SourcePosition instances store an id identifying an inlined function in addition to a script offset.
      SourcePosition::InliningId() refers to a the new table DeoptimizationInputData::InliningPositions(), which provides the following data for every inlining id:
       - The inlined SharedFunctionInfo as an offset into DeoptimizationInfo::LiteralArray
       - The SourcePosition of the inlining. Recursively, this yields the full inlining stack.
      Before the Code object is created, the same information can be found in CompilationInfo::inlined_functions().
      
      If SourcePosition::InliningId() is SourcePosition::kNotInlined, it refers to the outer (non-inlined) function.
      So every SourcePosition has full information about its inlining stack, as long as the corresponding Code object is known. The internal represenation of a source position is a positive 64bit integer.
      
      All compilers create now appropriate source positions for inlined functions. In the case of Turbofan, this required using AstGraphBuilderWithPositions for inlined functions too. So this class is now moved to a header file.
      
      At the moment, the additional information in source positions is only used in --trace-deopt and --code-comments. The profiler needs to be updated, at the moment it gets the correct script offsets from the deopt info, but the wrong script id from the reconstructed deopt stack, which can lead to wrong outputs. This should be resolved by making the profiler use the new inlining information for deopts.
      
      I activated the inlined deoptimization tests in test-cpu-profiler.cc for Turbofan, changing them to a case where the deopt stack and the inlining position agree. It is currently still broken for other cases.
      
      The following additional changes were necessary:
       - The source position table (internal::SourcePositionTableBuilder etc.) supports now 64bit source positions. Encoding source positions in a single 64bit int together with the difference encoding in the source position table results in very little overhead for the inlining id, since only 12% of the source positions in Octane have a changed inlining id.
       - The class HPositionInfo was effectively dead code and is now removed.
       - SourcePosition has new printing and information facilities, including computing a full inlining stack.
       - I had to rename compiler/source-position.{h,cc} to compiler/compiler-source-position-table.{h,cc} to avoid clashes with the new src/source-position.cc file.
       - I wrote the new wrapper PodArray for ByteArray. It is a template working with any POD-type. This is used in DeoptimizationInputData::InliningPositions().
       - I removed HInlinedFunctionInfo and HGraph::inlined_function_infos, because they were only used for the now obsolete Crankshaft inlining ids.
       - Crankshaft managed a list of inlined functions in Lithium: LChunk::inlined_functions. This is an analog structure to CompilationInfo::inlined_functions. So I removed LChunk::inlined_functions and made Crankshaft use CompilationInfo::inlined_functions instead, because this was necessary to register the offsets into the literal array in a uniform way. This is a safe change because LChunk::inlined_functions has no other uses and the functions in CompilationInfo::inlined_functions have a strictly longer lifespan, being created earlier (in Hydrogen already).
      
      BUG=v8:5432
      
      Review-Url: https://codereview.chromium.org/2451853002
      Cr-Commit-Position: refs/heads/master@{#40975}
      c3a6ca68
  22. 14 Sep, 2016 1 commit
  23. 18 Jul, 2016 1 commit
    • bmeurer's avatar
      [turbofan] Add support for eager/soft deoptimization reasons. · db635d5b
      bmeurer authored
      So far TurboFan wasn't adding the deoptimization reasons for eager/soft
      deoptimization exits that can be used by either the DevTools profiler or
      the --trace-deopt flag. This adds basic support for deopt reasons on
      Deoptimize, DeoptimizeIf and DeoptimizeUnless nodes and threads through
      the reasons to the code generation.
      
      Also moves the DeoptReason to it's own file (to resolve include cycles)
      and drops unused reasons.
      
      R=jarin@chromium.org
      
      Review-Url: https://codereview.chromium.org/2161543002
      Cr-Commit-Position: refs/heads/master@{#37823}
      db635d5b
  24. 30 Jun, 2016 1 commit
  25. 29 Jun, 2016 1 commit
  26. 27 Jun, 2016 3 commits
  27. 24 Jun, 2016 1 commit
  28. 13 May, 2016 1 commit
  29. 11 May, 2016 1 commit
    • mstarzinger's avatar
      [compiler] Pass inlining_id via relocation info. · 32049620
      mstarzinger authored
      This passes the inlining_id of deoptimization points via the relocation
      info instead of via a side-channel to the CPU profiler. This is one step
      towards deprecating the side-channel in question and avoid the need for
      performing a lookup of the return address of the deopt point.
      
      R=jarin@chromium.org
      
      Review-Url: https://codereview.chromium.org/1956693002
      Cr-Commit-Position: refs/heads/master@{#36177}
      32049620
  30. 09 May, 2016 1 commit
  31. 28 Apr, 2016 2 commits
  32. 19 Apr, 2016 1 commit
  33. 30 Mar, 2016 1 commit
    • Miran.Karic's avatar
      MIPS64: Replace JR/JALR with JIC/JIALC for r6. · a3f941ae
      Miran.Karic authored
      Port of changes that replace JR and JALR instructions with JIC and JIALC
      for mips64r6. Macroassembler Jump and Call functions now use JIC and
      JIALC if branch delay slot is not used. Code patching is adjusted to
      work with new changes. Jr and Jalr macroassembler functions are removed.
      Other changes where mips32r6 uses jr/jalr are not done because mips64r6
      uses j/jal instructions.
      
      BUG=
      
      Review URL: https://codereview.chromium.org/1830133002
      
      Cr-Commit-Position: refs/heads/master@{#35141}
      a3f941ae
  34. 10 Mar, 2016 1 commit
  35. 09 Mar, 2016 1 commit
    • alan.li's avatar
      MIPS: Fix '[wasm] add rotate opcodes' · 4ec5a1e3
      alan.li authored
      Port 9d0cf920
      
      Bug Descriptions:
      1. We are missing drotr32 instruction
      2. Ror Macro should also handle values less than zero or bigger than 31, as WASM instruction kExprI32Rol will generate shifting operands beyond [0 .. 31] range.
      3. Same as Dror.
      4. drotrv instruction in simulator is incorrect.
      
      BUG=
      TEST=cctest/test-run-wasm/Run_WasmInt32Binops,cctest/test-run-wasm/Run_WasmInt64Binops
      
      Review URL: https://codereview.chromium.org/1776623002
      
      Cr-Commit-Position: refs/heads/master@{#34632}
      4ec5a1e3