1. 13 May, 2020 1 commit
  2. 25 Mar, 2020 1 commit
    • Seth Brenith's avatar
      Revert "Move branch inversion on ==0 into platform-agnostic reducer" · 252acd7f
      Seth Brenith authored
      This reverts commit 0c72c719.
      
      Reason for revert: Wasm code size increase because not all pipelines use CommonOperatorReducer
      
      Original change's description:
      > Move branch inversion on ==0 into platform-agnostic reducer
      > 
      > This change is based on a discussion from
      > https://crrev.com/c/v8/v8/+/2053769/4/src/compiler/machine-operator-reducer.cc#1696
      > wherein Tobias suggested moving the folding away of ==0 operations out
      > of the platform-specific instruction selectors and into the
      > MachineOperatorReducer. I noticed that CommonOperatorReducer already
      > handles some very similar cases, so I have tried putting the ==0 folding
      > into CommonOperatorReducer instead. I'm happy to move it into
      > MachineOperatorReducer if that's better; I still don't have a very good
      > understanding of how roles are separated among reducers.
      > 
      > Change-Id: Ia0285bd9fafeef29d87cc88654bd6d355d467e8f
      > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2076498
      > Commit-Queue: Seth Brenith <seth.brenith@microsoft.com>
      > Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
      > Reviewed-by: Clemens Backes <clemensb@chromium.org>
      > Reviewed-by: Georg Neis <neis@chromium.org>
      > Cr-Commit-Position: refs/heads/master@{#66688}
      
      # Not skipping CQ checks because original CL landed > 1 day ago.
      
      Bug: chromium:1061767
      Change-Id: Id1fdfb38357eb514d92ed3be0a683f077202faa4
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2117789
      Commit-Queue: Seth Brenith <seth.brenith@microsoft.com>
      Reviewed-by: 's avatarGeorg Neis <neis@chromium.org>
      Reviewed-by: 's avatarTobias Tebbi <tebbi@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#66862}
      252acd7f
  3. 12 Mar, 2020 1 commit
  4. 07 Nov, 2019 1 commit
  5. 11 Oct, 2019 1 commit
  6. 07 Oct, 2019 1 commit
    • Joey Gouly's avatar
      [tests] Fix subobject-linkage error when building with GCC · 8ca191b6
      Joey Gouly authored
      Placing these tests in anonymous namespaces, is the suggested fix
      according to the GCC documentation.
      
      The GCC documentation states: "If a type A depends on a type B with no or
       internal linkage, defining it in multiple translation units would be an
      ODR violation because the meaning of B is different in each translation unit.
      If A only appears in a single translation unit, the best way to silence the
      warning is to give it internal linkage by putting it in an anonymous namespace as well."
      
      Change-Id: I69a1e9b5f1789e9a7a62c762cd499809a72e0ea5
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1836255
      Commit-Queue: Clemens Backes <clemensb@chromium.org>
      Reviewed-by: 's avatarClemens Backes <clemensb@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#64128}
      8ca191b6
  7. 16 Sep, 2019 1 commit
  8. 13 Sep, 2019 1 commit
  9. 10 Sep, 2019 1 commit
  10. 12 Aug, 2019 1 commit
  11. 23 Jul, 2019 1 commit
  12. 18 Jul, 2019 1 commit
    • Pierre Langlois's avatar
      [turbofan][arm64] Relax immediate offset conditions on stores with barriers. · 074fdf1f
      Pierre Langlois authored
      With a write barrier, stores with negative offsets would allocate a temporary
      register to hold the offset when the `str` instruction is able to encode it.
      
      For instance, when writing the object map:
      
      ```
      ;; This could be 'str x2, [x5, #-1]'
      movn x4, #0x0
      str x2, [x5, x4]
      and x16, x5, #0xfffffffffffc0000
      ldr x16, [x16, #8]
      tbnz w16, #2, #+0xba8  ; Jump out-of-line
      ```
      
      The reason behind this is that the out-of-line code uses an 'add' instruction on
      the offset to compute the field address, putting pressure on the instruction
      selector to make sure the immediate fits in both 'str' and 'add'.
      
      But, this is not necessary since the macro-assembler is able to turn the 'add'
      into a 'sub' or use a temporary register if needed.
      
      Change-Id: I8838e4b81a0c0c1f90aa3d67861a9da1a6dfed06
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1708471Reviewed-by: 's avatarRoss McIlroy <rmcilroy@chromium.org>
      Reviewed-by: 's avatarSigurd Schneider <sigurds@chromium.org>
      Commit-Queue: Pierre Langlois <pierre.langlois@arm.com>
      Cr-Commit-Position: refs/heads/master@{#62803}
      074fdf1f
  13. 08 Jul, 2019 1 commit
  14. 04 Jun, 2019 1 commit
  15. 27 May, 2019 1 commit
    • Clemens Hammacher's avatar
      [cleanup] Replace simple typedefs by using · a335f2ae
      Clemens Hammacher authored
      This replaces all typedefs that define types and not functions by the
      equivalent "using" declaration.
      
      This was done mostly automatically using this command:
      ag -l '\btypedef\b' src test | xargs -L1 \
           perl -i -p0e 's/typedef ([^*;{}]+) (\w+);/using \2 = \1;/sg'
      
      Patchset 2 then adds some manual changes for typedefs for pointer types,
      where the regular expression did not match.
      
      R=mstarzinger@chromium.org
      TBR=yangguo@chromium.org, jarin@chromium.org
      
      Bug: v8:9183
      Change-Id: I6f6ee28d1793b7ac34a58f980b94babc21874b78
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1631409
      Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
      Reviewed-by: 's avatarMichael Starzinger <mstarzinger@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#61849}
      a335f2ae
  16. 23 May, 2019 1 commit
  17. 20 May, 2019 1 commit
    • Joey Gouly's avatar
      [arm64] Avoid padding poke when unnecessary · 456e5687
      Joey Gouly authored
      This also fixes a bug in 'InitializeCallBuffer', where it wouldn't claim enough
      slots for each parameter. This caused the Simd128 instruction selector test to
      only claim 3 slots (rather than 4) and then perform an unnecessary padding poke.
      
      v8_Default_embedded_blob_size from the generated file gen/embedded.S
        Before: 4957056
         After: 4954368
      
      This gives a 0.05% size decrease.
      
      Change-Id: Ic9bb998fb8a9111fb90e1c3e537ea0f2a5fa7b33
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1617665Reviewed-by: 's avatarBenedikt Meurer <bmeurer@chromium.org>
      Commit-Queue: Martyn Capewell <martyn.capewell@arm.com>
      Cr-Commit-Position: refs/heads/master@{#61649}
      456e5687
  18. 14 May, 2019 1 commit
  19. 06 May, 2019 1 commit
  20. 08 Mar, 2019 1 commit
  21. 18 Feb, 2019 1 commit
  22. 12 Nov, 2018 1 commit
  23. 25 Oct, 2018 1 commit
  24. 24 Oct, 2018 1 commit
  25. 23 Oct, 2018 2 commits
  26. 11 Oct, 2018 1 commit
  27. 22 Aug, 2018 1 commit
  28. 13 Aug, 2018 1 commit
  29. 05 Jul, 2018 1 commit
  30. 04 Jul, 2018 1 commit
  31. 03 Jul, 2018 1 commit
  32. 20 Jun, 2018 1 commit
  33. 29 Jan, 2018 1 commit
  34. 04 Dec, 2017 1 commit
    • Pierre Langlois's avatar
      [arm64] Generate TBNZ for 32-bit '(x & (1 << N)) == (1 << N)' · 77021584
      Pierre Langlois authored
      Add support for matching '(x & mask) == mask' when mask has a single bit set,
      and translate this into a tbnz instruction. This patch only does this for 32-bit
      operations, we can port it to 64-bit operations as a follow-up if we find
      matches.
      
      This transformation mostly touches the snapshot where we get ~120 hits. This pattern can
      also show up in JavaScript when introduced by the EffectControlLinearizer pass.
      
      Bug: 
      Change-Id: Ib37c6e0bd3831b7c17709357b00ca53735621605
      Reviewed-on: https://chromium-review.googlesource.com/803272Reviewed-by: 's avatarBenedikt Meurer <bmeurer@chromium.org>
      Commit-Queue: Pierre Langlois <pierre.langlois@arm.com>
      Cr-Commit-Position: refs/heads/master@{#49822}
      77021584
  35. 02 Dec, 2017 1 commit
    • Mathias Bynens's avatar
      Normalize casing of hexadecimal digits · 822be9b2
      Mathias Bynens authored
      This patch normalizes the casing of hexadecimal digits in escape
      sequences of the form `\xNN` and integer literals of the form
      `0xNNNN`.
      
      Previously, the V8 code base used an inconsistent mixture of uppercase
      and lowercase.
      
      Google’s C++ style guide uses uppercase in its examples:
      https://google.github.io/styleguide/cppguide.html#Non-ASCII_Characters
      
      Moreover, uppercase letters more clearly stand out from the lowercase
      `x` (or `u`) characters at the start, as well as lowercase letters
      elsewhere in strings.
      
      BUG=v8:7109
      TBR=marja@chromium.org,titzer@chromium.org,mtrofin@chromium.org,mstarzinger@chromium.org,rossberg@chromium.org,yangguo@chromium.org,mlippautz@chromium.org
      NOPRESUBMIT=true
      
      Cq-Include-Trybots: master.tryserver.blink:linux_trusty_blink_rel;master.tryserver.chromium.linux:linux_chromium_rel_ng
      Change-Id: I790e21c25d96ad5d95c8229724eb45d2aa9e22d6
      Reviewed-on: https://chromium-review.googlesource.com/804294
      Commit-Queue: Mathias Bynens <mathias@chromium.org>
      Reviewed-by: 's avatarJakob Kummerow <jkummerow@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#49810}
      822be9b2
  36. 01 Dec, 2017 1 commit
  37. 18 Oct, 2017 1 commit
  38. 15 Mar, 2017 1 commit
  39. 08 Feb, 2017 1 commit
    • ahaas's avatar
      [arm64][turbofan] Fix add+shr for big shift values. · ed6e28d2
      ahaas authored
      Arm64 compiles "x +_64 (y >> shift)" into a single instruction if
      "shift" is a constant. The code generator expects that "shift" is a
      32 bit constant. however, TurboFan can also pass in a 64 bit constant,
      which caused a crash in the code generator.
      
      With this CL we cast the constant of TurboFan to an int in the
      instruction selector and thereby satisfy the assumption of the code
      generator. This should be correct since the code generator anyways cast
      the "shift" to an int5 or int6 eventually.
      
      R=v8-arm-ports@googlegroups.com
      BUG=v8:5923
      
      Review-Url: https://codereview.chromium.org/2669203005
      Cr-Commit-Position: refs/heads/master@{#43036}
      ed6e28d2