• Pierre Langlois's avatar
    [turbofan][arm64] Relax immediate offset conditions on stores with barriers. · 074fdf1f
    Pierre Langlois authored
    With a write barrier, stores with negative offsets would allocate a temporary
    register to hold the offset when the `str` instruction is able to encode it.
    
    For instance, when writing the object map:
    
    ```
    ;; This could be 'str x2, [x5, #-1]'
    movn x4, #0x0
    str x2, [x5, x4]
    and x16, x5, #0xfffffffffffc0000
    ldr x16, [x16, #8]
    tbnz w16, #2, #+0xba8  ; Jump out-of-line
    ```
    
    The reason behind this is that the out-of-line code uses an 'add' instruction on
    the offset to compute the field address, putting pressure on the instruction
    selector to make sure the immediate fits in both 'str' and 'add'.
    
    But, this is not necessary since the macro-assembler is able to turn the 'add'
    into a 'sub' or use a temporary register if needed.
    
    Change-Id: I8838e4b81a0c0c1f90aa3d67861a9da1a6dfed06
    Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1708471Reviewed-by: 's avatarRoss McIlroy <rmcilroy@chromium.org>
    Reviewed-by: 's avatarSigurd Schneider <sigurds@chromium.org>
    Commit-Queue: Pierre Langlois <pierre.langlois@arm.com>
    Cr-Commit-Position: refs/heads/master@{#62803}
    074fdf1f
instruction-selector-arm64-unittest.cc 181 KB