macro-assembler-ppc.cc 94.6 KB
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// Copyright 2014 the V8 project authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.

#include <assert.h>  // For assert
#include <limits.h>  // For LONG_MIN, LONG_MAX.

#if V8_TARGET_ARCH_PPC

#include "src/base/bits.h"
#include "src/base/division-by-constant.h"
#include "src/bootstrapper.h"
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#include "src/builtins/constants-table-builder.h"
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#include "src/callable.h"
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#include "src/code-factory.h"
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#include "src/code-stubs.h"
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#include "src/debug/debug.h"
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#include "src/external-reference-table.h"
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#include "src/frames-inl.h"
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#include "src/instruction-stream.h"
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#include "src/register-configuration.h"
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#include "src/runtime/runtime.h"
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#include "src/snapshot/serializer-common.h"
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#include "src/ppc/macro-assembler-ppc.h"

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namespace v8 {
namespace internal {

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MacroAssembler::MacroAssembler(Isolate* isolate, void* buffer, int size,
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                               CodeObjectRequired create_code_object)
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    : TurboAssembler(isolate, buffer, size, create_code_object) {
  if (create_code_object == CodeObjectRequired::kYes) {
    // Unlike TurboAssembler, which can be used off the main thread and may not
    // allocate, macro assembler creates its own copy of the self-reference
    // marker in order to disambiguate between self-references during nested
    // code generation (e.g.: codegen of the current object triggers stub
    // compilation through CodeStub::GetCode()).
    code_object_ = Handle<HeapObject>::New(
        *isolate->factory()->NewSelfReferenceMarker(), isolate);
  }
}
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TurboAssembler::TurboAssembler(Isolate* isolate, void* buffer, int buffer_size,
                               CodeObjectRequired create_code_object)
    : Assembler(isolate, buffer, buffer_size), isolate_(isolate) {
  if (create_code_object == CodeObjectRequired::kYes) {
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    code_object_ = Handle<HeapObject>::New(
        isolate->heap()->self_reference_marker(), isolate);
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  }
}

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int TurboAssembler::RequiredStackSizeForCallerSaved(SaveFPRegsMode fp_mode,
                                                    Register exclusion1,
                                                    Register exclusion2,
                                                    Register exclusion3) const {
  int bytes = 0;
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  RegList exclusions = 0;
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  if (exclusion1 != no_reg) {
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    exclusions |= exclusion1.bit();
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    if (exclusion2 != no_reg) {
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      exclusions |= exclusion2.bit();
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      if (exclusion3 != no_reg) {
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        exclusions |= exclusion3.bit();
      }
    }
  }

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  RegList list = kJSCallerSaved & ~exclusions;
  bytes += NumRegs(list) * kPointerSize;
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  if (fp_mode == kSaveFPRegs) {
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    bytes += kNumCallerSavedDoubles * kDoubleSize;
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  }
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  return bytes;
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}

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int TurboAssembler::PushCallerSaved(SaveFPRegsMode fp_mode, Register exclusion1,
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                                    Register exclusion2, Register exclusion3) {
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  int bytes = 0;
  RegList exclusions = 0;
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  if (exclusion1 != no_reg) {
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    exclusions |= exclusion1.bit();
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    if (exclusion2 != no_reg) {
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      exclusions |= exclusion2.bit();
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      if (exclusion3 != no_reg) {
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        exclusions |= exclusion3.bit();
      }
    }
  }

  RegList list = kJSCallerSaved & ~exclusions;
  MultiPush(list);
  bytes += NumRegs(list) * kPointerSize;

  if (fp_mode == kSaveFPRegs) {
    MultiPushDoubles(kCallerSavedDoubles);
    bytes += kNumCallerSavedDoubles * kDoubleSize;
  }

  return bytes;
}

int TurboAssembler::PopCallerSaved(SaveFPRegsMode fp_mode, Register exclusion1,
                                   Register exclusion2, Register exclusion3) {
  int bytes = 0;
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  if (fp_mode == kSaveFPRegs) {
    MultiPopDoubles(kCallerSavedDoubles);
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    bytes += kNumCallerSavedDoubles * kDoubleSize;
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  }

  RegList exclusions = 0;
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  if (exclusion1 != no_reg) {
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    exclusions |= exclusion1.bit();
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    if (exclusion2 != no_reg) {
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      exclusions |= exclusion2.bit();
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      if (exclusion3 != no_reg) {
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        exclusions |= exclusion3.bit();
      }
    }
  }

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  RegList list = kJSCallerSaved & ~exclusions;
  MultiPop(list);
  bytes += NumRegs(list) * kPointerSize;

  return bytes;
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}
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void TurboAssembler::Jump(Register target) {
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  mtctr(target);
  bctr();
}

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#ifdef V8_EMBEDDED_BUILTINS
void TurboAssembler::LookupConstant(Register destination,
                                    Handle<Object> object) {
  CHECK(isolate()->ShouldLoadConstantsFromRootList());
  CHECK(root_array_available_);

  // Ensure the given object is in the builtins constants table and fetch its
  // index.
  BuiltinsConstantsTableBuilder* builder =
      isolate()->builtins_constants_table_builder();
  uint32_t index = builder->AddObject(object);

  // TODO(jgruber): Load builtins from the builtins table.
  // TODO(jgruber): Ensure that code generation can recognize constant targets
  // in kArchCallCodeObject.

  DCHECK(isolate()->heap()->RootCanBeTreatedAsConstant(
      Heap::kBuiltinsConstantsTableRootIndex));

  const uint32_t offset =
      FixedArray::kHeaderSize + index * kPointerSize - kHeapObjectTag;

  CHECK(is_uint19(offset));
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  DCHECK_NE(destination, r0);
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  LoadRoot(destination, Heap::kBuiltinsConstantsTableRootIndex);
  LoadP(destination, MemOperand(destination, offset), r0);
}

void TurboAssembler::LookupExternalReference(Register destination,
                                             ExternalReference reference) {
  CHECK(reference.address() !=
        ExternalReference::roots_array_start(isolate()).address());
  CHECK(isolate()->ShouldLoadConstantsFromRootList());
  CHECK(root_array_available_);

  // Encode as an index into the external reference table stored on the isolate.

  ExternalReferenceEncoder encoder(isolate());
  ExternalReferenceEncoder::Value v = encoder.Encode(reference.address());
  CHECK(!v.is_from_api());
  uint32_t index = v.index();

  // Generate code to load from the external reference table.

  int32_t roots_to_external_reference_offset =
      Heap::roots_to_external_reference_table_offset() +
      ExternalReferenceTable::OffsetOfEntry(index);

  LoadP(destination,
        MemOperand(kRootRegister, roots_to_external_reference_offset), r0);
}
#endif  // V8_EMBEDDED_BUILTINS

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void MacroAssembler::JumpToJSEntry(Register target) {
  Move(ip, target);
  Jump(ip);
}

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void TurboAssembler::Jump(intptr_t target, RelocInfo::Mode rmode,
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                          Condition cond, CRegister cr) {
  Label skip;

  if (cond != al) b(NegateCondition(cond), &skip, cr);

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  DCHECK(rmode == RelocInfo::CODE_TARGET || rmode == RelocInfo::RUNTIME_ENTRY);
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  mov(ip, Operand(target, rmode));
  mtctr(ip);
  bctr();

  bind(&skip);
}

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void TurboAssembler::Jump(Address target, RelocInfo::Mode rmode, Condition cond,
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                          CRegister cr) {
  DCHECK(!RelocInfo::IsCodeTarget(rmode));
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  Jump(static_cast<intptr_t>(target), rmode, cond, cr);
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}

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void TurboAssembler::Jump(Handle<Code> code, RelocInfo::Mode rmode,
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                          Condition cond, CRegister cr) {
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  DCHECK(RelocInfo::IsCodeTarget(rmode));
  // 'code' is always generated ppc code, never THUMB code
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#ifdef V8_EMBEDDED_BUILTINS
  if (root_array_available_ && isolate()->ShouldLoadConstantsFromRootList()) {
    Register scratch = ip;
    LookupConstant(scratch, code);
    addi(scratch, scratch, Operand(Code::kHeaderSize - kHeapObjectTag));
    Label skip;
    if (cond != al) b(NegateCondition(cond), &skip, cr);
    Jump(scratch);
    bind(&skip);
    return;
  }
#endif  // V8_EMBEDDED_BUILTINS
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  Jump(static_cast<intptr_t>(code.address()), rmode, cond, cr);
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}

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int TurboAssembler::CallSize(Register target) { return 2 * kInstrSize; }
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void TurboAssembler::Call(Register target) {
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  BlockTrampolinePoolScope block_trampoline_pool(this);
  Label start;
  bind(&start);

  // branch via link register and set LK bit for return point
  mtctr(target);
  bctrl();

  DCHECK_EQ(CallSize(target), SizeOfCodeGeneratedSince(&start));
}

void MacroAssembler::CallJSEntry(Register target) {
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  CHECK(target == r5);
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  Call(target);
}

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int TurboAssembler::CallSize(Address target, RelocInfo::Mode rmode,
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                             Condition cond) {
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  Operand mov_operand = Operand(target, rmode);
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  return (2 + instructions_required_for_mov(ip, mov_operand)) * kInstrSize;
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}

int MacroAssembler::CallSizeNotPredictableCodeSize(Address target,
                                                   RelocInfo::Mode rmode,
                                                   Condition cond) {
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  return (2 + kMovInstructionsNoConstantPool) * kInstrSize;
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}

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void TurboAssembler::Call(Address target, RelocInfo::Mode rmode,
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                          Condition cond) {
  BlockTrampolinePoolScope block_trampoline_pool(this);
  DCHECK(cond == al);

#ifdef DEBUG
  // Check the expected size before generating code to ensure we assume the same
  // constant pool availability (e.g., whether constant pool is full or not).
  int expected_size = CallSize(target, rmode, cond);
  Label start;
  bind(&start);
#endif
  // This can likely be optimized to make use of bc() with 24bit relative
  //
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  // RecordRelocInfo(x.rmode_, x.immediate);
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  // bc( BA, .... offset, LKset);
  //

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  mov(ip, Operand(target, rmode));
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  mtctr(ip);
  bctrl();

  DCHECK_EQ(expected_size, SizeOfCodeGeneratedSince(&start));
}

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int TurboAssembler::CallSize(Handle<Code> code, RelocInfo::Mode rmode,
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                             Condition cond) {
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  return CallSize(code.address(), rmode, cond);
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}

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void TurboAssembler::Call(Handle<Code> code, RelocInfo::Mode rmode,
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                          Condition cond) {
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  BlockTrampolinePoolScope block_trampoline_pool(this);
  DCHECK(RelocInfo::IsCodeTarget(rmode));

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#ifdef V8_EMBEDDED_BUILTINS
  if (root_array_available_ && isolate()->ShouldLoadConstantsFromRootList()) {
    // Use ip directly instead of using UseScratchRegisterScope, as we do not
    // preserve scratch registers across calls.
    LookupConstant(ip, code);
    addi(ip, ip, Operand(Code::kHeaderSize - kHeapObjectTag));
    Label skip;
    if (cond != al) b(NegateCondition(cond), &skip);
    Call(ip);
    bind(&skip);
    return;
  }
#endif  // V8_EMBEDDED_BUILTINS
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  Call(code.address(), rmode, cond);
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}

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void TurboAssembler::Drop(int count) {
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  if (count > 0) {
    Add(sp, sp, count * kPointerSize, r0);
  }
}

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void TurboAssembler::Drop(Register count, Register scratch) {
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  ShiftLeftImm(scratch, count, Operand(kPointerSizeLog2));
  add(sp, sp, scratch);
}
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void TurboAssembler::Call(Label* target) { b(target, SetLK); }
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void TurboAssembler::Push(Handle<HeapObject> handle) {
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  mov(r0, Operand(handle));
  push(r0);
}

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void TurboAssembler::Push(Smi* smi) {
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  mov(r0, Operand(smi));
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  push(r0);
}
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void TurboAssembler::Move(Register dst, Handle<HeapObject> value) {
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#ifdef V8_EMBEDDED_BUILTINS
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  if (root_array_available_ && isolate()->ShouldLoadConstantsFromRootList()) {
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    Heap::RootListIndex root_index;
    if (!isolate()->heap()->IsRootHandle(value, &root_index)) {
      LookupConstant(dst, value);
    } else {
      LoadRoot(dst, root_index);
    }
    return;
  }
#endif  // V8_EMBEDDED_BUILTINS
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  mov(dst, Operand(value));
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}

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void TurboAssembler::Move(Register dst, ExternalReference reference) {
#ifdef V8_EMBEDDED_BUILTINS
  if (root_array_available_ && isolate()->ShouldLoadConstantsFromRootList() &&
      reference.address() !=
          ExternalReference::roots_array_start(isolate()).address()) {
    LookupExternalReference(dst, reference);
    return;
  }
#endif  // V8_EMBEDDED_BUILTINS
  mov(dst, Operand(reference));
}

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void TurboAssembler::Move(Register dst, Register src, Condition cond) {
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  DCHECK(cond == al);
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  if (dst != src) {
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    mr(dst, src);
  }
}

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void TurboAssembler::Move(DoubleRegister dst, DoubleRegister src) {
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  if (dst != src) {
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    fmr(dst, src);
  }
}

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void TurboAssembler::MultiPush(RegList regs, Register location) {
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  int16_t num_to_push = base::bits::CountPopulation(regs);
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  int16_t stack_offset = num_to_push * kPointerSize;

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  subi(location, location, Operand(stack_offset));
  for (int16_t i = Register::kNumRegisters - 1; i >= 0; i--) {
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    if ((regs & (1 << i)) != 0) {
      stack_offset -= kPointerSize;
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      StoreP(ToRegister(i), MemOperand(location, stack_offset));
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    }
  }
}

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void TurboAssembler::MultiPop(RegList regs, Register location) {
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  int16_t stack_offset = 0;

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  for (int16_t i = 0; i < Register::kNumRegisters; i++) {
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    if ((regs & (1 << i)) != 0) {
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      LoadP(ToRegister(i), MemOperand(location, stack_offset));
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      stack_offset += kPointerSize;
    }
  }
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  addi(location, location, Operand(stack_offset));
}

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void TurboAssembler::MultiPushDoubles(RegList dregs, Register location) {
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  int16_t num_to_push = base::bits::CountPopulation(dregs);
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  int16_t stack_offset = num_to_push * kDoubleSize;

  subi(location, location, Operand(stack_offset));
  for (int16_t i = DoubleRegister::kNumRegisters - 1; i >= 0; i--) {
    if ((dregs & (1 << i)) != 0) {
      DoubleRegister dreg = DoubleRegister::from_code(i);
      stack_offset -= kDoubleSize;
      stfd(dreg, MemOperand(location, stack_offset));
    }
  }
}

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void TurboAssembler::MultiPopDoubles(RegList dregs, Register location) {
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  int16_t stack_offset = 0;

  for (int16_t i = 0; i < DoubleRegister::kNumRegisters; i++) {
    if ((dregs & (1 << i)) != 0) {
      DoubleRegister dreg = DoubleRegister::from_code(i);
      lfd(dreg, MemOperand(location, stack_offset));
      stack_offset += kDoubleSize;
    }
  }
  addi(location, location, Operand(stack_offset));
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}

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void TurboAssembler::LoadRoot(Register destination, Heap::RootListIndex index,
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                              Condition cond) {
  DCHECK(cond == al);
  LoadP(destination, MemOperand(kRootRegister, index << kPointerSizeLog2), r0);
}

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void MacroAssembler::RecordWriteField(Register object, int offset,
                                      Register value, Register dst,
                                      LinkRegisterStatus lr_status,
                                      SaveFPRegsMode save_fp,
                                      RememberedSetAction remembered_set_action,
                                      SmiCheck smi_check) {
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  // First, check if a write barrier is even needed. The tests below
  // catch stores of Smis.
  Label done;

  // Skip barrier if writing a smi.
  if (smi_check == INLINE_SMI_CHECK) {
    JumpIfSmi(value, &done);
  }

  // Although the object register is tagged, the offset is relative to the start
  // of the object, so so offset must be a multiple of kPointerSize.
  DCHECK(IsAligned(offset, kPointerSize));

  Add(dst, object, offset - kHeapObjectTag, r0);
  if (emit_debug_code()) {
    Label ok;
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    andi(r0, dst, Operand(kPointerSize - 1));
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    beq(&ok, cr0);
    stop("Unaligned cell in write barrier");
    bind(&ok);
  }

  RecordWrite(object, dst, value, lr_status, save_fp, remembered_set_action,
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              OMIT_SMI_CHECK);
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  bind(&done);

  // Clobber clobbered input registers when running with the debug-code flag
  // turned on to provoke errors.
  if (emit_debug_code()) {
    mov(value, Operand(bit_cast<intptr_t>(kZapValue + 4)));
    mov(dst, Operand(bit_cast<intptr_t>(kZapValue + 8)));
  }
}

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void TurboAssembler::SaveRegisters(RegList registers) {
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  DCHECK_GT(NumRegs(registers), 0);
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  RegList regs = 0;
  for (int i = 0; i < Register::kNumRegisters; ++i) {
    if ((registers >> i) & 1u) {
      regs |= Register::from_code(i).bit();
    }
  }

  MultiPush(regs);
}

void TurboAssembler::RestoreRegisters(RegList registers) {
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  DCHECK_GT(NumRegs(registers), 0);
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  RegList regs = 0;
  for (int i = 0; i < Register::kNumRegisters; ++i) {
    if ((registers >> i) & 1u) {
      regs |= Register::from_code(i).bit();
    }
  }
  MultiPop(regs);
}

void TurboAssembler::CallRecordWriteStub(
    Register object, Register address,
    RememberedSetAction remembered_set_action, SaveFPRegsMode fp_mode) {
  // TODO(albertnetymk): For now we ignore remembered_set_action and fp_mode,
  // i.e. always emit remember set and save FP registers in RecordWriteStub. If
  // large performance regression is observed, we should use these values to
  // avoid unnecessary work.

  Callable const callable =
      Builtins::CallableFor(isolate(), Builtins::kRecordWrite);
  RegList registers = callable.descriptor().allocatable_registers();

  SaveRegisters(registers);

  Register object_parameter(callable.descriptor().GetRegisterParameter(
      RecordWriteDescriptor::kObject));
  Register slot_parameter(
      callable.descriptor().GetRegisterParameter(RecordWriteDescriptor::kSlot));
  Register isolate_parameter(callable.descriptor().GetRegisterParameter(
      RecordWriteDescriptor::kIsolate));
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  Register remembered_set_parameter(callable.descriptor().GetRegisterParameter(
      RecordWriteDescriptor::kRememberedSet));
  Register fp_mode_parameter(callable.descriptor().GetRegisterParameter(
      RecordWriteDescriptor::kFPMode));
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  push(object);
  push(address);

  pop(slot_parameter);
  pop(object_parameter);

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  Move(isolate_parameter, ExternalReference::isolate_address(isolate()));
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  Move(remembered_set_parameter, Smi::FromEnum(remembered_set_action));
  Move(fp_mode_parameter, Smi::FromEnum(fp_mode));
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  Call(callable.code(), RelocInfo::CODE_TARGET);

  RestoreRegisters(registers);
}
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// Will clobber 4 registers: object, address, scratch, ip.  The
// register 'object' contains a heap object pointer.  The heap object
// tag is shifted away.
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void MacroAssembler::RecordWrite(Register object, Register address,
                                 Register value, LinkRegisterStatus lr_status,
                                 SaveFPRegsMode fp_mode,
                                 RememberedSetAction remembered_set_action,
                                 SmiCheck smi_check) {
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  DCHECK(object != value);
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  if (emit_debug_code()) {
    LoadP(r0, MemOperand(address));
    cmp(r0, value);
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    Check(eq, AbortReason::kWrongAddressOrValuePassedToRecordWrite);
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  }

  if (remembered_set_action == OMIT_REMEMBERED_SET &&
      !FLAG_incremental_marking) {
    return;
  }

  // First, check if a write barrier is even needed. The tests below
  // catch stores of smis and stores into the young generation.
  Label done;

  if (smi_check == INLINE_SMI_CHECK) {
    JumpIfSmi(value, &done);
  }

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  CheckPageFlag(value,
                value,  // Used as scratch.
                MemoryChunk::kPointersToHereAreInterestingMask, eq, &done);
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  CheckPageFlag(object,
                value,  // Used as scratch.
                MemoryChunk::kPointersFromHereAreInterestingMask, eq, &done);

  // Record the actual write.
  if (lr_status == kLRHasNotBeenSaved) {
    mflr(r0);
    push(r0);
  }
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  CallRecordWriteStub(object, address, remembered_set_action, fp_mode);
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  if (lr_status == kLRHasNotBeenSaved) {
    pop(r0);
    mtlr(r0);
  }

  bind(&done);

  // Count number of write barriers in generated code.
  isolate()->counters()->write_barriers_static()->Increment();
  IncrementCounter(isolate()->counters()->write_barriers_dynamic(), 1, ip,
                   value);

  // Clobber clobbered registers when running with the debug-code flag
  // turned on to provoke errors.
  if (emit_debug_code()) {
    mov(address, Operand(bit_cast<intptr_t>(kZapValue + 12)));
    mov(value, Operand(bit_cast<intptr_t>(kZapValue + 16)));
  }
}

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void TurboAssembler::PushCommonFrame(Register marker_reg) {
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  int fp_delta = 0;
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  mflr(r0);
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  if (FLAG_enable_embedded_constant_pool) {
    if (marker_reg.is_valid()) {
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      Push(r0, fp, kConstantPoolRegister, marker_reg);
      fp_delta = 2;
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    } else {
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      Push(r0, fp, kConstantPoolRegister);
      fp_delta = 1;
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    }
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  } else {
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    if (marker_reg.is_valid()) {
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      Push(r0, fp, marker_reg);
      fp_delta = 1;
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    } else {
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      Push(r0, fp);
      fp_delta = 0;
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    }
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  }
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  addi(fp, sp, Operand(fp_delta * kPointerSize));
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}

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void TurboAssembler::PushStandardFrame(Register function_reg) {
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  int fp_delta = 0;
  mflr(r0);
  if (FLAG_enable_embedded_constant_pool) {
    if (function_reg.is_valid()) {
      Push(r0, fp, kConstantPoolRegister, cp, function_reg);
      fp_delta = 3;
    } else {
      Push(r0, fp, kConstantPoolRegister, cp);
      fp_delta = 2;
    }
  } else {
    if (function_reg.is_valid()) {
      Push(r0, fp, cp, function_reg);
      fp_delta = 2;
    } else {
      Push(r0, fp, cp);
      fp_delta = 1;
    }
  }
  addi(fp, sp, Operand(fp_delta * kPointerSize));
}

647
void TurboAssembler::RestoreFrameStateForTailCall() {
648 649 650 651 652 653 654 655 656
  if (FLAG_enable_embedded_constant_pool) {
    LoadP(kConstantPoolRegister,
          MemOperand(fp, StandardFrameConstants::kConstantPoolOffset));
    set_constant_pool_available(false);
  }
  LoadP(r0, MemOperand(fp, StandardFrameConstants::kCallerPCOffset));
  LoadP(fp, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
  mtlr(r0);
}
657 658 659 660 661 662

// Push and pop all registers that can hold pointers.
void MacroAssembler::PushSafepointRegisters() {
  // Safepoints expect a block of kNumSafepointRegisters values on the
  // stack, so adjust the stack for unsaved registers.
  const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters;
663
  DCHECK_GE(num_unsaved, 0);
664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696
  if (num_unsaved > 0) {
    subi(sp, sp, Operand(num_unsaved * kPointerSize));
  }
  MultiPush(kSafepointSavedRegisters);
}


void MacroAssembler::PopSafepointRegisters() {
  const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters;
  MultiPop(kSafepointSavedRegisters);
  if (num_unsaved > 0) {
    addi(sp, sp, Operand(num_unsaved * kPointerSize));
  }
}

int MacroAssembler::SafepointRegisterStackIndex(int reg_code) {
  // The registers are pushed starting with the highest encoding,
  // which means that lowest encodings are closest to the stack pointer.
  RegList regs = kSafepointSavedRegisters;
  int index = 0;

  DCHECK(reg_code >= 0 && reg_code < kNumRegisters);

  for (int16_t i = 0; i < reg_code; i++) {
    if ((regs & (1 << i)) != 0) {
      index++;
    }
  }

  return index;
}


697
void TurboAssembler::CanonicalizeNaN(const DoubleRegister dst,
698
                                     const DoubleRegister src) {
699
  // Turn potential sNaN into qNaN.
700
  fsub(dst, src, kDoubleRegZero);
701 702
}

703
void TurboAssembler::ConvertIntToDouble(Register src, DoubleRegister dst) {
704 705
  MovIntToDouble(dst, src, r0);
  fcfid(dst, dst);
706 707
}

708
void TurboAssembler::ConvertUnsignedIntToDouble(Register src,
709 710 711
                                                DoubleRegister dst) {
  MovUnsignedIntToDouble(dst, src, r0);
  fcfid(dst, dst);
712 713
}

714
void TurboAssembler::ConvertIntToFloat(Register src, DoubleRegister dst) {
715
  MovIntToDouble(dst, src, r0);
716
  fcfids(dst, dst);
717 718
}

719
void TurboAssembler::ConvertUnsignedIntToFloat(Register src,
720 721 722 723
                                               DoubleRegister dst) {
  MovUnsignedIntToDouble(dst, src, r0);
  fcfids(dst, dst);
}
724

725
#if V8_TARGET_ARCH_PPC64
726
void TurboAssembler::ConvertInt64ToDouble(Register src,
727 728 729 730
                                          DoubleRegister double_dst) {
  MovInt64ToDouble(double_dst, src);
  fcfid(double_dst, double_dst);
}
731

732
void TurboAssembler::ConvertUnsignedInt64ToFloat(Register src,
733 734 735 736 737
                                                 DoubleRegister double_dst) {
  MovInt64ToDouble(double_dst, src);
  fcfidus(double_dst, double_dst);
}

738
void TurboAssembler::ConvertUnsignedInt64ToDouble(Register src,
739 740 741 742 743
                                                  DoubleRegister double_dst) {
  MovInt64ToDouble(double_dst, src);
  fcfidu(double_dst, double_dst);
}

744
void TurboAssembler::ConvertInt64ToFloat(Register src,
745 746 747 748
                                         DoubleRegister double_dst) {
  MovInt64ToDouble(double_dst, src);
  fcfids(double_dst, double_dst);
}
749 750
#endif

751
void TurboAssembler::ConvertDoubleToInt64(const DoubleRegister double_input,
752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772
#if !V8_TARGET_ARCH_PPC64
                                          const Register dst_hi,
#endif
                                          const Register dst,
                                          const DoubleRegister double_dst,
                                          FPRoundingMode rounding_mode) {
  if (rounding_mode == kRoundToZero) {
    fctidz(double_dst, double_input);
  } else {
    SetRoundingMode(rounding_mode);
    fctid(double_dst, double_input);
    ResetRoundingMode();
  }

  MovDoubleToInt64(
#if !V8_TARGET_ARCH_PPC64
      dst_hi,
#endif
      dst, double_dst);
}

773
#if V8_TARGET_ARCH_PPC64
774
void TurboAssembler::ConvertDoubleToUnsignedInt64(
775 776 777 778 779 780 781 782 783 784 785 786 787 788
    const DoubleRegister double_input, const Register dst,
    const DoubleRegister double_dst, FPRoundingMode rounding_mode) {
  if (rounding_mode == kRoundToZero) {
    fctiduz(double_dst, double_input);
  } else {
    SetRoundingMode(rounding_mode);
    fctidu(double_dst, double_input);
    ResetRoundingMode();
  }

  MovDoubleToInt64(dst, double_dst);
}
#endif

789
#if !V8_TARGET_ARCH_PPC64
790
void TurboAssembler::ShiftLeftPair(Register dst_low, Register dst_high,
791 792
                                   Register src_low, Register src_high,
                                   Register scratch, Register shift) {
793 794 795
  DCHECK(!AreAliased(dst_low, src_high));
  DCHECK(!AreAliased(dst_high, src_low));
  DCHECK(!AreAliased(dst_low, dst_high, shift));
796 797 798 799 800
  Label less_than_32;
  Label done;
  cmpi(shift, Operand(32));
  blt(&less_than_32);
  // If shift >= 32
801
  andi(scratch, shift, Operand(0x1F));
802 803 804 805 806 807 808 809 810 811 812 813 814
  slw(dst_high, src_low, scratch);
  li(dst_low, Operand::Zero());
  b(&done);
  bind(&less_than_32);
  // If shift < 32
  subfic(scratch, shift, Operand(32));
  slw(dst_high, src_high, shift);
  srw(scratch, src_low, scratch);
  orx(dst_high, dst_high, scratch);
  slw(dst_low, src_low, shift);
  bind(&done);
}

815
void TurboAssembler::ShiftLeftPair(Register dst_low, Register dst_high,
816 817 818 819
                                   Register src_low, Register src_high,
                                   uint32_t shift) {
  DCHECK(!AreAliased(dst_low, src_high));
  DCHECK(!AreAliased(dst_high, src_low));
820 821 822 823
  if (shift == 32) {
    Move(dst_high, src_low);
    li(dst_low, Operand::Zero());
  } else if (shift > 32) {
824
    shift &= 0x1F;
825 826 827 828 829 830 831 832 833 834 835
    slwi(dst_high, src_low, Operand(shift));
    li(dst_low, Operand::Zero());
  } else if (shift == 0) {
    Move(dst_low, src_low);
    Move(dst_high, src_high);
  } else {
    slwi(dst_high, src_high, Operand(shift));
    rlwimi(dst_high, src_low, shift, 32 - shift, 31);
    slwi(dst_low, src_low, Operand(shift));
  }
}
836

837
void TurboAssembler::ShiftRightPair(Register dst_low, Register dst_high,
838 839
                                    Register src_low, Register src_high,
                                    Register scratch, Register shift) {
840 841 842
  DCHECK(!AreAliased(dst_low, src_high));
  DCHECK(!AreAliased(dst_high, src_low));
  DCHECK(!AreAliased(dst_low, dst_high, shift));
843 844 845 846 847
  Label less_than_32;
  Label done;
  cmpi(shift, Operand(32));
  blt(&less_than_32);
  // If shift >= 32
848
  andi(scratch, shift, Operand(0x1F));
849 850 851 852 853 854 855 856 857 858 859 860 861
  srw(dst_low, src_high, scratch);
  li(dst_high, Operand::Zero());
  b(&done);
  bind(&less_than_32);
  // If shift < 32
  subfic(scratch, shift, Operand(32));
  srw(dst_low, src_low, shift);
  slw(scratch, src_high, scratch);
  orx(dst_low, dst_low, scratch);
  srw(dst_high, src_high, shift);
  bind(&done);
}

862
void TurboAssembler::ShiftRightPair(Register dst_low, Register dst_high,
863 864 865 866
                                    Register src_low, Register src_high,
                                    uint32_t shift) {
  DCHECK(!AreAliased(dst_low, src_high));
  DCHECK(!AreAliased(dst_high, src_low));
867 868 869 870
  if (shift == 32) {
    Move(dst_low, src_high);
    li(dst_high, Operand::Zero());
  } else if (shift > 32) {
871
    shift &= 0x1F;
872 873 874 875 876 877 878 879 880 881 882 883
    srwi(dst_low, src_high, Operand(shift));
    li(dst_high, Operand::Zero());
  } else if (shift == 0) {
    Move(dst_low, src_low);
    Move(dst_high, src_high);
  } else {
    srwi(dst_low, src_low, Operand(shift));
    rlwimi(dst_low, src_high, 32 - shift, 0, shift - 1);
    srwi(dst_high, src_high, Operand(shift));
  }
}

884
void TurboAssembler::ShiftRightAlgPair(Register dst_low, Register dst_high,
885 886 887 888 889 890 891 892 893
                                       Register src_low, Register src_high,
                                       Register scratch, Register shift) {
  DCHECK(!AreAliased(dst_low, src_high, shift));
  DCHECK(!AreAliased(dst_high, src_low, shift));
  Label less_than_32;
  Label done;
  cmpi(shift, Operand(32));
  blt(&less_than_32);
  // If shift >= 32
894
  andi(scratch, shift, Operand(0x1F));
895 896 897 898 899 900 901 902 903 904 905 906 907
  sraw(dst_low, src_high, scratch);
  srawi(dst_high, src_high, 31);
  b(&done);
  bind(&less_than_32);
  // If shift < 32
  subfic(scratch, shift, Operand(32));
  srw(dst_low, src_low, shift);
  slw(scratch, src_high, scratch);
  orx(dst_low, dst_low, scratch);
  sraw(dst_high, src_high, shift);
  bind(&done);
}

908
void TurboAssembler::ShiftRightAlgPair(Register dst_low, Register dst_high,
909 910 911 912
                                       Register src_low, Register src_high,
                                       uint32_t shift) {
  DCHECK(!AreAliased(dst_low, src_high));
  DCHECK(!AreAliased(dst_high, src_low));
913 914 915 916
  if (shift == 32) {
    Move(dst_low, src_high);
    srawi(dst_high, src_high, 31);
  } else if (shift > 32) {
917
    shift &= 0x1F;
918 919 920 921 922 923 924 925 926 927 928
    srawi(dst_low, src_high, shift);
    srawi(dst_high, src_high, 31);
  } else if (shift == 0) {
    Move(dst_low, src_low);
    Move(dst_high, src_high);
  } else {
    srwi(dst_low, src_low, Operand(shift));
    rlwimi(dst_low, src_high, 32 - shift, 0, shift - 1);
    srawi(dst_high, src_high, shift);
  }
}
929
#endif
930

931
void TurboAssembler::LoadConstantPoolPointerRegisterFromCodeTargetAddress(
932 933 934 935 936 937 938
    Register code_target_address) {
  lwz(kConstantPoolRegister,
      MemOperand(code_target_address,
                 Code::kConstantPoolOffset - Code::kHeaderSize));
  add(kConstantPoolRegister, kConstantPoolRegister, code_target_address);
}

939 940 941 942 943
void TurboAssembler::LoadPC(Register dst) {
  b(4, SetLK);
  mflr(dst);
}

944 945 946 947 948 949 950 951
void TurboAssembler::ComputeCodeStartAddress(Register dst) {
  Label current_pc;
  mov_label_addr(dst, &current_pc);

  bind(&current_pc);
  subi(dst, dst, Operand(pc_offset()));
}

952
void TurboAssembler::LoadConstantPoolPointerRegister() {
953
  LoadPC(kConstantPoolRegister);
954
  int32_t delta = -pc_offset() + 4;
955
  add_label_offset(kConstantPoolRegister, kConstantPoolRegister,
956
                   ConstantPoolPosition(), delta);
957 958
}

959
void TurboAssembler::StubPrologue(StackFrame::Type type) {
960 961
  {
    ConstantPoolUnavailableScope constant_pool_unavailable(this);
962
    mov(r11, Operand(StackFrame::TypeToMarker(type)));
963 964
    PushCommonFrame(r11);
  }
965
  if (FLAG_enable_embedded_constant_pool) {
966
    LoadConstantPoolPointerRegister();
967 968
    set_constant_pool_available(true);
  }
969 970
}

971
void TurboAssembler::Prologue() {
972
  PushStandardFrame(r4);
973
  if (FLAG_enable_embedded_constant_pool) {
974
    // base contains prologue address
975
    LoadConstantPoolPointerRegister();
976 977
    set_constant_pool_available(true);
  }
978 979
}

980
void TurboAssembler::EnterFrame(StackFrame::Type type,
981
                                bool load_constant_pool_pointer_reg) {
982
  if (FLAG_enable_embedded_constant_pool && load_constant_pool_pointer_reg) {
983 984 985
    // Push type explicitly so we can leverage the constant pool.
    // This path cannot rely on ip containing code entry.
    PushCommonFrame();
986
    LoadConstantPoolPointerRegister();
987
    mov(ip, Operand(StackFrame::TypeToMarker(type)));
988 989
    push(ip);
  } else {
990
    mov(ip, Operand(StackFrame::TypeToMarker(type)));
991 992 993
    PushCommonFrame(ip);
  }
  if (type == StackFrame::INTERNAL) {
994 995
    Move(ip, CodeObject());
    push(ip);
996
  }
997 998
}

999
int TurboAssembler::LeaveFrame(StackFrame::Type type, int stack_adjustment) {
1000
  ConstantPoolUnavailableScope constant_pool_unavailable(this);
1001 1002 1003 1004 1005
  // r3: preserved
  // r4: preserved
  // r5: preserved

  // Drop the execution stack down to the frame pointer and restore
1006
  // the caller's state.
1007 1008 1009
  int frame_ends;
  LoadP(r0, MemOperand(fp, StandardFrameConstants::kCallerPCOffset));
  LoadP(ip, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
1010
  if (FLAG_enable_embedded_constant_pool) {
1011 1012
    LoadP(kConstantPoolRegister,
          MemOperand(fp, StandardFrameConstants::kConstantPoolOffset));
1013
  }
1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036
  mtlr(r0);
  frame_ends = pc_offset();
  Add(sp, fp, StandardFrameConstants::kCallerSPOffset + stack_adjustment, r0);
  mr(fp, ip);
  return frame_ends;
}

// ExitFrame layout (probably wrongish.. needs updating)
//
//  SP -> previousSP
//        LK reserved
//        code
//        sp_on_exit (for debug?)
// oldSP->prev SP
//        LK
//        <parameters on stack>

// Prior to calling EnterExitFrame, we've got a bunch of parameters
// on the stack that we need to wrap a real frame around.. so first
// we reserve a slot for LK and push the previous SP which is captured
// in the fp register (r31)
// Then - we buy a new frame

1037 1038 1039 1040
void MacroAssembler::EnterExitFrame(bool save_doubles, int stack_space,
                                    StackFrame::Type frame_type) {
  DCHECK(frame_type == StackFrame::EXIT ||
         frame_type == StackFrame::BUILTIN_EXIT);
1041 1042 1043 1044
  // Set up the frame structure on the stack.
  DCHECK_EQ(2 * kPointerSize, ExitFrameConstants::kCallerSPDisplacement);
  DCHECK_EQ(1 * kPointerSize, ExitFrameConstants::kCallerPCOffset);
  DCHECK_EQ(0 * kPointerSize, ExitFrameConstants::kCallerFPOffset);
1045
  DCHECK_GT(stack_space, 0);
1046 1047 1048 1049 1050

  // This is an opportunity to build a frame to wrap
  // all of the pushes that have happened inside of V8
  // since we were called from C code

1051
  mov(ip, Operand(StackFrame::TypeToMarker(frame_type)));
1052
  PushCommonFrame(ip);
1053
  // Reserve room for saved entry sp and code object.
1054
  subi(sp, fp, Operand(ExitFrameConstants::kFixedFrameSizeFromFp));
1055 1056 1057 1058 1059

  if (emit_debug_code()) {
    li(r8, Operand::Zero());
    StoreP(r8, MemOperand(fp, ExitFrameConstants::kSPOffset));
  }
1060 1061 1062 1063
  if (FLAG_enable_embedded_constant_pool) {
    StoreP(kConstantPoolRegister,
           MemOperand(fp, ExitFrameConstants::kConstantPoolOffset));
  }
1064
  Move(r8, CodeObject());
1065 1066 1067
  StoreP(r8, MemOperand(fp, ExitFrameConstants::kCodeOffset));

  // Save the frame pointer and the context in top.
1068 1069
  Move(r8, ExternalReference::Create(IsolateAddressId::kCEntryFPAddress,
                                     isolate()));
1070
  StoreP(fp, MemOperand(r8));
1071 1072
  Move(r8,
       ExternalReference::Create(IsolateAddressId::kContextAddress, isolate()));
1073 1074 1075 1076
  StoreP(cp, MemOperand(r8));

  // Optionally save all volatile double registers.
  if (save_doubles) {
1077
    MultiPushDoubles(kCallerSavedDoubles);
1078 1079
    // Note that d0 will be accessible at
    //   fp - ExitFrameConstants::kFrameSize -
1080
    //   kNumCallerSavedDoubles * kDoubleSize,
1081 1082 1083 1084 1085 1086 1087 1088 1089
    // since the sp slot and code slot were pushed after the fp.
  }

  addi(sp, sp, Operand(-stack_space * kPointerSize));

  // Allocate and align the frame preparing for calling the runtime
  // function.
  const int frame_alignment = ActivationFrameAlignment();
  if (frame_alignment > kPointerSize) {
1090
    DCHECK(base::bits::IsPowerOfTwo(frame_alignment));
1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101
    ClearRightImm(sp, sp, Operand(WhichPowerOf2(frame_alignment)));
  }
  li(r0, Operand::Zero());
  StorePU(r0, MemOperand(sp, -kNumRequiredStackFrameSlots * kPointerSize));

  // Set the exit frame sp value to point just before the return address
  // location.
  addi(r8, sp, Operand((kStackFrameExtraParamSlot + 1) * kPointerSize));
  StoreP(r8, MemOperand(fp, ExitFrameConstants::kSPOffset));
}

1102
int TurboAssembler::ActivationFrameAlignment() {
1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119
#if !defined(USE_SIMULATOR)
  // Running on the real platform. Use the alignment as mandated by the local
  // environment.
  // Note: This will break if we ever start generating snapshots on one PPC
  // platform for another PPC platform with a different alignment.
  return base::OS::ActivationFrameAlignment();
#else  // Simulated
  // If we are using the simulator then we should always align to the expected
  // alignment. As the simulator is used to generate snapshots we do not know
  // if the target platform will need alignment, so this is controlled from a
  // flag.
  return FLAG_sim_stack_alignment;
#endif
}


void MacroAssembler::LeaveExitFrame(bool save_doubles, Register argument_count,
1120
                                    bool argument_count_is_length) {
1121
  ConstantPoolUnavailableScope constant_pool_unavailable(this);
1122 1123 1124
  // Optionally restore all double registers.
  if (save_doubles) {
    // Calculate the stack location of the saved doubles and restore them.
1125
    const int kNumRegs = kNumCallerSavedDoubles;
1126
    const int offset =
1127
        (ExitFrameConstants::kFixedFrameSizeFromFp + kNumRegs * kDoubleSize);
1128
    addi(r6, fp, Operand(-offset));
1129
    MultiPopDoubles(kCallerSavedDoubles, r6);
1130 1131 1132 1133
  }

  // Clear top frame.
  li(r6, Operand::Zero());
1134 1135
  Move(ip, ExternalReference::Create(IsolateAddressId::kCEntryFPAddress,
                                     isolate()));
1136 1137 1138
  StoreP(r6, MemOperand(ip));

  // Restore current context from top and clear it in debug mode.
1139 1140
  Move(ip,
       ExternalReference::Create(IsolateAddressId::kContextAddress, isolate()));
1141 1142
  LoadP(cp, MemOperand(ip));

1143
#ifdef DEBUG
1144
  mov(r6, Operand(Context::kInvalidContext));
1145 1146
  Move(ip,
       ExternalReference::Create(IsolateAddressId::kContextAddress, isolate()));
1147 1148 1149 1150 1151 1152 1153
  StoreP(r6, MemOperand(ip));
#endif

  // Tear down the exit frame, pop the arguments, and return.
  LeaveFrame(StackFrame::EXIT);

  if (argument_count.is_valid()) {
1154 1155 1156
    if (!argument_count_is_length) {
      ShiftLeftImm(argument_count, argument_count, Operand(kPointerSizeLog2));
    }
1157 1158 1159 1160
    add(sp, sp, argument_count);
  }
}

1161
void TurboAssembler::MovFromFloatResult(const DoubleRegister dst) {
1162 1163 1164
  Move(dst, d1);
}

1165
void TurboAssembler::MovFromFloatParameter(const DoubleRegister dst) {
1166 1167 1168
  Move(dst, d1);
}

1169
void TurboAssembler::PrepareForTailCall(const ParameterCount& callee_args_count,
1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201
                                        Register caller_args_count_reg,
                                        Register scratch0, Register scratch1) {
#if DEBUG
  if (callee_args_count.is_reg()) {
    DCHECK(!AreAliased(callee_args_count.reg(), caller_args_count_reg, scratch0,
                       scratch1));
  } else {
    DCHECK(!AreAliased(caller_args_count_reg, scratch0, scratch1));
  }
#endif

  // Calculate the end of destination area where we will put the arguments
  // after we drop current frame. We add kPointerSize to count the receiver
  // argument which is not included into formal parameters count.
  Register dst_reg = scratch0;
  ShiftLeftImm(dst_reg, caller_args_count_reg, Operand(kPointerSizeLog2));
  add(dst_reg, fp, dst_reg);
  addi(dst_reg, dst_reg,
       Operand(StandardFrameConstants::kCallerSPOffset + kPointerSize));

  Register src_reg = caller_args_count_reg;
  // Calculate the end of source area. +kPointerSize is for the receiver.
  if (callee_args_count.is_reg()) {
    ShiftLeftImm(src_reg, callee_args_count.reg(), Operand(kPointerSizeLog2));
    add(src_reg, sp, src_reg);
    addi(src_reg, src_reg, Operand(kPointerSize));
  } else {
    Add(src_reg, sp, (callee_args_count.immediate() + 1) * kPointerSize, r0);
  }

  if (FLAG_debug_code) {
    cmpl(src_reg, dst_reg);
1202
    Check(lt, AbortReason::kStackAccessBelowStackPointer);
1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229
  }

  // Restore caller's frame pointer and return address now as they will be
  // overwritten by the copying loop.
  RestoreFrameStateForTailCall();

  // Now copy callee arguments to the caller frame going backwards to avoid
  // callee arguments corruption (source and destination areas could overlap).

  // Both src_reg and dst_reg are pointing to the word after the one to copy,
  // so they must be pre-decremented in the loop.
  Register tmp_reg = scratch1;
  Label loop;
  if (callee_args_count.is_reg()) {
    addi(tmp_reg, callee_args_count.reg(), Operand(1));  // +1 for receiver
  } else {
    mov(tmp_reg, Operand(callee_args_count.immediate() + 1));
  }
  mtctr(tmp_reg);
  bind(&loop);
  LoadPU(tmp_reg, MemOperand(src_reg, -kPointerSize));
  StorePU(tmp_reg, MemOperand(dst_reg, -kPointerSize));
  bdnz(&loop);

  // Leave current frame.
  mr(sp, dst_reg);
}
1230 1231

void MacroAssembler::InvokePrologue(const ParameterCount& expected,
1232
                                    const ParameterCount& actual, Label* done,
1233
                                    bool* definitely_mismatches,
1234
                                    InvokeFlag flag) {
1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249
  bool definitely_matches = false;
  *definitely_mismatches = false;
  Label regular_invoke;

  // Check whether the expected and actual arguments count match. If not,
  // setup registers according to contract with ArgumentsAdaptorTrampoline:
  //  r3: actual arguments count
  //  r4: function (passed through to callee)
  //  r5: expected arguments count

  // The code below is made a lot easier because the calling code already sets
  // up actual and expected registers according to the contract if values are
  // passed in registers.

  // ARM has some sanity checks as per below, considering add them for PPC
1250 1251
  //  DCHECK(actual.is_immediate() || actual.reg() == r3);
  //  DCHECK(expected.is_immediate() || expected.reg() == r5);
1252 1253 1254

  if (expected.is_immediate()) {
    DCHECK(actual.is_immediate());
1255
    mov(r3, Operand(actual.immediate()));
1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272
    if (expected.immediate() == actual.immediate()) {
      definitely_matches = true;
    } else {
      const int sentinel = SharedFunctionInfo::kDontAdaptArgumentsSentinel;
      if (expected.immediate() == sentinel) {
        // Don't worry about adapting arguments for builtins that
        // don't want that done. Skip adaption code by making it look
        // like we have a match between expected and actual number of
        // arguments.
        definitely_matches = true;
      } else {
        *definitely_mismatches = true;
        mov(r5, Operand(expected.immediate()));
      }
    }
  } else {
    if (actual.is_immediate()) {
1273
      mov(r3, Operand(actual.immediate()));
1274 1275 1276 1277 1278 1279 1280 1281 1282
      cmpi(expected.reg(), Operand(actual.immediate()));
      beq(&regular_invoke);
    } else {
      cmp(expected.reg(), actual.reg());
      beq(&regular_invoke);
    }
  }

  if (!definitely_matches) {
1283
    Handle<Code> adaptor = BUILTIN_CODE(isolate(), ArgumentsAdaptorTrampoline);
1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295
    if (flag == CALL_FUNCTION) {
      Call(adaptor);
      if (!*definitely_mismatches) {
        b(done);
      }
    } else {
      Jump(adaptor, RelocInfo::CODE_TARGET);
    }
    bind(&regular_invoke);
  }
}

1296 1297 1298
void MacroAssembler::CheckDebugHook(Register fun, Register new_target,
                                    const ParameterCount& expected,
                                    const ParameterCount& actual) {
1299
  Label skip_hook;
1300

1301
  ExternalReference debug_hook_active =
1302
      ExternalReference::debug_hook_on_function_call_address(isolate());
1303
  Move(r7, debug_hook_active);
1304 1305
  LoadByte(r7, MemOperand(r7), r0);
  extsb(r7, r7);
1306
  CmpSmiLiteral(r7, Smi::kZero, r0);
1307
  beq(&skip_hook);
1308

1309
  {
1310 1311 1312 1313 1314 1315 1316 1317
    // Load receiver to pass it later to DebugOnFunctionCall hook.
    if (actual.is_reg()) {
      mr(r7, actual.reg());
    } else {
      mov(r7, Operand(actual.immediate()));
    }
    ShiftLeftImm(r7, r7, Operand(kPointerSizeLog2));
    LoadPX(r7, MemOperand(sp, r7));
1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330
    FrameScope frame(this,
                     has_frame() ? StackFrame::NONE : StackFrame::INTERNAL);
    if (expected.is_reg()) {
      SmiTag(expected.reg());
      Push(expected.reg());
    }
    if (actual.is_reg()) {
      SmiTag(actual.reg());
      Push(actual.reg());
    }
    if (new_target.is_valid()) {
      Push(new_target);
    }
1331
    Push(fun, fun, r7);
1332
    CallRuntime(Runtime::kDebugOnFunctionCall);
1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345
    Pop(fun);
    if (new_target.is_valid()) {
      Pop(new_target);
    }
    if (actual.is_reg()) {
      Pop(actual.reg());
      SmiUntag(actual.reg());
    }
    if (expected.is_reg()) {
      Pop(expected.reg());
      SmiUntag(expected.reg());
    }
  }
1346
  bind(&skip_hook);
1347 1348 1349 1350 1351
}

void MacroAssembler::InvokeFunctionCode(Register function, Register new_target,
                                        const ParameterCount& expected,
                                        const ParameterCount& actual,
1352
                                        InvokeFlag flag) {
1353 1354
  // You can't call a function without a valid frame.
  DCHECK(flag == JUMP_FUNCTION || has_frame());
1355 1356
  DCHECK(function == r4);
  DCHECK_IMPLIES(new_target.is_valid(), new_target == r6);
1357

1358 1359
  // On function call, call into the debugger if necessary.
  CheckDebugHook(function, new_target, expected, actual);
1360 1361

  // Clear the new.target register if not given.
1362 1363 1364 1365
  if (!new_target.is_valid()) {
    LoadRoot(r6, Heap::kUndefinedValueRootIndex);
  }

1366 1367
  Label done;
  bool definitely_mismatches = false;
1368
  InvokePrologue(expected, actual, &done, &definitely_mismatches, flag);
1369
  if (!definitely_mismatches) {
1370 1371 1372
    // We call indirectly through the code field in the function to
    // allow recompilation to take effect without changing any of the
    // call sites.
1373
    Register code = kJavaScriptCallCodeStartRegister;
1374 1375
    LoadP(code, FieldMemOperand(function, JSFunction::kCodeOffset));
    addi(code, code, Operand(Code::kHeaderSize - kHeapObjectTag));
1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388
    if (flag == CALL_FUNCTION) {
      CallJSEntry(code);
    } else {
      DCHECK(flag == JUMP_FUNCTION);
      JumpToJSEntry(code);
    }

    // Continue here if InvokePrologue does handle the invocation due to
    // mismatched parameter counts.
    bind(&done);
  }
}

1389 1390
void MacroAssembler::InvokeFunction(Register fun, Register new_target,
                                    const ParameterCount& actual,
1391
                                    InvokeFlag flag) {
1392 1393 1394 1395
  // You can't call a function without a valid frame.
  DCHECK(flag == JUMP_FUNCTION || has_frame());

  // Contract with called JS functions requires that function is passed in r4.
1396
  DCHECK(fun == r4);
1397 1398

  Register expected_reg = r5;
1399
  Register temp_reg = r7;
1400

1401
  LoadP(temp_reg, FieldMemOperand(r4, JSFunction::kSharedFunctionInfoOffset));
1402 1403 1404
  LoadP(cp, FieldMemOperand(r4, JSFunction::kContextOffset));
  LoadWordArith(expected_reg,
                FieldMemOperand(
1405
                    temp_reg, SharedFunctionInfo::kFormalParameterCountOffset));
1406 1407

  ParameterCount expected(expected_reg);
1408
  InvokeFunctionCode(fun, new_target, expected, actual, flag);
1409 1410 1411 1412 1413
}

void MacroAssembler::InvokeFunction(Register function,
                                    const ParameterCount& expected,
                                    const ParameterCount& actual,
1414
                                    InvokeFlag flag) {
1415 1416 1417 1418
  // You can't call a function without a valid frame.
  DCHECK(flag == JUMP_FUNCTION || has_frame());

  // Contract with called JS functions requires that function is passed in r4.
1419
  DCHECK(function == r4);
1420 1421 1422 1423

  // Get the function and setup the context.
  LoadP(cp, FieldMemOperand(r4, JSFunction::kContextOffset));

1424
  InvokeFunctionCode(r4, no_reg, expected, actual, flag);
1425 1426
}

1427 1428 1429 1430
void MacroAssembler::MaybeDropFrames() {
  // Check whether we need to drop frames to restart a function on the stack.
  ExternalReference restart_fp =
      ExternalReference::debug_restart_fp_address(isolate());
1431
  Move(r4, restart_fp);
1432
  LoadP(r4, MemOperand(r4));
1433
  cmpi(r4, Operand::Zero());
1434
  Jump(BUILTIN_CODE(isolate(), FrameDropperTrampoline), RelocInfo::CODE_TARGET,
1435 1436
       ne);
}
1437

1438
void MacroAssembler::PushStackHandler() {
1439
  // Adjust this code if not the case.
1440
  STATIC_ASSERT(StackHandlerConstants::kSize == 2 * kPointerSize);
1441 1442
  STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0 * kPointerSize);

1443 1444
  Push(Smi::kZero);  // Padding.

1445
  // Link the current handler as the next handler.
1446
  // Preserve r3-r7.
1447 1448
  mov(r8, Operand(ExternalReference::Create(IsolateAddressId::kHandlerAddress,
                                            isolate())));
1449
  LoadP(r0, MemOperand(r8));
1450 1451
  push(r0);

1452 1453 1454 1455 1456
  // Set this new handler as the current one.
  StoreP(sp, MemOperand(r8));
}


1457
void MacroAssembler::PopStackHandler() {
1458
  STATIC_ASSERT(StackHandlerConstants::kSize == 2 * kPointerSize);
1459
  STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0);
1460

1461
  pop(r4);
1462 1463
  mov(ip, Operand(ExternalReference::Create(IsolateAddressId::kHandlerAddress,
                                            isolate())));
1464
  StoreP(r4, MemOperand(ip));
1465 1466

  Drop(1);  // Drop padding.
1467 1468 1469 1470 1471
}


void MacroAssembler::CompareObjectType(Register object, Register map,
                                       Register type_reg, InstanceType type) {
1472
  const Register temp = type_reg == no_reg ? r0 : type_reg;
1473 1474 1475 1476 1477 1478 1479 1480 1481

  LoadP(map, FieldMemOperand(object, HeapObject::kMapOffset));
  CompareInstanceType(map, temp, type);
}


void MacroAssembler::CompareInstanceType(Register map, Register type_reg,
                                         InstanceType type) {
  STATIC_ASSERT(Map::kInstanceTypeOffset < 4096);
1482
  STATIC_ASSERT(LAST_TYPE <= 0xFFFF);
1483
  lhz(type_reg, FieldMemOperand(map, Map::kInstanceTypeOffset));
1484 1485 1486 1487 1488
  cmpi(type_reg, Operand(type));
}


void MacroAssembler::CompareRoot(Register obj, Heap::RootListIndex index) {
1489
  DCHECK(obj != r0);
1490 1491 1492 1493
  LoadRoot(r0, index);
  cmp(obj, r0);
}

1494
void TurboAssembler::AddAndCheckForOverflow(Register dst, Register left,
1495 1496 1497
                                            Register right,
                                            Register overflow_dst,
                                            Register scratch) {
1498 1499 1500 1501 1502
  DCHECK(dst != overflow_dst);
  DCHECK(dst != scratch);
  DCHECK(overflow_dst != scratch);
  DCHECK(overflow_dst != left);
  DCHECK(overflow_dst != right);
1503

1504
  bool left_is_right = left == right;
1505 1506
  RCBit xorRC = left_is_right ? SetRC : LeaveRC;

1507
  // C = A+B; C overflows if A/B have same sign and C has diff sign than A
1508
  if (dst == left) {
1509 1510
    mr(scratch, left);            // Preserve left.
    add(dst, left, right);        // Left is overwritten.
1511 1512
    xor_(overflow_dst, dst, scratch, xorRC);  // Original left.
    if (!left_is_right) xor_(scratch, dst, right);
1513
  } else if (dst == right) {
1514 1515
    mr(scratch, right);           // Preserve right.
    add(dst, left, right);        // Right is overwritten.
1516 1517
    xor_(overflow_dst, dst, left, xorRC);
    if (!left_is_right) xor_(scratch, dst, scratch);  // Original right.
1518 1519
  } else {
    add(dst, left, right);
1520 1521
    xor_(overflow_dst, dst, left, xorRC);
    if (!left_is_right) xor_(scratch, dst, right);
1522
  }
1523
  if (!left_is_right) and_(overflow_dst, scratch, overflow_dst, SetRC);
1524 1525
}

1526
void TurboAssembler::AddAndCheckForOverflow(Register dst, Register left,
1527 1528 1529 1530
                                            intptr_t right,
                                            Register overflow_dst,
                                            Register scratch) {
  Register original_left = left;
1531 1532 1533 1534
  DCHECK(dst != overflow_dst);
  DCHECK(dst != scratch);
  DCHECK(overflow_dst != scratch);
  DCHECK(overflow_dst != left);
1535 1536

  // C = A+B; C overflows if A/B have same sign and C has diff sign than A
1537
  if (dst == left) {
1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550
    // Preserve left.
    original_left = overflow_dst;
    mr(original_left, left);
  }
  Add(dst, left, right, scratch);
  xor_(overflow_dst, dst, original_left);
  if (right >= 0) {
    and_(overflow_dst, overflow_dst, dst, SetRC);
  } else {
    andc(overflow_dst, overflow_dst, dst, SetRC);
  }
}

1551
void TurboAssembler::SubAndCheckForOverflow(Register dst, Register left,
1552 1553 1554
                                            Register right,
                                            Register overflow_dst,
                                            Register scratch) {
1555 1556 1557 1558 1559
  DCHECK(dst != overflow_dst);
  DCHECK(dst != scratch);
  DCHECK(overflow_dst != scratch);
  DCHECK(overflow_dst != left);
  DCHECK(overflow_dst != right);
1560 1561

  // C = A-B; C overflows if A/B have diff signs and C has diff sign than A
1562
  if (dst == left) {
1563 1564 1565 1566 1567
    mr(scratch, left);      // Preserve left.
    sub(dst, left, right);  // Left is overwritten.
    xor_(overflow_dst, dst, scratch);
    xor_(scratch, scratch, right);
    and_(overflow_dst, overflow_dst, scratch, SetRC);
1568
  } else if (dst == right) {
1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582
    mr(scratch, right);     // Preserve right.
    sub(dst, left, right);  // Right is overwritten.
    xor_(overflow_dst, dst, left);
    xor_(scratch, left, scratch);
    and_(overflow_dst, overflow_dst, scratch, SetRC);
  } else {
    sub(dst, left, right);
    xor_(overflow_dst, dst, left);
    xor_(scratch, left, right);
    and_(overflow_dst, scratch, overflow_dst, SetRC);
  }
}


1583
void MacroAssembler::CallStub(CodeStub* stub, Condition cond) {
1584
  DCHECK(AllowThisStubCall(stub));  // Stub calls are not allowed in some stubs.
1585
  Call(stub->GetCode(), RelocInfo::CODE_TARGET, cond);
1586 1587
}

1588
void TurboAssembler::CallStubDelayed(CodeStub* stub) {
1589 1590 1591 1592 1593 1594 1595 1596 1597
  DCHECK(AllowThisStubCall(stub));  // Stub calls are not allowed in some stubs.

  // Block constant pool for the call instruction sequence.
  ConstantPoolUnavailableScope constant_pool_unavailable(this);

  mov(ip, Operand::EmbeddedCode(stub));
  mtctr(ip);
  bctrl();
}
1598 1599 1600 1601 1602

void MacroAssembler::TailCallStub(CodeStub* stub, Condition cond) {
  Jump(stub->GetCode(), RelocInfo::CODE_TARGET, cond);
}

1603
bool TurboAssembler::AllowThisStubCall(CodeStub* stub) {
1604 1605 1606 1607 1608 1609 1610 1611
  return has_frame_ || !stub->SometimesSetsUpAFrame();
}

void MacroAssembler::TryDoubleToInt32Exact(Register result,
                                           DoubleRegister double_input,
                                           Register scratch,
                                           DoubleRegister double_scratch) {
  Label done;
1612
  DCHECK(double_input != double_scratch);
1613 1614 1615 1616 1617 1618 1619 1620

  ConvertDoubleToInt64(double_input,
#if !V8_TARGET_ARCH_PPC64
                       scratch,
#endif
                       result, double_scratch);

#if V8_TARGET_ARCH_PPC64
1621
  TestIfInt32(result, r0);
1622 1623 1624 1625 1626 1627 1628 1629 1630 1631
#else
  TestIfInt32(scratch, result, r0);
#endif
  bne(&done);

  // convert back and compare
  fcfid(double_scratch, double_scratch);
  fcmpu(double_scratch, double_input);
  bind(&done);
}
1632

1633 1634 1635
void TurboAssembler::TruncateDoubleToI(Isolate* isolate, Zone* zone,
                                       Register result,
                                       DoubleRegister double_input) {
1636 1637 1638 1639 1640 1641 1642 1643 1644 1645
  Label done;

  TryInlineTruncateDoubleToI(result, double_input, &done);

  // If we fell through then inline version didn't succeed - call stub instead.
  mflr(r0);
  push(r0);
  // Put input on stack.
  stfdu(double_input, MemOperand(sp, -kDoubleSize));

1646
  Call(BUILTIN_CODE(isolate, DoubleToI), RelocInfo::CODE_TARGET);
1647

1648
  LoadP(result, MemOperand(sp));
1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677
  addi(sp, sp, Operand(kDoubleSize));
  pop(r0);
  mtlr(r0);

  bind(&done);
}

void TurboAssembler::TryInlineTruncateDoubleToI(Register result,
                                                DoubleRegister double_input,
                                                Label* done) {
  DoubleRegister double_scratch = kScratchDoubleReg;
#if !V8_TARGET_ARCH_PPC64
  Register scratch = ip;
#endif

  ConvertDoubleToInt64(double_input,
#if !V8_TARGET_ARCH_PPC64
                       scratch,
#endif
                       result, double_scratch);

// Test for overflow
#if V8_TARGET_ARCH_PPC64
  TestIfInt32(result, r0);
#else
  TestIfInt32(scratch, result, r0);
#endif
  beq(done);
}
1678

1679
void TurboAssembler::CallRuntimeDelayed(Zone* zone, Runtime::FunctionId fid,
1680 1681 1682 1683 1684 1685 1686
                                        SaveFPRegsMode save_doubles) {
  const Runtime::Function* f = Runtime::FunctionForId(fid);
  // TODO(1236192): Most runtime routines don't need the number of
  // arguments passed in because it is constant. At some point we
  // should remove this need and make the runtime routine entry code
  // smarter.
  mov(r3, Operand(f->nargs));
1687
  Move(r4, ExternalReference::Create(f));
1688
#if V8_TARGET_ARCH_PPC64
1689 1690
  Handle<Code> code =
      CodeFactory::CEntry(isolate(), f->result_size, save_doubles);
1691
#else
1692
  Handle<Code> code = CodeFactory::CEntry(isolate(), 1, save_doubles);
1693
#endif
1694
  Call(code, RelocInfo::CODE_TARGET);
1695
}
1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710

void MacroAssembler::CallRuntime(const Runtime::Function* f, int num_arguments,
                                 SaveFPRegsMode save_doubles) {
  // All parameters are on the stack.  r3 has the return value after call.

  // If the expected number of arguments of the runtime function is
  // constant, we check that the actual number of arguments match the
  // expectation.
  CHECK(f->nargs < 0 || f->nargs == num_arguments);

  // TODO(1236192): Most runtime routines don't need the number of
  // arguments passed in because it is constant. At some point we
  // should remove this need and make the runtime routine entry code
  // smarter.
  mov(r3, Operand(num_arguments));
1711
  Move(r4, ExternalReference::Create(f));
1712
#if V8_TARGET_ARCH_PPC64
1713 1714
  Handle<Code> code =
      CodeFactory::CEntry(isolate(), f->result_size, save_doubles);
1715
#else
1716
  Handle<Code> code = CodeFactory::CEntry(isolate(), 1, save_doubles);
1717
#endif
1718
  Call(code, RelocInfo::CODE_TARGET);
1719 1720
}

1721 1722 1723 1724 1725 1726
void MacroAssembler::TailCallRuntime(Runtime::FunctionId fid) {
  const Runtime::Function* function = Runtime::FunctionForId(fid);
  DCHECK_EQ(1, function->result_size);
  if (function->nargs >= 0) {
    mov(r3, Operand(function->nargs));
  }
1727
  JumpToExternalReference(ExternalReference::Create(fid));
1728 1729 1730
}


1731 1732
void MacroAssembler::JumpToExternalReference(const ExternalReference& builtin,
                                             bool builtin_exit_frame) {
1733
  Move(r4, builtin);
1734 1735 1736
  Handle<Code> code = CodeFactory::CEntry(isolate(), 1, kDontSaveFPRegs,
                                          kArgvOnStack, builtin_exit_frame);
  Jump(code, RelocInfo::CODE_TARGET);
1737 1738
}

1739
void MacroAssembler::JumpToInstructionStream(Address entry) {
1740
  mov(kOffHeapTrampolineRegister, Operand(entry, RelocInfo::OFF_HEAP_TARGET));
1741 1742
  Jump(kOffHeapTrampolineRegister);
}
1743

1744 1745 1746 1747 1748 1749 1750 1751 1752
void MacroAssembler::LoadWeakValue(Register out, Register in,
                                   Label* target_if_cleared) {
  cmpi(in, Operand(kClearedWeakHeapObject));
  beq(target_if_cleared);

  mov(r0, Operand(~kWeakHeapObjectMask));
  and_(out, in, r0);
}

1753 1754
void MacroAssembler::IncrementCounter(StatsCounter* counter, int value,
                                      Register scratch1, Register scratch2) {
1755
  DCHECK_GT(value, 0);
1756
  if (FLAG_native_code_counters && counter->Enabled()) {
1757
    Move(scratch2, ExternalReference::Create(counter));
1758 1759 1760 1761 1762 1763 1764 1765 1766
    lwz(scratch1, MemOperand(scratch2));
    addi(scratch1, scratch1, Operand(value));
    stw(scratch1, MemOperand(scratch2));
  }
}


void MacroAssembler::DecrementCounter(StatsCounter* counter, int value,
                                      Register scratch1, Register scratch2) {
1767
  DCHECK_GT(value, 0);
1768
  if (FLAG_native_code_counters && counter->Enabled()) {
1769
    Move(scratch2, ExternalReference::Create(counter));
1770 1771 1772 1773 1774 1775
    lwz(scratch1, MemOperand(scratch2));
    subi(scratch1, scratch1, Operand(value));
    stw(scratch1, MemOperand(scratch2));
  }
}

1776
void TurboAssembler::Assert(Condition cond, AbortReason reason,
1777 1778 1779 1780
                            CRegister cr) {
  if (emit_debug_code()) Check(cond, reason, cr);
}

1781
void TurboAssembler::Check(Condition cond, AbortReason reason, CRegister cr) {
1782 1783 1784 1785 1786 1787 1788
  Label L;
  b(cond, &L, cr);
  Abort(reason);
  // will not return here
  bind(&L);
}

1789
void TurboAssembler::Abort(AbortReason reason) {
1790 1791 1792
  Label abort_start;
  bind(&abort_start);
#ifdef DEBUG
1793
  const char* msg = GetAbortReason(reason);
1794
  if (msg != nullptr) {
1795 1796 1797 1798 1799 1800 1801 1802 1803 1804
    RecordComment("Abort message: ");
    RecordComment(msg);
  }

  if (FLAG_trap_on_abort) {
    stop(msg);
    return;
  }
#endif

1805 1806
  LoadSmiLiteral(r4, Smi::FromInt(static_cast<int>(reason)));

1807 1808 1809 1810 1811
  // Disable stub call restrictions to always allow calls to abort.
  if (!has_frame_) {
    // We don't actually want to generate a pile of code for this, so just
    // claim there is a stack frame, without generating one.
    FrameScope scope(this, StackFrame::NONE);
1812
    Call(BUILTIN_CODE(isolate(), Abort), RelocInfo::CODE_TARGET);
1813
  } else {
1814
    Call(BUILTIN_CODE(isolate(), Abort), RelocInfo::CODE_TARGET);
1815 1816 1817 1818
  }
  // will not return here
}

1819 1820 1821
void MacroAssembler::LoadNativeContextSlot(int index, Register dst) {
  LoadP(dst, NativeContextMemOperand());
  LoadP(dst, ContextMemOperand(dst, index));
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}


void MacroAssembler::UntagAndJumpIfSmi(Register dst, Register src,
                                       Label* smi_case) {
  STATIC_ASSERT(kSmiTag == 0);
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  TestBitRange(src, kSmiTagSize - 1, 0, r0);
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  SmiUntag(dst, src);
  beq(smi_case, cr0);
}

void MacroAssembler::JumpIfEitherSmi(Register reg1, Register reg2,
                                     Label* on_either_smi) {
  STATIC_ASSERT(kSmiTag == 0);
  JumpIfSmi(reg1, on_either_smi);
  JumpIfSmi(reg2, on_either_smi);
}

void MacroAssembler::AssertNotSmi(Register object) {
  if (emit_debug_code()) {
    STATIC_ASSERT(kSmiTag == 0);
    TestIfSmi(object, r0);
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    Check(ne, AbortReason::kOperandIsASmi, cr0);
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  }
}


void MacroAssembler::AssertSmi(Register object) {
  if (emit_debug_code()) {
    STATIC_ASSERT(kSmiTag == 0);
    TestIfSmi(object, r0);
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    Check(eq, AbortReason::kOperandIsNotASmi, cr0);
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  }
}

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void MacroAssembler::AssertFixedArray(Register object) {
  if (emit_debug_code()) {
    STATIC_ASSERT(kSmiTag == 0);
    TestIfSmi(object, r0);
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    Check(ne, AbortReason::kOperandIsASmiAndNotAFixedArray, cr0);
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    push(object);
    CompareObjectType(object, object, object, FIXED_ARRAY_TYPE);
    pop(object);
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    Check(eq, AbortReason::kOperandIsNotAFixedArray);
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  }
}
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void MacroAssembler::AssertConstructor(Register object) {
  if (emit_debug_code()) {
    STATIC_ASSERT(kSmiTag == 0);
    TestIfSmi(object, r0);
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    Check(ne, AbortReason::kOperandIsASmiAndNotAConstructor, cr0);
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    push(object);
    LoadP(object, FieldMemOperand(object, HeapObject::kMapOffset));
    lbz(object, FieldMemOperand(object, Map::kBitFieldOffset));
    andi(object, object, Operand(Map::IsConstructorBit::kMask));
    pop(object);
    Check(ne, AbortReason::kOperandIsNotAConstructor, cr0);
  }
}

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void MacroAssembler::AssertFunction(Register object) {
  if (emit_debug_code()) {
    STATIC_ASSERT(kSmiTag == 0);
    TestIfSmi(object, r0);
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    Check(ne, AbortReason::kOperandIsASmiAndNotAFunction, cr0);
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    push(object);
    CompareObjectType(object, object, object, JS_FUNCTION_TYPE);
    pop(object);
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    Check(eq, AbortReason::kOperandIsNotAFunction);
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  }
}


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void MacroAssembler::AssertBoundFunction(Register object) {
  if (emit_debug_code()) {
    STATIC_ASSERT(kSmiTag == 0);
    TestIfSmi(object, r0);
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    Check(ne, AbortReason::kOperandIsASmiAndNotABoundFunction, cr0);
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    push(object);
    CompareObjectType(object, object, object, JS_BOUND_FUNCTION_TYPE);
    pop(object);
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    Check(eq, AbortReason::kOperandIsNotABoundFunction);
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  }
}

1908
void MacroAssembler::AssertGeneratorObject(Register object) {
1909 1910
  if (!emit_debug_code()) return;
  TestIfSmi(object, r0);
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  Check(ne, AbortReason::kOperandIsASmiAndNotAGeneratorObject, cr0);
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  // Load map
  Register map = object;
  push(object);
  LoadP(map, FieldMemOperand(object, HeapObject::kMapOffset));
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  // Check if JSGeneratorObject
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  Label do_check;
  Register instance_type = object;
  CompareInstanceType(map, instance_type, JS_GENERATOR_OBJECT_TYPE);
  beq(&do_check);
1923

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  // Check if JSAsyncGeneratorObject (See MacroAssembler::CompareInstanceType)
  cmpi(instance_type, Operand(JS_ASYNC_GENERATOR_OBJECT_TYPE));
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  bind(&do_check);
  // Restore generator object to register and perform assertion
  pop(object);
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  Check(eq, AbortReason::kOperandIsNotAGeneratorObject);
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}

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void MacroAssembler::AssertUndefinedOrAllocationSite(Register object,
                                                     Register scratch) {
  if (emit_debug_code()) {
    Label done_checking;
    AssertNotSmi(object);
    CompareRoot(object, Heap::kUndefinedValueRootIndex);
    beq(&done_checking);
    LoadP(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
    CompareRoot(scratch, Heap::kAllocationSiteMapRootIndex);
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    Assert(eq, AbortReason::kExpectedUndefinedOrCell);
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    bind(&done_checking);
  }
}


static const int kRegisterPassedArguments = 8;

1950
int TurboAssembler::CalculateStackPassedWords(int num_reg_arguments,
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                                              int num_double_arguments) {
  int stack_passed_words = 0;
  if (num_double_arguments > DoubleRegister::kNumRegisters) {
    stack_passed_words +=
        2 * (num_double_arguments - DoubleRegister::kNumRegisters);
  }
  // Up to 8 simple arguments are passed in registers r3..r10.
  if (num_reg_arguments > kRegisterPassedArguments) {
    stack_passed_words += num_reg_arguments - kRegisterPassedArguments;
  }
  return stack_passed_words;
}

1964
void TurboAssembler::PrepareCallCFunction(int num_reg_arguments,
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                                          int num_double_arguments,
                                          Register scratch) {
  int frame_alignment = ActivationFrameAlignment();
  int stack_passed_arguments =
      CalculateStackPassedWords(num_reg_arguments, num_double_arguments);
  int stack_space = kNumRequiredStackFrameSlots;

  if (frame_alignment > kPointerSize) {
    // Make stack end at alignment and make room for stack arguments
    // -- preserving original value of sp.
    mr(scratch, sp);
    addi(sp, sp, Operand(-(stack_passed_arguments + 1) * kPointerSize));
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    DCHECK(base::bits::IsPowerOfTwo(frame_alignment));
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    ClearRightImm(sp, sp, Operand(WhichPowerOf2(frame_alignment)));
    StoreP(scratch, MemOperand(sp, stack_passed_arguments * kPointerSize));
  } else {
    // Make room for stack arguments
    stack_space += stack_passed_arguments;
  }

  // Allocate frame with required slots to make ABI work.
  li(r0, Operand::Zero());
  StorePU(r0, MemOperand(sp, -stack_space * kPointerSize));
}

1990
void TurboAssembler::PrepareCallCFunction(int num_reg_arguments,
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                                          Register scratch) {
  PrepareCallCFunction(num_reg_arguments, 0, scratch);
}

1995
void TurboAssembler::MovToFloatParameter(DoubleRegister src) { Move(d1, src); }
1996

1997
void TurboAssembler::MovToFloatResult(DoubleRegister src) { Move(d1, src); }
1998

1999
void TurboAssembler::MovToFloatParameters(DoubleRegister src1,
2000
                                          DoubleRegister src2) {
2001 2002
  if (src2 == d1) {
    DCHECK(src1 != d2);
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    Move(d2, src2);
    Move(d1, src1);
  } else {
    Move(d1, src1);
    Move(d2, src2);
  }
}

2011
void TurboAssembler::CallCFunction(ExternalReference function,
2012 2013
                                   int num_reg_arguments,
                                   int num_double_arguments) {
2014
  Move(ip, function);
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  CallCFunctionHelper(ip, num_reg_arguments, num_double_arguments);
}

2018
void TurboAssembler::CallCFunction(Register function, int num_reg_arguments,
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                                   int num_double_arguments) {
  CallCFunctionHelper(function, num_reg_arguments, num_double_arguments);
}

2023
void TurboAssembler::CallCFunction(ExternalReference function,
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                                   int num_arguments) {
  CallCFunction(function, num_arguments, 0);
}

2028
void TurboAssembler::CallCFunction(Register function, int num_arguments) {
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  CallCFunction(function, num_arguments, 0);
}

2032
void TurboAssembler::CallCFunctionHelper(Register function,
2033 2034
                                         int num_reg_arguments,
                                         int num_double_arguments) {
2035
  DCHECK_LE(num_reg_arguments + num_double_arguments, kMaxCParameters);
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  DCHECK(has_frame());
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  // Just call directly. The function called cannot cause a GC, or
  // allow preemption, so the return address in the link register
  // stays correct.
2041
  Register dest = function;
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  if (ABI_USES_FUNCTION_DESCRIPTORS) {
    // AIX/PPC64BE Linux uses a function descriptor. When calling C code be
    // aware of this descriptor and pick up values from it
    LoadP(ToRegister(ABI_TOC_REGISTER), MemOperand(function, kPointerSize));
    LoadP(ip, MemOperand(function, 0));
    dest = ip;
  } else if (ABI_CALL_VIA_IP) {
    Move(ip, function);
    dest = ip;
  }
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  Call(dest);

  // Remove frame bought in PrepareCallCFunction
  int stack_passed_arguments =
      CalculateStackPassedWords(num_reg_arguments, num_double_arguments);
  int stack_space = kNumRequiredStackFrameSlots + stack_passed_arguments;
  if (ActivationFrameAlignment() > kPointerSize) {
    LoadP(sp, MemOperand(sp, stack_space * kPointerSize));
  } else {
    addi(sp, sp, Operand(stack_space * kPointerSize));
  }
}


2067
void TurboAssembler::CheckPageFlag(
2068 2069 2070 2071 2072 2073 2074
    Register object,
    Register scratch,  // scratch may be same register as object
    int mask, Condition cc, Label* condition_met) {
  DCHECK(cc == ne || cc == eq);
  ClearRightImm(scratch, object, Operand(kPageSizeBits));
  LoadP(scratch, MemOperand(scratch, MemoryChunk::kFlagsOffset));

2075 2076
  mov(r0, Operand(mask));
  and_(r0, scratch, r0, SetRC);
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  if (cc == ne) {
    bne(condition_met, cr0);
  }
  if (cc == eq) {
    beq(condition_met, cr0);
  }
}

2086
void TurboAssembler::SetRoundingMode(FPRoundingMode RN) { mtfsfi(7, RN); }
2087

2088
void TurboAssembler::ResetRoundingMode() {
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  mtfsfi(7, kRoundToNearest);  // reset (default is kRoundToNearest)
}


////////////////////////////////////////////////////////////////////////////////
//
// New MacroAssembler Interfaces added for PPC
//
////////////////////////////////////////////////////////////////////////////////
2098
void TurboAssembler::LoadIntLiteral(Register dst, int value) {
2099 2100 2101
  mov(dst, Operand(value));
}

2102
void TurboAssembler::LoadSmiLiteral(Register dst, Smi* smi) {
2103 2104 2105
  mov(dst, Operand(smi));
}

2106
void TurboAssembler::LoadDoubleLiteral(DoubleRegister result, Double value,
2107
                                       Register scratch) {
2108
  if (FLAG_enable_embedded_constant_pool && is_constant_pool_available() &&
2109
      !(scratch == r0 && ConstantPoolAccessIsInOverflow())) {
2110 2111 2112 2113 2114 2115 2116 2117 2118 2119
    ConstantPoolEntry::Access access = ConstantPoolAddEntry(value);
    if (access == ConstantPoolEntry::OVERFLOWED) {
      addis(scratch, kConstantPoolRegister, Operand::Zero());
      lfd(result, MemOperand(scratch, 0));
    } else {
      lfd(result, MemOperand(kConstantPoolRegister, 0));
    }
    return;
  }

2120 2121
  // avoid gcc strict aliasing error using union cast
  union {
2122
    uint64_t dval;
2123 2124 2125 2126 2127 2128 2129
#if V8_TARGET_ARCH_PPC64
    intptr_t ival;
#else
    intptr_t ival[2];
#endif
  } litVal;

2130
  litVal.dval = value.AsUint64();
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#if V8_TARGET_ARCH_PPC64
  if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
    mov(scratch, Operand(litVal.ival));
    mtfprd(result, scratch);
    return;
  }
#endif

  addi(sp, sp, Operand(-kDoubleSize));
#if V8_TARGET_ARCH_PPC64
  mov(scratch, Operand(litVal.ival));
  std(scratch, MemOperand(sp));
#else
  LoadIntLiteral(scratch, litVal.ival[0]);
  stw(scratch, MemOperand(sp, 0));
  LoadIntLiteral(scratch, litVal.ival[1]);
  stw(scratch, MemOperand(sp, 4));
#endif
  nop(GROUP_ENDING_NOP);  // LHS/RAW optimization
  lfd(result, MemOperand(sp, 0));
  addi(sp, sp, Operand(kDoubleSize));
}

2155
void TurboAssembler::MovIntToDouble(DoubleRegister dst, Register src,
2156 2157 2158 2159 2160 2161 2162 2163 2164
                                    Register scratch) {
// sign-extend src to 64-bit
#if V8_TARGET_ARCH_PPC64
  if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
    mtfprwa(dst, src);
    return;
  }
#endif

2165
  DCHECK(src != scratch);
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  subi(sp, sp, Operand(kDoubleSize));
#if V8_TARGET_ARCH_PPC64
  extsw(scratch, src);
  std(scratch, MemOperand(sp, 0));
#else
  srawi(scratch, src, 31);
  stw(scratch, MemOperand(sp, Register::kExponentOffset));
  stw(src, MemOperand(sp, Register::kMantissaOffset));
#endif
  nop(GROUP_ENDING_NOP);  // LHS/RAW optimization
  lfd(dst, MemOperand(sp, 0));
  addi(sp, sp, Operand(kDoubleSize));
}

2180
void TurboAssembler::MovUnsignedIntToDouble(DoubleRegister dst, Register src,
2181 2182 2183 2184 2185 2186 2187 2188 2189
                                            Register scratch) {
// zero-extend src to 64-bit
#if V8_TARGET_ARCH_PPC64
  if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
    mtfprwz(dst, src);
    return;
  }
#endif

2190
  DCHECK(src != scratch);
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  subi(sp, sp, Operand(kDoubleSize));
#if V8_TARGET_ARCH_PPC64
  clrldi(scratch, src, Operand(32));
  std(scratch, MemOperand(sp, 0));
#else
  li(scratch, Operand::Zero());
  stw(scratch, MemOperand(sp, Register::kExponentOffset));
  stw(src, MemOperand(sp, Register::kMantissaOffset));
#endif
  nop(GROUP_ENDING_NOP);  // LHS/RAW optimization
  lfd(dst, MemOperand(sp, 0));
  addi(sp, sp, Operand(kDoubleSize));
}

2205
void TurboAssembler::MovInt64ToDouble(DoubleRegister dst,
2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230
#if !V8_TARGET_ARCH_PPC64
                                      Register src_hi,
#endif
                                      Register src) {
#if V8_TARGET_ARCH_PPC64
  if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
    mtfprd(dst, src);
    return;
  }
#endif

  subi(sp, sp, Operand(kDoubleSize));
#if V8_TARGET_ARCH_PPC64
  std(src, MemOperand(sp, 0));
#else
  stw(src_hi, MemOperand(sp, Register::kExponentOffset));
  stw(src, MemOperand(sp, Register::kMantissaOffset));
#endif
  nop(GROUP_ENDING_NOP);  // LHS/RAW optimization
  lfd(dst, MemOperand(sp, 0));
  addi(sp, sp, Operand(kDoubleSize));
}


#if V8_TARGET_ARCH_PPC64
2231
void TurboAssembler::MovInt64ComponentsToDouble(DoubleRegister dst,
2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250
                                                Register src_hi,
                                                Register src_lo,
                                                Register scratch) {
  if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
    sldi(scratch, src_hi, Operand(32));
    rldimi(scratch, src_lo, 0, 32);
    mtfprd(dst, scratch);
    return;
  }

  subi(sp, sp, Operand(kDoubleSize));
  stw(src_hi, MemOperand(sp, Register::kExponentOffset));
  stw(src_lo, MemOperand(sp, Register::kMantissaOffset));
  nop(GROUP_ENDING_NOP);  // LHS/RAW optimization
  lfd(dst, MemOperand(sp));
  addi(sp, sp, Operand(kDoubleSize));
}
#endif

2251
void TurboAssembler::InsertDoubleLow(DoubleRegister dst, Register src,
2252 2253 2254 2255 2256 2257 2258 2259 2260 2261 2262 2263 2264 2265 2266 2267 2268 2269
                                     Register scratch) {
#if V8_TARGET_ARCH_PPC64
  if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
    mffprd(scratch, dst);
    rldimi(scratch, src, 0, 32);
    mtfprd(dst, scratch);
    return;
  }
#endif

  subi(sp, sp, Operand(kDoubleSize));
  stfd(dst, MemOperand(sp));
  stw(src, MemOperand(sp, Register::kMantissaOffset));
  nop(GROUP_ENDING_NOP);  // LHS/RAW optimization
  lfd(dst, MemOperand(sp));
  addi(sp, sp, Operand(kDoubleSize));
}

2270
void TurboAssembler::InsertDoubleHigh(DoubleRegister dst, Register src,
2271 2272 2273 2274 2275 2276 2277 2278 2279 2280 2281 2282 2283 2284 2285 2286 2287 2288
                                      Register scratch) {
#if V8_TARGET_ARCH_PPC64
  if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
    mffprd(scratch, dst);
    rldimi(scratch, src, 32, 0);
    mtfprd(dst, scratch);
    return;
  }
#endif

  subi(sp, sp, Operand(kDoubleSize));
  stfd(dst, MemOperand(sp));
  stw(src, MemOperand(sp, Register::kExponentOffset));
  nop(GROUP_ENDING_NOP);  // LHS/RAW optimization
  lfd(dst, MemOperand(sp));
  addi(sp, sp, Operand(kDoubleSize));
}

2289
void TurboAssembler::MovDoubleLowToInt(Register dst, DoubleRegister src) {
2290 2291 2292 2293 2294 2295 2296 2297 2298 2299 2300 2301 2302 2303
#if V8_TARGET_ARCH_PPC64
  if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
    mffprwz(dst, src);
    return;
  }
#endif

  subi(sp, sp, Operand(kDoubleSize));
  stfd(src, MemOperand(sp));
  nop(GROUP_ENDING_NOP);  // LHS/RAW optimization
  lwz(dst, MemOperand(sp, Register::kMantissaOffset));
  addi(sp, sp, Operand(kDoubleSize));
}

2304
void TurboAssembler::MovDoubleHighToInt(Register dst, DoubleRegister src) {
2305 2306 2307 2308 2309 2310 2311 2312 2313 2314 2315 2316 2317 2318 2319
#if V8_TARGET_ARCH_PPC64
  if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
    mffprd(dst, src);
    srdi(dst, dst, Operand(32));
    return;
  }
#endif

  subi(sp, sp, Operand(kDoubleSize));
  stfd(src, MemOperand(sp));
  nop(GROUP_ENDING_NOP);  // LHS/RAW optimization
  lwz(dst, MemOperand(sp, Register::kExponentOffset));
  addi(sp, sp, Operand(kDoubleSize));
}

2320
void TurboAssembler::MovDoubleToInt64(
2321 2322 2323 2324 2325 2326 2327 2328 2329 2330 2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343
#if !V8_TARGET_ARCH_PPC64
    Register dst_hi,
#endif
    Register dst, DoubleRegister src) {
#if V8_TARGET_ARCH_PPC64
  if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
    mffprd(dst, src);
    return;
  }
#endif

  subi(sp, sp, Operand(kDoubleSize));
  stfd(src, MemOperand(sp));
  nop(GROUP_ENDING_NOP);  // LHS/RAW optimization
#if V8_TARGET_ARCH_PPC64
  ld(dst, MemOperand(sp, 0));
#else
  lwz(dst_hi, MemOperand(sp, Register::kExponentOffset));
  lwz(dst, MemOperand(sp, Register::kMantissaOffset));
#endif
  addi(sp, sp, Operand(kDoubleSize));
}

2344
void TurboAssembler::MovIntToFloat(DoubleRegister dst, Register src) {
2345 2346 2347 2348 2349 2350 2351
  subi(sp, sp, Operand(kFloatSize));
  stw(src, MemOperand(sp, 0));
  nop(GROUP_ENDING_NOP);  // LHS/RAW optimization
  lfs(dst, MemOperand(sp, 0));
  addi(sp, sp, Operand(kFloatSize));
}

2352
void TurboAssembler::MovFloatToInt(Register dst, DoubleRegister src) {
2353 2354 2355 2356 2357 2358 2359
  subi(sp, sp, Operand(kFloatSize));
  stfs(src, MemOperand(sp, 0));
  nop(GROUP_ENDING_NOP);  // LHS/RAW optimization
  lwz(dst, MemOperand(sp, 0));
  addi(sp, sp, Operand(kFloatSize));
}

2360
void TurboAssembler::Add(Register dst, Register src, intptr_t value,
2361 2362 2363 2364 2365 2366 2367 2368 2369 2370 2371 2372 2373 2374 2375 2376 2377 2378 2379 2380 2381
                         Register scratch) {
  if (is_int16(value)) {
    addi(dst, src, Operand(value));
  } else {
    mov(scratch, Operand(value));
    add(dst, src, scratch);
  }
}


void MacroAssembler::Cmpi(Register src1, const Operand& src2, Register scratch,
                          CRegister cr) {
  intptr_t value = src2.immediate();
  if (is_int16(value)) {
    cmpi(src1, src2, cr);
  } else {
    mov(scratch, src2);
    cmp(src1, scratch, cr);
  }
}

2382
void TurboAssembler::Cmpli(Register src1, const Operand& src2, Register scratch,
2383 2384 2385 2386 2387 2388 2389 2390 2391 2392
                           CRegister cr) {
  intptr_t value = src2.immediate();
  if (is_uint16(value)) {
    cmpli(src1, src2, cr);
  } else {
    mov(scratch, src2);
    cmpl(src1, scratch, cr);
  }
}

2393
void TurboAssembler::Cmpwi(Register src1, const Operand& src2, Register scratch,
2394 2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407 2408 2409 2410 2411 2412 2413 2414 2415 2416 2417 2418 2419 2420 2421
                           CRegister cr) {
  intptr_t value = src2.immediate();
  if (is_int16(value)) {
    cmpwi(src1, src2, cr);
  } else {
    mov(scratch, src2);
    cmpw(src1, scratch, cr);
  }
}


void MacroAssembler::Cmplwi(Register src1, const Operand& src2,
                            Register scratch, CRegister cr) {
  intptr_t value = src2.immediate();
  if (is_uint16(value)) {
    cmplwi(src1, src2, cr);
  } else {
    mov(scratch, src2);
    cmplw(src1, scratch, cr);
  }
}


void MacroAssembler::And(Register ra, Register rs, const Operand& rb,
                         RCBit rc) {
  if (rb.is_reg()) {
    and_(ra, rs, rb.rm(), rc);
  } else {
2422 2423
    if (is_uint16(rb.immediate()) && RelocInfo::IsNone(rb.rmode_) &&
        rc == SetRC) {
2424 2425 2426
      andi(ra, rs, rb);
    } else {
      // mov handles the relocation.
2427
      DCHECK(rs != r0);
2428 2429 2430 2431 2432 2433 2434 2435 2436 2437 2438
      mov(r0, rb);
      and_(ra, rs, r0, rc);
    }
  }
}


void MacroAssembler::Or(Register ra, Register rs, const Operand& rb, RCBit rc) {
  if (rb.is_reg()) {
    orx(ra, rs, rb.rm(), rc);
  } else {
2439 2440
    if (is_uint16(rb.immediate()) && RelocInfo::IsNone(rb.rmode_) &&
        rc == LeaveRC) {
2441 2442 2443
      ori(ra, rs, rb);
    } else {
      // mov handles the relocation.
2444
      DCHECK(rs != r0);
2445 2446 2447 2448 2449 2450 2451 2452 2453 2454 2455 2456
      mov(r0, rb);
      orx(ra, rs, r0, rc);
    }
  }
}


void MacroAssembler::Xor(Register ra, Register rs, const Operand& rb,
                         RCBit rc) {
  if (rb.is_reg()) {
    xor_(ra, rs, rb.rm(), rc);
  } else {
2457 2458
    if (is_uint16(rb.immediate()) && RelocInfo::IsNone(rb.rmode_) &&
        rc == LeaveRC) {
2459 2460 2461
      xori(ra, rs, rb);
    } else {
      // mov handles the relocation.
2462
      DCHECK(rs != r0);
2463 2464 2465 2466 2467 2468 2469 2470 2471 2472 2473 2474 2475 2476 2477 2478 2479 2480 2481 2482 2483 2484 2485 2486 2487 2488 2489 2490 2491 2492 2493 2494 2495 2496 2497 2498 2499 2500 2501 2502 2503 2504 2505 2506 2507 2508 2509 2510 2511 2512 2513 2514 2515 2516 2517 2518 2519 2520 2521 2522 2523 2524 2525
      mov(r0, rb);
      xor_(ra, rs, r0, rc);
    }
  }
}


void MacroAssembler::CmpSmiLiteral(Register src1, Smi* smi, Register scratch,
                                   CRegister cr) {
#if V8_TARGET_ARCH_PPC64
  LoadSmiLiteral(scratch, smi);
  cmp(src1, scratch, cr);
#else
  Cmpi(src1, Operand(smi), scratch, cr);
#endif
}


void MacroAssembler::CmplSmiLiteral(Register src1, Smi* smi, Register scratch,
                                    CRegister cr) {
#if V8_TARGET_ARCH_PPC64
  LoadSmiLiteral(scratch, smi);
  cmpl(src1, scratch, cr);
#else
  Cmpli(src1, Operand(smi), scratch, cr);
#endif
}


void MacroAssembler::AddSmiLiteral(Register dst, Register src, Smi* smi,
                                   Register scratch) {
#if V8_TARGET_ARCH_PPC64
  LoadSmiLiteral(scratch, smi);
  add(dst, src, scratch);
#else
  Add(dst, src, reinterpret_cast<intptr_t>(smi), scratch);
#endif
}


void MacroAssembler::SubSmiLiteral(Register dst, Register src, Smi* smi,
                                   Register scratch) {
#if V8_TARGET_ARCH_PPC64
  LoadSmiLiteral(scratch, smi);
  sub(dst, src, scratch);
#else
  Add(dst, src, -(reinterpret_cast<intptr_t>(smi)), scratch);
#endif
}


void MacroAssembler::AndSmiLiteral(Register dst, Register src, Smi* smi,
                                   Register scratch, RCBit rc) {
#if V8_TARGET_ARCH_PPC64
  LoadSmiLiteral(scratch, smi);
  and_(dst, src, scratch, rc);
#else
  And(dst, src, Operand(smi), rc);
#endif
}


// Load a "pointer" sized value from the memory location
2526
void TurboAssembler::LoadP(Register dst, const MemOperand& mem,
2527
                           Register scratch) {
2528
  DCHECK_EQ(mem.rb(), no_reg);
2529 2530
  int offset = mem.offset();

2531
  if (!is_int16(offset)) {
2532
    /* cannot use d-form */
2533
    DCHECK_NE(scratch, no_reg);
2534
    mov(scratch, Operand(offset));
2535
    LoadPX(dst, MemOperand(mem.ra(), scratch));
2536 2537 2538 2539 2540 2541
  } else {
#if V8_TARGET_ARCH_PPC64
    int misaligned = (offset & 3);
    if (misaligned) {
      // adjust base to conform to offset alignment requirements
      // Todo: enhance to use scratch if dst is unsuitable
2542
      DCHECK(dst != r0);
2543 2544 2545 2546 2547 2548 2549 2550 2551 2552 2553
      addi(dst, mem.ra(), Operand((offset & 3) - 4));
      ld(dst, MemOperand(dst, (offset & ~3) + 4));
    } else {
      ld(dst, mem);
    }
#else
    lwz(dst, mem);
#endif
  }
}

2554
void TurboAssembler::LoadPU(Register dst, const MemOperand& mem,
2555 2556 2557
                            Register scratch) {
  int offset = mem.offset();

2558
  if (!is_int16(offset)) {
2559
    /* cannot use d-form */
2560
    DCHECK(scratch != no_reg);
2561
    mov(scratch, Operand(offset));
2562 2563
    LoadPUX(dst, MemOperand(mem.ra(), scratch));
  } else {
2564
#if V8_TARGET_ARCH_PPC64
2565
    ldu(dst, mem);
2566
#else
2567
    lwzu(dst, mem);
2568
#endif
2569 2570 2571 2572
  }
}

// Store a "pointer" sized value to the memory location
2573
void TurboAssembler::StoreP(Register src, const MemOperand& mem,
2574 2575 2576 2577 2578
                            Register scratch) {
  int offset = mem.offset();

  if (!is_int16(offset)) {
    /* cannot use d-form */
2579
    DCHECK(scratch != no_reg);
2580 2581
    mov(scratch, Operand(offset));
    StorePX(src, MemOperand(mem.ra(), scratch));
2582 2583 2584 2585 2586 2587
  } else {
#if V8_TARGET_ARCH_PPC64
    int misaligned = (offset & 3);
    if (misaligned) {
      // adjust base to conform to offset alignment requirements
      // a suitable scratch is required here
2588 2589
      DCHECK(scratch != no_reg);
      if (scratch == r0) {
2590 2591 2592 2593 2594 2595 2596 2597 2598 2599 2600 2601 2602 2603 2604
        LoadIntLiteral(scratch, offset);
        stdx(src, MemOperand(mem.ra(), scratch));
      } else {
        addi(scratch, mem.ra(), Operand((offset & 3) - 4));
        std(src, MemOperand(scratch, (offset & ~3) + 4));
      }
    } else {
      std(src, mem);
    }
#else
    stw(src, mem);
#endif
  }
}

2605
void TurboAssembler::StorePU(Register src, const MemOperand& mem,
2606 2607 2608 2609 2610
                             Register scratch) {
  int offset = mem.offset();

  if (!is_int16(offset)) {
    /* cannot use d-form */
2611
    DCHECK(scratch != no_reg);
2612 2613 2614 2615 2616 2617 2618 2619 2620 2621 2622
    mov(scratch, Operand(offset));
    StorePUX(src, MemOperand(mem.ra(), scratch));
  } else {
#if V8_TARGET_ARCH_PPC64
    stdu(src, mem);
#else
    stwu(src, mem);
#endif
  }
}

2623
void TurboAssembler::LoadWordArith(Register dst, const MemOperand& mem,
2624 2625 2626
                                   Register scratch) {
  int offset = mem.offset();

2627
  if (!is_int16(offset)) {
2628
    DCHECK(scratch != no_reg);
2629 2630
    mov(scratch, Operand(offset));
    lwax(dst, MemOperand(mem.ra(), scratch));
2631 2632 2633 2634 2635 2636
  } else {
#if V8_TARGET_ARCH_PPC64
    int misaligned = (offset & 3);
    if (misaligned) {
      // adjust base to conform to offset alignment requirements
      // Todo: enhance to use scratch if dst is unsuitable
2637
      DCHECK(dst != r0);
2638 2639 2640 2641 2642 2643 2644 2645 2646 2647 2648 2649 2650 2651 2652 2653 2654 2655 2656 2657 2658 2659 2660 2661 2662 2663 2664 2665 2666 2667 2668 2669 2670 2671 2672 2673 2674 2675 2676 2677 2678 2679 2680 2681
      addi(dst, mem.ra(), Operand((offset & 3) - 4));
      lwa(dst, MemOperand(dst, (offset & ~3) + 4));
    } else {
      lwa(dst, mem);
    }
#else
    lwz(dst, mem);
#endif
  }
}


// Variable length depending on whether offset fits into immediate field
// MemOperand currently only supports d-form
void MacroAssembler::LoadWord(Register dst, const MemOperand& mem,
                              Register scratch) {
  Register base = mem.ra();
  int offset = mem.offset();

  if (!is_int16(offset)) {
    LoadIntLiteral(scratch, offset);
    lwzx(dst, MemOperand(base, scratch));
  } else {
    lwz(dst, mem);
  }
}


// Variable length depending on whether offset fits into immediate field
// MemOperand current only supports d-form
void MacroAssembler::StoreWord(Register src, const MemOperand& mem,
                               Register scratch) {
  Register base = mem.ra();
  int offset = mem.offset();

  if (!is_int16(offset)) {
    LoadIntLiteral(scratch, offset);
    stwx(src, MemOperand(base, scratch));
  } else {
    stw(src, mem);
  }
}


2682 2683 2684 2685 2686
void MacroAssembler::LoadHalfWordArith(Register dst, const MemOperand& mem,
                                       Register scratch) {
  int offset = mem.offset();

  if (!is_int16(offset)) {
2687
    DCHECK(scratch != no_reg);
2688 2689 2690 2691 2692 2693 2694 2695
    mov(scratch, Operand(offset));
    lhax(dst, MemOperand(mem.ra(), scratch));
  } else {
    lha(dst, mem);
  }
}


2696 2697 2698 2699 2700 2701 2702 2703 2704 2705 2706 2707 2708 2709 2710 2711 2712 2713 2714 2715 2716 2717 2718 2719 2720 2721 2722 2723 2724 2725 2726 2727 2728 2729 2730 2731 2732 2733 2734 2735 2736 2737 2738 2739 2740 2741 2742 2743 2744 2745 2746 2747 2748 2749 2750 2751 2752 2753 2754 2755 2756 2757 2758 2759 2760 2761 2762 2763 2764 2765 2766 2767 2768
// Variable length depending on whether offset fits into immediate field
// MemOperand currently only supports d-form
void MacroAssembler::LoadHalfWord(Register dst, const MemOperand& mem,
                                  Register scratch) {
  Register base = mem.ra();
  int offset = mem.offset();

  if (!is_int16(offset)) {
    LoadIntLiteral(scratch, offset);
    lhzx(dst, MemOperand(base, scratch));
  } else {
    lhz(dst, mem);
  }
}


// Variable length depending on whether offset fits into immediate field
// MemOperand current only supports d-form
void MacroAssembler::StoreHalfWord(Register src, const MemOperand& mem,
                                   Register scratch) {
  Register base = mem.ra();
  int offset = mem.offset();

  if (!is_int16(offset)) {
    LoadIntLiteral(scratch, offset);
    sthx(src, MemOperand(base, scratch));
  } else {
    sth(src, mem);
  }
}


// Variable length depending on whether offset fits into immediate field
// MemOperand currently only supports d-form
void MacroAssembler::LoadByte(Register dst, const MemOperand& mem,
                              Register scratch) {
  Register base = mem.ra();
  int offset = mem.offset();

  if (!is_int16(offset)) {
    LoadIntLiteral(scratch, offset);
    lbzx(dst, MemOperand(base, scratch));
  } else {
    lbz(dst, mem);
  }
}


// Variable length depending on whether offset fits into immediate field
// MemOperand current only supports d-form
void MacroAssembler::StoreByte(Register src, const MemOperand& mem,
                               Register scratch) {
  Register base = mem.ra();
  int offset = mem.offset();

  if (!is_int16(offset)) {
    LoadIntLiteral(scratch, offset);
    stbx(src, MemOperand(base, scratch));
  } else {
    stb(src, mem);
  }
}


void MacroAssembler::LoadRepresentation(Register dst, const MemOperand& mem,
                                        Representation r, Register scratch) {
  DCHECK(!r.IsDouble());
  if (r.IsInteger8()) {
    LoadByte(dst, mem, scratch);
    extsb(dst, dst);
  } else if (r.IsUInteger8()) {
    LoadByte(dst, mem, scratch);
  } else if (r.IsInteger16()) {
2769
    LoadHalfWordArith(dst, mem, scratch);
2770 2771 2772 2773
  } else if (r.IsUInteger16()) {
    LoadHalfWord(dst, mem, scratch);
#if V8_TARGET_ARCH_PPC64
  } else if (r.IsInteger32()) {
2774
    LoadWordArith(dst, mem, scratch);
2775 2776 2777 2778 2779 2780 2781 2782 2783 2784 2785 2786 2787 2788 2789 2790 2791 2792 2793 2794 2795 2796 2797 2798 2799 2800 2801 2802
#endif
  } else {
    LoadP(dst, mem, scratch);
  }
}


void MacroAssembler::StoreRepresentation(Register src, const MemOperand& mem,
                                         Representation r, Register scratch) {
  DCHECK(!r.IsDouble());
  if (r.IsInteger8() || r.IsUInteger8()) {
    StoreByte(src, mem, scratch);
  } else if (r.IsInteger16() || r.IsUInteger16()) {
    StoreHalfWord(src, mem, scratch);
#if V8_TARGET_ARCH_PPC64
  } else if (r.IsInteger32()) {
    StoreWord(src, mem, scratch);
#endif
  } else {
    if (r.IsHeapObject()) {
      AssertNotSmi(src);
    } else if (r.IsSmi()) {
      AssertSmi(src);
    }
    StoreP(src, mem, scratch);
  }
}

2803
void TurboAssembler::LoadDouble(DoubleRegister dst, const MemOperand& mem,
2804 2805 2806 2807 2808 2809 2810 2811 2812 2813 2814 2815
                                Register scratch) {
  Register base = mem.ra();
  int offset = mem.offset();

  if (!is_int16(offset)) {
    mov(scratch, Operand(offset));
    lfdx(dst, MemOperand(base, scratch));
  } else {
    lfd(dst, mem);
  }
}

2816 2817 2818 2819 2820 2821 2822 2823 2824 2825 2826 2827 2828
void MacroAssembler::LoadDoubleU(DoubleRegister dst, const MemOperand& mem,
                                Register scratch) {
  Register base = mem.ra();
  int offset = mem.offset();

  if (!is_int16(offset)) {
    mov(scratch, Operand(offset));
    lfdux(dst, MemOperand(base, scratch));
  } else {
    lfdu(dst, mem);
  }
}

2829
void TurboAssembler::LoadSingle(DoubleRegister dst, const MemOperand& mem,
2830 2831 2832 2833 2834 2835 2836 2837 2838 2839 2840 2841
                                Register scratch) {
  Register base = mem.ra();
  int offset = mem.offset();

  if (!is_int16(offset)) {
    mov(scratch, Operand(offset));
    lfsx(dst, MemOperand(base, scratch));
  } else {
    lfs(dst, mem);
  }
}

2842 2843
void TurboAssembler::LoadSingleU(DoubleRegister dst, const MemOperand& mem,
                                 Register scratch) {
2844 2845 2846 2847 2848 2849 2850 2851 2852 2853
  Register base = mem.ra();
  int offset = mem.offset();

  if (!is_int16(offset)) {
    mov(scratch, Operand(offset));
    lfsux(dst, MemOperand(base, scratch));
  } else {
    lfsu(dst, mem);
  }
}
2854

2855
void TurboAssembler::StoreDouble(DoubleRegister src, const MemOperand& mem,
2856 2857 2858 2859 2860 2861 2862 2863 2864 2865 2866 2867
                                 Register scratch) {
  Register base = mem.ra();
  int offset = mem.offset();

  if (!is_int16(offset)) {
    mov(scratch, Operand(offset));
    stfdx(src, MemOperand(base, scratch));
  } else {
    stfd(src, mem);
  }
}

2868 2869
void TurboAssembler::StoreDoubleU(DoubleRegister src, const MemOperand& mem,
                                  Register scratch) {
2870 2871 2872 2873 2874 2875 2876 2877 2878 2879 2880
  Register base = mem.ra();
  int offset = mem.offset();

  if (!is_int16(offset)) {
    mov(scratch, Operand(offset));
    stfdux(src, MemOperand(base, scratch));
  } else {
    stfdu(src, mem);
  }
}

2881
void TurboAssembler::StoreSingle(DoubleRegister src, const MemOperand& mem,
2882 2883 2884 2885 2886 2887 2888 2889 2890 2891 2892 2893
                                 Register scratch) {
  Register base = mem.ra();
  int offset = mem.offset();

  if (!is_int16(offset)) {
    mov(scratch, Operand(offset));
    stfsx(src, MemOperand(base, scratch));
  } else {
    stfs(src, mem);
  }
}

2894 2895
void TurboAssembler::StoreSingleU(DoubleRegister src, const MemOperand& mem,
                                  Register scratch) {
2896 2897 2898 2899 2900 2901 2902 2903 2904 2905 2906
  Register base = mem.ra();
  int offset = mem.offset();

  if (!is_int16(offset)) {
    mov(scratch, Operand(offset));
    stfsux(src, MemOperand(base, scratch));
  } else {
    stfsu(src, mem);
  }
}

2907 2908 2909 2910 2911 2912 2913 2914 2915 2916 2917
Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3,
                                   Register reg4, Register reg5,
                                   Register reg6) {
  RegList regs = 0;
  if (reg1.is_valid()) regs |= reg1.bit();
  if (reg2.is_valid()) regs |= reg2.bit();
  if (reg3.is_valid()) regs |= reg3.bit();
  if (reg4.is_valid()) regs |= reg4.bit();
  if (reg5.is_valid()) regs |= reg5.bit();
  if (reg6.is_valid()) regs |= reg6.bit();

2918
  const RegisterConfiguration* config = RegisterConfiguration::Default();
2919 2920 2921
  for (int i = 0; i < config->num_allocatable_general_registers(); ++i) {
    int code = config->GetAllocatableGeneralCode(i);
    Register candidate = Register::from_code(code);
2922 2923 2924 2925 2926 2927
    if (regs & candidate.bit()) continue;
    return candidate;
  }
  UNREACHABLE();
}

2928 2929 2930 2931 2932 2933 2934 2935 2936 2937 2938 2939 2940
void TurboAssembler::SwapP(Register src, Register dst, Register scratch) {
  if (src == dst) return;
  DCHECK(!AreAliased(src, dst, scratch));
  mr(scratch, src);
  mr(src, dst);
  mr(dst, scratch);
}

void TurboAssembler::SwapP(Register src, MemOperand dst, Register scratch) {
  if (dst.ra() != r0) DCHECK(!AreAliased(src, dst.ra(), scratch));
  if (dst.rb() != r0) DCHECK(!AreAliased(src, dst.rb(), scratch));
  DCHECK(!AreAliased(src, scratch));
  mr(scratch, src);
2941 2942
  LoadP(src, dst, r0);
  StoreP(scratch, dst, r0);
2943 2944 2945 2946 2947 2948 2949 2950 2951
}

void TurboAssembler::SwapP(MemOperand src, MemOperand dst, Register scratch_0,
                           Register scratch_1) {
  if (src.ra() != r0) DCHECK(!AreAliased(src.ra(), scratch_0, scratch_1));
  if (src.rb() != r0) DCHECK(!AreAliased(src.rb(), scratch_0, scratch_1));
  if (dst.ra() != r0) DCHECK(!AreAliased(dst.ra(), scratch_0, scratch_1));
  if (dst.rb() != r0) DCHECK(!AreAliased(dst.rb(), scratch_0, scratch_1));
  DCHECK(!AreAliased(scratch_0, scratch_1));
2952 2953 2954 2955 2956 2957 2958 2959 2960 2961 2962 2963 2964 2965 2966 2967 2968 2969 2970
  if (is_int16(src.offset()) || is_int16(dst.offset())) {
    if (!is_int16(src.offset())) {
      // swap operand
      MemOperand temp = src;
      src = dst;
      dst = temp;
    }
    LoadP(scratch_1, dst, scratch_0);
    LoadP(scratch_0, src);
    StoreP(scratch_1, src);
    StoreP(scratch_0, dst, scratch_1);
  } else {
    LoadP(scratch_1, dst, scratch_0);
    push(scratch_1);
    LoadP(scratch_0, src, scratch_1);
    StoreP(scratch_0, dst, scratch_1);
    pop(scratch_1);
    StoreP(scratch_1, src, scratch_0);
  }
2971 2972 2973 2974 2975 2976 2977 2978 2979 2980 2981 2982 2983 2984 2985
}

void TurboAssembler::SwapFloat32(DoubleRegister src, DoubleRegister dst,
                                 DoubleRegister scratch) {
  if (src == dst) return;
  DCHECK(!AreAliased(src, dst, scratch));
  fmr(scratch, src);
  fmr(src, dst);
  fmr(dst, scratch);
}

void TurboAssembler::SwapFloat32(DoubleRegister src, MemOperand dst,
                                 DoubleRegister scratch) {
  DCHECK(!AreAliased(src, scratch));
  fmr(scratch, src);
2986 2987
  LoadSingle(src, dst, r0);
  StoreSingle(scratch, dst, r0);
2988 2989 2990 2991 2992 2993
}

void TurboAssembler::SwapFloat32(MemOperand src, MemOperand dst,
                                 DoubleRegister scratch_0,
                                 DoubleRegister scratch_1) {
  DCHECK(!AreAliased(scratch_0, scratch_1));
2994 2995 2996 2997
  LoadSingle(scratch_0, src, r0);
  LoadSingle(scratch_1, dst, r0);
  StoreSingle(scratch_0, dst, r0);
  StoreSingle(scratch_1, src, r0);
2998 2999 3000 3001 3002 3003 3004 3005 3006 3007 3008 3009 3010 3011 3012
}

void TurboAssembler::SwapDouble(DoubleRegister src, DoubleRegister dst,
                                DoubleRegister scratch) {
  if (src == dst) return;
  DCHECK(!AreAliased(src, dst, scratch));
  fmr(scratch, src);
  fmr(src, dst);
  fmr(dst, scratch);
}

void TurboAssembler::SwapDouble(DoubleRegister src, MemOperand dst,
                                DoubleRegister scratch) {
  DCHECK(!AreAliased(src, scratch));
  fmr(scratch, src);
3013 3014
  LoadDouble(src, dst, r0);
  StoreDouble(scratch, dst, r0);
3015 3016 3017 3018 3019 3020
}

void TurboAssembler::SwapDouble(MemOperand src, MemOperand dst,
                                DoubleRegister scratch_0,
                                DoubleRegister scratch_1) {
  DCHECK(!AreAliased(scratch_0, scratch_1));
3021 3022 3023 3024
  LoadDouble(scratch_0, src, r0);
  LoadDouble(scratch_1, dst, r0);
  StoreDouble(scratch_0, dst, r0);
  StoreDouble(scratch_1, src, r0);
3025 3026
}

3027 3028
#ifdef DEBUG
bool AreAliased(Register reg1, Register reg2, Register reg3, Register reg4,
3029 3030
                Register reg5, Register reg6, Register reg7, Register reg8,
                Register reg9, Register reg10) {
3031 3032
  int n_of_valid_regs = reg1.is_valid() + reg2.is_valid() + reg3.is_valid() +
                        reg4.is_valid() + reg5.is_valid() + reg6.is_valid() +
3033 3034
                        reg7.is_valid() + reg8.is_valid() + reg9.is_valid() +
                        reg10.is_valid();
3035 3036 3037 3038 3039 3040 3041 3042 3043 3044

  RegList regs = 0;
  if (reg1.is_valid()) regs |= reg1.bit();
  if (reg2.is_valid()) regs |= reg2.bit();
  if (reg3.is_valid()) regs |= reg3.bit();
  if (reg4.is_valid()) regs |= reg4.bit();
  if (reg5.is_valid()) regs |= reg5.bit();
  if (reg6.is_valid()) regs |= reg6.bit();
  if (reg7.is_valid()) regs |= reg7.bit();
  if (reg8.is_valid()) regs |= reg8.bit();
3045 3046
  if (reg9.is_valid()) regs |= reg9.bit();
  if (reg10.is_valid()) regs |= reg10.bit();
3047 3048 3049 3050
  int n_of_non_aliasing_regs = NumRegs(regs);

  return n_of_valid_regs != n_of_non_aliasing_regs;
}
3051 3052 3053 3054 3055 3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069 3070 3071 3072 3073 3074 3075

bool AreAliased(DoubleRegister reg1, DoubleRegister reg2, DoubleRegister reg3,
                DoubleRegister reg4, DoubleRegister reg5, DoubleRegister reg6,
                DoubleRegister reg7, DoubleRegister reg8, DoubleRegister reg9,
                DoubleRegister reg10) {
  int n_of_valid_regs = reg1.is_valid() + reg2.is_valid() + reg3.is_valid() +
                        reg4.is_valid() + reg5.is_valid() + reg6.is_valid() +
                        reg7.is_valid() + reg8.is_valid() + reg9.is_valid() +
                        reg10.is_valid();

  RegList regs = 0;
  if (reg1.is_valid()) regs |= reg1.bit();
  if (reg2.is_valid()) regs |= reg2.bit();
  if (reg3.is_valid()) regs |= reg3.bit();
  if (reg4.is_valid()) regs |= reg4.bit();
  if (reg5.is_valid()) regs |= reg5.bit();
  if (reg6.is_valid()) regs |= reg6.bit();
  if (reg7.is_valid()) regs |= reg7.bit();
  if (reg8.is_valid()) regs |= reg8.bit();
  if (reg9.is_valid()) regs |= reg9.bit();
  if (reg10.is_valid()) regs |= reg10.bit();
  int n_of_non_aliasing_regs = NumRegs(regs);

  return n_of_valid_regs != n_of_non_aliasing_regs;
}
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#endif

3078 3079 3080
void TurboAssembler::ResetSpeculationPoisonRegister() {
  mov(kSpeculationPoisonRegister, Operand(-1));
}
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}  // namespace internal
}  // namespace v8

#endif  // V8_TARGET_ARCH_PPC