1. 14 Nov, 2016 1 commit
    • tebbi's avatar
      This CL enables precise source positions for all V8 compilers. It merges... · c3a6ca68
      tebbi authored
      This CL enables precise source positions for all V8 compilers. It merges compiler::SourcePosition and internal::SourcePosition to a single class used throughout the codebase. The new internal::SourcePosition instances store an id identifying an inlined function in addition to a script offset.
      SourcePosition::InliningId() refers to a the new table DeoptimizationInputData::InliningPositions(), which provides the following data for every inlining id:
       - The inlined SharedFunctionInfo as an offset into DeoptimizationInfo::LiteralArray
       - The SourcePosition of the inlining. Recursively, this yields the full inlining stack.
      Before the Code object is created, the same information can be found in CompilationInfo::inlined_functions().
      
      If SourcePosition::InliningId() is SourcePosition::kNotInlined, it refers to the outer (non-inlined) function.
      So every SourcePosition has full information about its inlining stack, as long as the corresponding Code object is known. The internal represenation of a source position is a positive 64bit integer.
      
      All compilers create now appropriate source positions for inlined functions. In the case of Turbofan, this required using AstGraphBuilderWithPositions for inlined functions too. So this class is now moved to a header file.
      
      At the moment, the additional information in source positions is only used in --trace-deopt and --code-comments. The profiler needs to be updated, at the moment it gets the correct script offsets from the deopt info, but the wrong script id from the reconstructed deopt stack, which can lead to wrong outputs. This should be resolved by making the profiler use the new inlining information for deopts.
      
      I activated the inlined deoptimization tests in test-cpu-profiler.cc for Turbofan, changing them to a case where the deopt stack and the inlining position agree. It is currently still broken for other cases.
      
      The following additional changes were necessary:
       - The source position table (internal::SourcePositionTableBuilder etc.) supports now 64bit source positions. Encoding source positions in a single 64bit int together with the difference encoding in the source position table results in very little overhead for the inlining id, since only 12% of the source positions in Octane have a changed inlining id.
       - The class HPositionInfo was effectively dead code and is now removed.
       - SourcePosition has new printing and information facilities, including computing a full inlining stack.
       - I had to rename compiler/source-position.{h,cc} to compiler/compiler-source-position-table.{h,cc} to avoid clashes with the new src/source-position.cc file.
       - I wrote the new wrapper PodArray for ByteArray. It is a template working with any POD-type. This is used in DeoptimizationInputData::InliningPositions().
       - I removed HInlinedFunctionInfo and HGraph::inlined_function_infos, because they were only used for the now obsolete Crankshaft inlining ids.
       - Crankshaft managed a list of inlined functions in Lithium: LChunk::inlined_functions. This is an analog structure to CompilationInfo::inlined_functions. So I removed LChunk::inlined_functions and made Crankshaft use CompilationInfo::inlined_functions instead, because this was necessary to register the offsets into the literal array in a uniform way. This is a safe change because LChunk::inlined_functions has no other uses and the functions in CompilationInfo::inlined_functions have a strictly longer lifespan, being created earlier (in Hydrogen already).
      
      BUG=v8:5432
      
      Review-Url: https://codereview.chromium.org/2451853002
      Cr-Commit-Position: refs/heads/master@{#40975}
      c3a6ca68
  2. 11 Nov, 2016 1 commit
  3. 23 Sep, 2016 1 commit
    • jacob.bramley's avatar
      [arm] Clean up use of IsSupported and IsEnabled. · 73518a90
      jacob.bramley authored
      CpuFeatures::IsSupported(feature) indicates that the feature is
      available on the target. AssemblerBase::IsEnabled(feature) indicates
      that we've checked for support (using CpuFeatureScope). The main benefit
      is that we can test on (for example) ARMv8, but have some assurance that
      we won't generate ARMv8 instructions on ARMv7 targets.
      
      This patch simply cleans up the usage, which had become inconsistent.
      The instruction emission functions now check not only that their
      dependent features are supported, but also that we've verified that
      using CpuFeatureScope.
      
      BUG=
      
      Review-Url: https://codereview.chromium.org/2360243002
      Cr-Commit-Position: refs/heads/master@{#39676}
      73518a90
  4. 08 Sep, 2016 1 commit
  5. 06 Sep, 2016 4 commits
  6. 18 Jul, 2016 1 commit
    • bmeurer's avatar
      [turbofan] Add support for eager/soft deoptimization reasons. · db635d5b
      bmeurer authored
      So far TurboFan wasn't adding the deoptimization reasons for eager/soft
      deoptimization exits that can be used by either the DevTools profiler or
      the --trace-deopt flag. This adds basic support for deopt reasons on
      Deoptimize, DeoptimizeIf and DeoptimizeUnless nodes and threads through
      the reasons to the code generation.
      
      Also moves the DeoptReason to it's own file (to resolve include cycles)
      and drops unused reasons.
      
      R=jarin@chromium.org
      
      Review-Url: https://codereview.chromium.org/2161543002
      Cr-Commit-Position: refs/heads/master@{#37823}
      db635d5b
  7. 30 Jun, 2016 1 commit
  8. 29 Jun, 2016 1 commit
  9. 27 Jun, 2016 2 commits
  10. 24 Jun, 2016 1 commit
  11. 08 Jun, 2016 1 commit
  12. 03 Jun, 2016 1 commit
  13. 01 Jun, 2016 1 commit
  14. 19 May, 2016 1 commit
  15. 13 May, 2016 1 commit
  16. 11 May, 2016 1 commit
    • mstarzinger's avatar
      [compiler] Pass inlining_id via relocation info. · 32049620
      mstarzinger authored
      This passes the inlining_id of deoptimization points via the relocation
      info instead of via a side-channel to the CPU profiler. This is one step
      towards deprecating the side-channel in question and avoid the need for
      performing a lookup of the return address of the deopt point.
      
      R=jarin@chromium.org
      
      Review-Url: https://codereview.chromium.org/1956693002
      Cr-Commit-Position: refs/heads/master@{#36177}
      32049620
  17. 09 May, 2016 1 commit
  18. 06 Apr, 2016 1 commit
  19. 02 Mar, 2016 1 commit
    • rmcilroy's avatar
      [Interpreter] Log source positions for bytecode arrays. · d5820158
      rmcilroy authored
      Add support to log source position offsets to the profiler. As part of
      this change PositionsRecorder is split into two, with the subset needed
      by log.cc moved into log.h and the remainder kept in assembler.h as
      AssemblerPositionsRecorder. The interpreter's source position table
      builder is updated to log positions when the profiler is active.
      
      BUG=v8:4766
      LOG=N
      
      Review URL: https://codereview.chromium.org/1737043002
      
      Cr-Commit-Position: refs/heads/master@{#34416}
      d5820158
  20. 17 Feb, 2016 2 commits
  21. 16 Feb, 2016 1 commit
  22. 06 Feb, 2016 2 commits
  23. 16 Jan, 2016 1 commit
    • ahaas's avatar
      [turbofan] Add the TruncateFloat32ToInt32 operator to turbofan. · fc53eed1
      ahaas authored
      The new operator converts a float32 input to int32 through truncation.
      I provide implementations of the new operator for x64, ia32, arm,
      arm64, mips, mips64, and x87. @v8-ppc-ports, can you please take care
      of the ppc implementation?
      
      R=titzer@chromium.org, v8-arm-ports@googlegroups.com, v8-mips-ports@googlegroups.com, weiliang.lin@intel.com
      
      Review URL: https://codereview.chromium.org/1583323004
      
      Cr-Commit-Position: refs/heads/master@{#33346}
      fc53eed1
  24. 15 Jan, 2016 1 commit
  25. 02 Dec, 2015 1 commit
  26. 27 Nov, 2015 1 commit
  27. 25 Nov, 2015 3 commits
  28. 07 Oct, 2015 1 commit
  29. 02 Oct, 2015 3 commits
    • danno's avatar
      Re-reland: Remove register index/code indirection · 5cf1c0bc
      danno authored
      Previous to this patch, both the lithium and TurboFan register
      allocators tracked allocated registers by "indices", rather than
      the register codes used elsewhere in the runtime. This patch
      ensures that codes are used everywhere, and in the process cleans
      up a bunch of redundant code and adds more structure to how the
      set of allocatable registers is defined.
      
      Some highlights of changes:
      
      * TurboFan's RegisterConfiguration class moved to V8's top level
        so that it can be shared with Crankshaft.
      * Various "ToAllocationIndex" and related methods removed.
      * Code that can be easily shared between Register classes on
        different platforms is now shared.
      * The list of allocatable registers on each platform is declared
        as a list rather than implicitly via the register index <->
        code mapping.
      
      Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2
      Cr-Commit-Position: refs/heads/master@{#30913}
      
      Committed: https://crrev.com/7b7a8205d9a00c678fb7a6e032a55fecbc1509cf
      Cr-Commit-Position: refs/heads/master@{#31075}
      
      Review URL: https://codereview.chromium.org/1287383003
      
      Cr-Commit-Position: refs/heads/master@{#31087}
      5cf1c0bc
    • danno's avatar
      Revert of Reland: Remove register index/code indirection (patchset #20... · 00e07b00
      danno authored
      Revert of Reland: Remove register index/code indirection (patchset #20 id:380001 of https://codereview.chromium.org/1287383003/ )
      
      Reason for revert:
      Failures on MIPS
      
      Original issue's description:
      > Remove register index/code indirection
      >
      > Previous to this patch, both the lithium and TurboFan register
      > allocators tracked allocated registers by "indices", rather than
      > the register codes used elsewhere in the runtime. This patch
      > ensures that codes are used everywhere, and in the process cleans
      > up a bunch of redundant code and adds more structure to how the
      > set of allocatable registers is defined.
      >
      > Some highlights of changes:
      >
      > * TurboFan's RegisterConfiguration class moved to V8's top level
      >   so that it can be shared with Crankshaft.
      > * Various "ToAllocationIndex" and related methods removed.
      > * Code that can be easily shared between Register classes on
      >   different platforms is now shared.
      > * The list of allocatable registers on each platform is declared
      >   as a list rather than implicitly via the register index <->
      >   code mapping.
      >
      > Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2
      > Cr-Commit-Position: refs/heads/master@{#30913}
      >
      > Committed: https://crrev.com/7b7a8205d9a00c678fb7a6e032a55fecbc1509cf
      > Cr-Commit-Position: refs/heads/master@{#31075}
      
      TBR=akos.palfi@imgtec.com,bmeurer@chromium.org,jarin@chromium.org,paul.lind@imgtec.com,titzer@chromium.org
      NOPRESUBMIT=true
      NOTREECHECKS=true
      NOTRY=true
      
      Review URL: https://codereview.chromium.org/1380863004
      
      Cr-Commit-Position: refs/heads/master@{#31083}
      00e07b00
    • danno's avatar
      Remove register index/code indirection · 7b7a8205
      danno authored
      Previous to this patch, both the lithium and TurboFan register
      allocators tracked allocated registers by "indices", rather than
      the register codes used elsewhere in the runtime. This patch
      ensures that codes are used everywhere, and in the process cleans
      up a bunch of redundant code and adds more structure to how the
      set of allocatable registers is defined.
      
      Some highlights of changes:
      
      * TurboFan's RegisterConfiguration class moved to V8's top level
        so that it can be shared with Crankshaft.
      * Various "ToAllocationIndex" and related methods removed.
      * Code that can be easily shared between Register classes on
        different platforms is now shared.
      * The list of allocatable registers on each platform is declared
        as a list rather than implicitly via the register index <->
        code mapping.
      
      Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2
      Cr-Commit-Position: refs/heads/master@{#30913}
      
      Review URL: https://codereview.chromium.org/1287383003
      
      Cr-Commit-Position: refs/heads/master@{#31075}
      7b7a8205
  30. 30 Sep, 2015 1 commit