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Commit 6b6b005f authored by bbudge's avatar bbudge Committed by Commit bot
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Add a kSimd128 machine type for Turbofan. 

Adds kSimd128 to MachineRepresentation.
Adds a Simd128Register concept that's platform independent.
Adds UntaggedSimd128 to types.h.

LOG=N
BUG=v8:4124

Review URL: https://codereview.chromium.org/1693963004

Cr-Commit-Position: refs/heads/master@{#34089}
parent d81fd621
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Showing with 146 additions and 50 deletions
src/arm/assembler-arm.h
View file @ 6b6b005f
...@@ -285,6 +285,7 @@ struct QwNeonRegister { ...@@ -285,6 +285,7 @@ struct QwNeonRegister {
typedef QwNeonRegister QuadRegister; typedef QwNeonRegister QuadRegister;
typedef QwNeonRegister Simd128Register;
// Support for the VFP registers s0 to s31 (d0 to d15). // Support for the VFP registers s0 to s31 (d0 to d15).
// Note that "s(N):s(N+1)" is the same as "d(N/2)". // Note that "s(N):s(N+1)" is the same as "d(N/2)".
......
src/arm64/assembler-arm64.h
View file @ 6b6b005f
...@@ -369,6 +369,8 @@ bool AreSameSizeAndType(const CPURegister& reg1, ...@@ -369,6 +369,8 @@ bool AreSameSizeAndType(const CPURegister& reg1,
typedef FPRegister DoubleRegister; typedef FPRegister DoubleRegister;
// TODO(arm64) Define SIMD registers.
typedef FPRegister Simd128Register;
// ----------------------------------------------------------------------------- // -----------------------------------------------------------------------------
// Lists of registers. // Lists of registers.
......
src/compiler/arm/instruction-selector-arm.cc
View file @ 6b6b005f
...@@ -327,8 +327,9 @@ void InstructionSelector::VisitLoad(Node* node) { ...@@ -327,8 +327,9 @@ void InstructionSelector::VisitLoad(Node* node) {
case MachineRepresentation::kWord32: case MachineRepresentation::kWord32:
opcode = kArmLdr; opcode = kArmLdr;
break; break;
case MachineRepresentation::kNone: // Fall through. case MachineRepresentation::kWord64: // Fall through.
case MachineRepresentation::kWord64: case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
} }
...@@ -412,8 +413,9 @@ void InstructionSelector::VisitStore(Node* node) { ...@@ -412,8 +413,9 @@ void InstructionSelector::VisitStore(Node* node) {
case MachineRepresentation::kWord32: case MachineRepresentation::kWord32:
opcode = kArmStr; opcode = kArmStr;
break; break;
case MachineRepresentation::kNone: // Fall through. case MachineRepresentation::kWord64: // Fall through.
case MachineRepresentation::kWord64: case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
} }
...@@ -452,9 +454,10 @@ void InstructionSelector::VisitCheckedLoad(Node* node) { ...@@ -452,9 +454,10 @@ void InstructionSelector::VisitCheckedLoad(Node* node) {
case MachineRepresentation::kFloat64: case MachineRepresentation::kFloat64:
opcode = kCheckedLoadFloat64; opcode = kCheckedLoadFloat64;
break; break;
case MachineRepresentation::kBit: // Fall through. case MachineRepresentation::kBit: // Fall through.
case MachineRepresentation::kTagged: // Fall through. case MachineRepresentation::kTagged: // Fall through.
case MachineRepresentation::kWord64: // Fall through. case MachineRepresentation::kWord64: // Fall through.
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -493,9 +496,10 @@ void InstructionSelector::VisitCheckedStore(Node* node) { ...@@ -493,9 +496,10 @@ void InstructionSelector::VisitCheckedStore(Node* node) {
case MachineRepresentation::kFloat64: case MachineRepresentation::kFloat64:
opcode = kCheckedStoreFloat64; opcode = kCheckedStoreFloat64;
break; break;
case MachineRepresentation::kBit: // Fall through. case MachineRepresentation::kBit: // Fall through.
case MachineRepresentation::kTagged: // Fall through. case MachineRepresentation::kTagged: // Fall through.
case MachineRepresentation::kWord64: // Fall through. case MachineRepresentation::kWord64: // Fall through.
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
......
src/compiler/arm64/instruction-selector-arm64.cc
View file @ 6b6b005f
...@@ -371,6 +371,7 @@ void InstructionSelector::VisitLoad(Node* node) { ...@@ -371,6 +371,7 @@ void InstructionSelector::VisitLoad(Node* node) {
opcode = kArm64Ldr; opcode = kArm64Ldr;
immediate_mode = kLoadStoreImm64; immediate_mode = kLoadStoreImm64;
break; break;
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -466,6 +467,7 @@ void InstructionSelector::VisitStore(Node* node) { ...@@ -466,6 +467,7 @@ void InstructionSelector::VisitStore(Node* node) {
opcode = kArm64Str; opcode = kArm64Str;
immediate_mode = kLoadStoreImm64; immediate_mode = kLoadStoreImm64;
break; break;
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -507,8 +509,9 @@ void InstructionSelector::VisitCheckedLoad(Node* node) { ...@@ -507,8 +509,9 @@ void InstructionSelector::VisitCheckedLoad(Node* node) {
case MachineRepresentation::kFloat64: case MachineRepresentation::kFloat64:
opcode = kCheckedLoadFloat64; opcode = kCheckedLoadFloat64;
break; break;
case MachineRepresentation::kBit: // Fall through. case MachineRepresentation::kBit: // Fall through.
case MachineRepresentation::kTagged: // Fall through. case MachineRepresentation::kTagged: // Fall through.
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -545,8 +548,9 @@ void InstructionSelector::VisitCheckedStore(Node* node) { ...@@ -545,8 +548,9 @@ void InstructionSelector::VisitCheckedStore(Node* node) {
case MachineRepresentation::kFloat64: case MachineRepresentation::kFloat64:
opcode = kCheckedStoreFloat64; opcode = kCheckedStoreFloat64;
break; break;
case MachineRepresentation::kBit: // Fall through. case MachineRepresentation::kBit: // Fall through.
case MachineRepresentation::kTagged: // Fall through. case MachineRepresentation::kTagged: // Fall through.
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
......
src/compiler/ia32/instruction-selector-ia32.cc
View file @ 6b6b005f
...@@ -190,7 +190,8 @@ void InstructionSelector::VisitLoad(Node* node) { ...@@ -190,7 +190,8 @@ void InstructionSelector::VisitLoad(Node* node) {
case MachineRepresentation::kWord32: case MachineRepresentation::kWord32:
opcode = kIA32Movl; opcode = kIA32Movl;
break; break;
case MachineRepresentation::kWord64: // Fall through. case MachineRepresentation::kWord64: // Fall through.
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -275,7 +276,8 @@ void InstructionSelector::VisitStore(Node* node) { ...@@ -275,7 +276,8 @@ void InstructionSelector::VisitStore(Node* node) {
case MachineRepresentation::kWord32: case MachineRepresentation::kWord32:
opcode = kIA32Movl; opcode = kIA32Movl;
break; break;
case MachineRepresentation::kWord64: // Fall through. case MachineRepresentation::kWord64: // Fall through.
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -327,9 +329,10 @@ void InstructionSelector::VisitCheckedLoad(Node* node) { ...@@ -327,9 +329,10 @@ void InstructionSelector::VisitCheckedLoad(Node* node) {
case MachineRepresentation::kFloat64: case MachineRepresentation::kFloat64:
opcode = kCheckedLoadFloat64; opcode = kCheckedLoadFloat64;
break; break;
case MachineRepresentation::kBit: // Fall through. case MachineRepresentation::kBit: // Fall through.
case MachineRepresentation::kTagged: // Fall through. case MachineRepresentation::kTagged: // Fall through.
case MachineRepresentation::kWord64: // Fall through. case MachineRepresentation::kWord64: // Fall through.
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -373,9 +376,10 @@ void InstructionSelector::VisitCheckedStore(Node* node) { ...@@ -373,9 +376,10 @@ void InstructionSelector::VisitCheckedStore(Node* node) {
case MachineRepresentation::kFloat64: case MachineRepresentation::kFloat64:
opcode = kCheckedStoreFloat64; opcode = kCheckedStoreFloat64;
break; break;
case MachineRepresentation::kBit: // Fall through. case MachineRepresentation::kBit: // Fall through.
case MachineRepresentation::kTagged: // Fall through. case MachineRepresentation::kTagged: // Fall through.
case MachineRepresentation::kWord64: // Fall through. case MachineRepresentation::kWord64: // Fall through.
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
......
src/compiler/instruction.cc
View file @ 6b6b005f
...@@ -164,6 +164,9 @@ std::ostream& operator<<(std::ostream& os, ...@@ -164,6 +164,9 @@ std::ostream& operator<<(std::ostream& os,
case MachineRepresentation::kFloat64: case MachineRepresentation::kFloat64:
os << "|f64"; os << "|f64";
break; break;
case MachineRepresentation::kSimd128:
os << "|s128";
break;
case MachineRepresentation::kTagged: case MachineRepresentation::kTagged:
os << "|t"; os << "|t";
break; break;
...@@ -744,6 +747,7 @@ static MachineRepresentation FilterRepresentation(MachineRepresentation rep) { ...@@ -744,6 +747,7 @@ static MachineRepresentation FilterRepresentation(MachineRepresentation rep) {
case MachineRepresentation::kWord64: case MachineRepresentation::kWord64:
case MachineRepresentation::kFloat32: case MachineRepresentation::kFloat32:
case MachineRepresentation::kFloat64: case MachineRepresentation::kFloat64:
case MachineRepresentation::kSimd128:
case MachineRepresentation::kTagged: case MachineRepresentation::kTagged:
return rep; return rep;
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
......
src/compiler/instruction.h
View file @ 6b6b005f
...@@ -67,8 +67,10 @@ class InstructionOperand { ...@@ -67,8 +67,10 @@ class InstructionOperand {
inline bool IsAnyRegister() const; inline bool IsAnyRegister() const;
inline bool IsRegister() const; inline bool IsRegister() const;
inline bool IsDoubleRegister() const; inline bool IsDoubleRegister() const;
inline bool IsSimd128Register() const;
inline bool IsStackSlot() const; inline bool IsStackSlot() const;
inline bool IsDoubleStackSlot() const; inline bool IsDoubleStackSlot() const;
inline bool IsSimd128StackSlot() const;
template <typename SubKindOperand> template <typename SubKindOperand>
static SubKindOperand* New(Zone* zone, const SubKindOperand& op) { static SubKindOperand* New(Zone* zone, const SubKindOperand& op) {
...@@ -411,7 +413,7 @@ class LocationOperand : public InstructionOperand { ...@@ -411,7 +413,7 @@ class LocationOperand : public InstructionOperand {
} }
int index() const { int index() const {
DCHECK(IsStackSlot() || IsDoubleStackSlot()); DCHECK(IsStackSlot() || IsDoubleStackSlot() || IsSimd128StackSlot());
return static_cast<int64_t>(value_) >> IndexField::kShift; return static_cast<int64_t>(value_) >> IndexField::kShift;
} }
...@@ -427,6 +429,12 @@ class LocationOperand : public InstructionOperand { ...@@ -427,6 +429,12 @@ class LocationOperand : public InstructionOperand {
IndexField::kShift); IndexField::kShift);
} }
Simd128Register GetSimd128Register() const {
DCHECK(IsSimd128Register());
return Simd128Register::from_code(static_cast<int64_t>(value_) >>
IndexField::kShift);
}
LocationKind location_kind() const { LocationKind location_kind() const {
return LocationKindField::decode(value_); return LocationKindField::decode(value_);
} }
...@@ -441,6 +449,7 @@ class LocationOperand : public InstructionOperand { ...@@ -441,6 +449,7 @@ class LocationOperand : public InstructionOperand {
case MachineRepresentation::kWord64: case MachineRepresentation::kWord64:
case MachineRepresentation::kFloat32: case MachineRepresentation::kFloat32:
case MachineRepresentation::kFloat64: case MachineRepresentation::kFloat64:
case MachineRepresentation::kSimd128:
case MachineRepresentation::kTagged: case MachineRepresentation::kTagged:
return true; return true;
case MachineRepresentation::kBit: case MachineRepresentation::kBit:
...@@ -522,6 +531,12 @@ bool InstructionOperand::IsDoubleRegister() const { ...@@ -522,6 +531,12 @@ bool InstructionOperand::IsDoubleRegister() const {
IsFloatingPoint(LocationOperand::cast(this)->representation()); IsFloatingPoint(LocationOperand::cast(this)->representation());
} }
bool InstructionOperand::IsSimd128Register() const {
return IsAnyRegister() &&
LocationOperand::cast(this)->representation() ==
MachineRepresentation::kSimd128;
}
bool InstructionOperand::IsStackSlot() const { bool InstructionOperand::IsStackSlot() const {
return (IsAllocated() || IsExplicit()) && return (IsAllocated() || IsExplicit()) &&
LocationOperand::cast(this)->location_kind() == LocationOperand::cast(this)->location_kind() ==
...@@ -536,6 +551,14 @@ bool InstructionOperand::IsDoubleStackSlot() const { ...@@ -536,6 +551,14 @@ bool InstructionOperand::IsDoubleStackSlot() const {
IsFloatingPoint(LocationOperand::cast(this)->representation()); IsFloatingPoint(LocationOperand::cast(this)->representation());
} }
bool InstructionOperand::IsSimd128StackSlot() const {
return (IsAllocated() || IsExplicit()) &&
LocationOperand::cast(this)->location_kind() ==
LocationOperand::STACK_SLOT &&
LocationOperand::cast(this)->representation() ==
MachineRepresentation::kSimd128;
}
uint64_t InstructionOperand::GetCanonicalizedValue() const { uint64_t InstructionOperand::GetCanonicalizedValue() const {
if (IsAllocated() || IsExplicit()) { if (IsAllocated() || IsExplicit()) {
// TODO(dcarney): put machine type last and mask. // TODO(dcarney): put machine type last and mask.
......
src/compiler/machine-operator.cc
View file @ 6b6b005f
...@@ -221,6 +221,7 @@ MachineRepresentation StackSlotRepresentationOf(Operator const* op) { ...@@ -221,6 +221,7 @@ MachineRepresentation StackSlotRepresentationOf(Operator const* op) {
#define MACHINE_TYPE_LIST(V) \ #define MACHINE_TYPE_LIST(V) \
V(Float32) \ V(Float32) \
V(Float64) \ V(Float64) \
V(Simd128) \
V(Int8) \ V(Int8) \
V(Uint8) \ V(Uint8) \
V(Int16) \ V(Int16) \
...@@ -232,17 +233,16 @@ MachineRepresentation StackSlotRepresentationOf(Operator const* op) { ...@@ -232,17 +233,16 @@ MachineRepresentation StackSlotRepresentationOf(Operator const* op) {
V(Pointer) \ V(Pointer) \
V(AnyTagged) V(AnyTagged)
#define MACHINE_REPRESENTATION_LIST(V) \ #define MACHINE_REPRESENTATION_LIST(V) \
V(kFloat32) \ V(kFloat32) \
V(kFloat64) \ V(kFloat64) \
V(kSimd128) \
V(kWord8) \ V(kWord8) \
V(kWord16) \ V(kWord16) \
V(kWord32) \ V(kWord32) \
V(kWord64) \ V(kWord64) \
V(kTagged) V(kTagged)
struct MachineOperatorGlobalCache { struct MachineOperatorGlobalCache {
#define PURE(Name, properties, value_input_count, control_input_count, \ #define PURE(Name, properties, value_input_count, control_input_count, \
output_count) \ output_count) \
......
src/compiler/mips/instruction-selector-mips.cc
View file @ 6b6b005f
...@@ -151,7 +151,8 @@ void InstructionSelector::VisitLoad(Node* node) { ...@@ -151,7 +151,8 @@ void InstructionSelector::VisitLoad(Node* node) {
case MachineRepresentation::kWord32: case MachineRepresentation::kWord32:
opcode = kMipsLw; opcode = kMipsLw;
break; break;
case MachineRepresentation::kWord64: // Fall through. case MachineRepresentation::kWord64: // Fall through.
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -231,7 +232,8 @@ void InstructionSelector::VisitStore(Node* node) { ...@@ -231,7 +232,8 @@ void InstructionSelector::VisitStore(Node* node) {
case MachineRepresentation::kWord32: case MachineRepresentation::kWord32:
opcode = kMipsSw; opcode = kMipsSw;
break; break;
case MachineRepresentation::kWord64: // Fall through. case MachineRepresentation::kWord64: // Fall through.
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -898,9 +900,10 @@ void InstructionSelector::VisitCheckedLoad(Node* node) { ...@@ -898,9 +900,10 @@ void InstructionSelector::VisitCheckedLoad(Node* node) {
case MachineRepresentation::kFloat64: case MachineRepresentation::kFloat64:
opcode = kCheckedLoadFloat64; opcode = kCheckedLoadFloat64;
break; break;
case MachineRepresentation::kBit: // Fall through. case MachineRepresentation::kBit: // Fall through.
case MachineRepresentation::kTagged: // Fall through. case MachineRepresentation::kTagged: // Fall through.
case MachineRepresentation::kWord64: // Fall through. case MachineRepresentation::kWord64: // Fall through.
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
......
src/compiler/mips64/instruction-selector-mips64.cc
View file @ 6b6b005f
...@@ -159,6 +159,7 @@ void InstructionSelector::VisitLoad(Node* node) { ...@@ -159,6 +159,7 @@ void InstructionSelector::VisitLoad(Node* node) {
case MachineRepresentation::kWord64: case MachineRepresentation::kWord64:
opcode = kMips64Ld; opcode = kMips64Ld;
break; break;
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -241,6 +242,7 @@ void InstructionSelector::VisitStore(Node* node) { ...@@ -241,6 +242,7 @@ void InstructionSelector::VisitStore(Node* node) {
case MachineRepresentation::kWord64: case MachineRepresentation::kWord64:
opcode = kMips64Sd; opcode = kMips64Sd;
break; break;
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -1347,6 +1349,7 @@ void InstructionSelector::VisitCheckedLoad(Node* node) { ...@@ -1347,6 +1349,7 @@ void InstructionSelector::VisitCheckedLoad(Node* node) {
break; break;
case MachineRepresentation::kBit: case MachineRepresentation::kBit:
case MachineRepresentation::kTagged: case MachineRepresentation::kTagged:
case MachineRepresentation::kSimd128:
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -1396,6 +1399,7 @@ void InstructionSelector::VisitCheckedStore(Node* node) { ...@@ -1396,6 +1399,7 @@ void InstructionSelector::VisitCheckedStore(Node* node) {
break; break;
case MachineRepresentation::kBit: case MachineRepresentation::kBit:
case MachineRepresentation::kTagged: case MachineRepresentation::kTagged:
case MachineRepresentation::kSimd128:
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
......
src/compiler/ppc/instruction-selector-ppc.cc
View file @ 6b6b005f
...@@ -200,6 +200,7 @@ void InstructionSelector::VisitLoad(Node* node) { ...@@ -200,6 +200,7 @@ void InstructionSelector::VisitLoad(Node* node) {
#else #else
case MachineRepresentation::kWord64: // Fall through. case MachineRepresentation::kWord64: // Fall through.
#endif #endif
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -302,6 +303,7 @@ void InstructionSelector::VisitStore(Node* node) { ...@@ -302,6 +303,7 @@ void InstructionSelector::VisitStore(Node* node) {
#else #else
case MachineRepresentation::kWord64: // Fall through. case MachineRepresentation::kWord64: // Fall through.
#endif #endif
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -353,6 +355,7 @@ void InstructionSelector::VisitCheckedLoad(Node* node) { ...@@ -353,6 +355,7 @@ void InstructionSelector::VisitCheckedLoad(Node* node) {
#if !V8_TARGET_ARCH_PPC64 #if !V8_TARGET_ARCH_PPC64
case MachineRepresentation::kWord64: // Fall through. case MachineRepresentation::kWord64: // Fall through.
#endif #endif
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -398,6 +401,7 @@ void InstructionSelector::VisitCheckedStore(Node* node) { ...@@ -398,6 +401,7 @@ void InstructionSelector::VisitCheckedStore(Node* node) {
#if !V8_TARGET_ARCH_PPC64 #if !V8_TARGET_ARCH_PPC64
case MachineRepresentation::kWord64: // Fall through. case MachineRepresentation::kWord64: // Fall through.
#endif #endif
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
......
src/compiler/register-allocator.cc
View file @ 6b6b005f
...@@ -104,6 +104,8 @@ int GetByteWidth(MachineRepresentation rep) { ...@@ -104,6 +104,8 @@ int GetByteWidth(MachineRepresentation rep) {
case MachineRepresentation::kWord64: case MachineRepresentation::kWord64:
case MachineRepresentation::kFloat64: case MachineRepresentation::kFloat64:
return 8; return 8;
case MachineRepresentation::kSimd128:
return 16;
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
break; break;
} }
......
src/compiler/representation-change.cc
View file @ 6b6b005f
...@@ -145,6 +145,9 @@ Node* RepresentationChanger::GetRepresentationFor( ...@@ -145,6 +145,9 @@ Node* RepresentationChanger::GetRepresentationFor(
return GetWord32RepresentationFor(node, output_rep, output_type); return GetWord32RepresentationFor(node, output_rep, output_type);
case MachineRepresentation::kWord64: case MachineRepresentation::kWord64:
return GetWord64RepresentationFor(node, output_rep, output_type); return GetWord64RepresentationFor(node, output_rep, output_type);
case MachineRepresentation::kSimd128: // Fall through.
// TODO(bbudge) Handle conversions between tagged and untagged.
break;
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
return node; return node;
} }
......
src/compiler/simplified-lowering.cc
View file @ 6b6b005f
...@@ -142,6 +142,7 @@ UseInfo TruncatingUseInfoFromRepresentation(MachineRepresentation rep) { ...@@ -142,6 +142,7 @@ UseInfo TruncatingUseInfoFromRepresentation(MachineRepresentation rep) {
return UseInfo::TruncatingWord32(); return UseInfo::TruncatingWord32();
case MachineRepresentation::kBit: case MachineRepresentation::kBit:
return UseInfo::Bool(); return UseInfo::Bool();
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
break; break;
} }
...@@ -199,6 +200,9 @@ bool MachineRepresentationIsSubtype(MachineRepresentation r1, ...@@ -199,6 +200,9 @@ bool MachineRepresentationIsSubtype(MachineRepresentation r1,
case MachineRepresentation::kFloat64: case MachineRepresentation::kFloat64:
return r2 == MachineRepresentation::kFloat64 || return r2 == MachineRepresentation::kFloat64 ||
r2 == MachineRepresentation::kTagged; r2 == MachineRepresentation::kTagged;
case MachineRepresentation::kSimd128:
return r2 == MachineRepresentation::kSimd128 ||
r2 == MachineRepresentation::kTagged;
case MachineRepresentation::kTagged: case MachineRepresentation::kTagged:
return r2 == MachineRepresentation::kTagged; return r2 == MachineRepresentation::kTagged;
} }
......
src/compiler/x64/instruction-selector-x64.cc
View file @ 6b6b005f
...@@ -133,6 +133,7 @@ void InstructionSelector::VisitLoad(Node* node) { ...@@ -133,6 +133,7 @@ void InstructionSelector::VisitLoad(Node* node) {
case MachineRepresentation::kWord64: case MachineRepresentation::kWord64:
opcode = kX64Movq; opcode = kX64Movq;
break; break;
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -219,6 +220,7 @@ void InstructionSelector::VisitStore(Node* node) { ...@@ -219,6 +220,7 @@ void InstructionSelector::VisitStore(Node* node) {
case MachineRepresentation::kWord64: case MachineRepresentation::kWord64:
opcode = kX64Movq; opcode = kX64Movq;
break; break;
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -264,8 +266,9 @@ void InstructionSelector::VisitCheckedLoad(Node* node) { ...@@ -264,8 +266,9 @@ void InstructionSelector::VisitCheckedLoad(Node* node) {
case MachineRepresentation::kFloat64: case MachineRepresentation::kFloat64:
opcode = kCheckedLoadFloat64; opcode = kCheckedLoadFloat64;
break; break;
case MachineRepresentation::kBit: case MachineRepresentation::kBit: // Fall through.
case MachineRepresentation::kTagged: case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kTagged: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -316,8 +319,9 @@ void InstructionSelector::VisitCheckedStore(Node* node) { ...@@ -316,8 +319,9 @@ void InstructionSelector::VisitCheckedStore(Node* node) {
case MachineRepresentation::kFloat64: case MachineRepresentation::kFloat64:
opcode = kCheckedStoreFloat64; opcode = kCheckedStoreFloat64;
break; break;
case MachineRepresentation::kBit: case MachineRepresentation::kBit: // Fall through.
case MachineRepresentation::kTagged: case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kTagged: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
......
src/compiler/x87/instruction-selector-x87.cc
View file @ 6b6b005f
...@@ -151,7 +151,8 @@ void InstructionSelector::VisitLoad(Node* node) { ...@@ -151,7 +151,8 @@ void InstructionSelector::VisitLoad(Node* node) {
case MachineRepresentation::kWord32: case MachineRepresentation::kWord32:
opcode = kX87Movl; opcode = kX87Movl;
break; break;
case MachineRepresentation::kWord64: // Fall through. case MachineRepresentation::kWord64: // Fall through.
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -236,7 +237,8 @@ void InstructionSelector::VisitStore(Node* node) { ...@@ -236,7 +237,8 @@ void InstructionSelector::VisitStore(Node* node) {
case MachineRepresentation::kWord32: case MachineRepresentation::kWord32:
opcode = kX87Movl; opcode = kX87Movl;
break; break;
case MachineRepresentation::kWord64: // Fall through. case MachineRepresentation::kWord64: // Fall through.
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -288,9 +290,10 @@ void InstructionSelector::VisitCheckedLoad(Node* node) { ...@@ -288,9 +290,10 @@ void InstructionSelector::VisitCheckedLoad(Node* node) {
case MachineRepresentation::kFloat64: case MachineRepresentation::kFloat64:
opcode = kCheckedLoadFloat64; opcode = kCheckedLoadFloat64;
break; break;
case MachineRepresentation::kBit: // Fall through. case MachineRepresentation::kBit: // Fall through.
case MachineRepresentation::kTagged: // Fall through. case MachineRepresentation::kTagged: // Fall through.
case MachineRepresentation::kWord64: // Fall through. case MachineRepresentation::kWord64: // Fall through.
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
...@@ -334,9 +337,10 @@ void InstructionSelector::VisitCheckedStore(Node* node) { ...@@ -334,9 +337,10 @@ void InstructionSelector::VisitCheckedStore(Node* node) {
case MachineRepresentation::kFloat64: case MachineRepresentation::kFloat64:
opcode = kCheckedStoreFloat64; opcode = kCheckedStoreFloat64;
break; break;
case MachineRepresentation::kBit: // Fall through. case MachineRepresentation::kBit: // Fall through.
case MachineRepresentation::kTagged: // Fall through. case MachineRepresentation::kTagged: // Fall through.
case MachineRepresentation::kWord64: // Fall through. case MachineRepresentation::kWord64: // Fall through.
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
......
src/ia32/assembler-ia32.h
View file @ 6b6b005f
...@@ -184,6 +184,8 @@ DOUBLE_REGISTERS(DECLARE_REGISTER) ...@@ -184,6 +184,8 @@ DOUBLE_REGISTERS(DECLARE_REGISTER)
#undef DECLARE_REGISTER #undef DECLARE_REGISTER
const DoubleRegister no_double_reg = {DoubleRegister::kCode_no_reg}; const DoubleRegister no_double_reg = {DoubleRegister::kCode_no_reg};
typedef DoubleRegister Simd128Register;
typedef DoubleRegister XMMRegister; typedef DoubleRegister XMMRegister;
enum Condition { enum Condition {
......
src/machine-type.cc
View file @ 6b6b005f
...@@ -26,6 +26,8 @@ std::ostream& operator<<(std::ostream& os, MachineRepresentation rep) { ...@@ -26,6 +26,8 @@ std::ostream& operator<<(std::ostream& os, MachineRepresentation rep) {
return os << "kRepFloat32"; return os << "kRepFloat32";
case MachineRepresentation::kFloat64: case MachineRepresentation::kFloat64:
return os << "kRepFloat64"; return os << "kRepFloat64";
case MachineRepresentation::kSimd128:
return os << "kRepSimd128";
case MachineRepresentation::kTagged: case MachineRepresentation::kTagged:
return os << "kRepTagged"; return os << "kRepTagged";
} }
......
src/machine-type.h
View file @ 6b6b005f
...@@ -24,6 +24,7 @@ enum class MachineRepresentation : uint8_t { ...@@ -24,6 +24,7 @@ enum class MachineRepresentation : uint8_t {
kWord64, kWord64,
kFloat32, kFloat32,
kFloat64, kFloat64,
kSimd128,
kTagged kTagged
}; };
...@@ -84,6 +85,9 @@ class MachineType { ...@@ -84,6 +85,9 @@ class MachineType {
return MachineType(MachineRepresentation::kFloat64, return MachineType(MachineRepresentation::kFloat64,
MachineSemantic::kNumber); MachineSemantic::kNumber);
} }
static MachineType Simd128() {
return MachineType(MachineRepresentation::kSimd128, MachineSemantic::kNone);
}
static MachineType Int8() { static MachineType Int8() {
return MachineType(MachineRepresentation::kWord8, MachineSemantic::kInt32); return MachineType(MachineRepresentation::kWord8, MachineSemantic::kInt32);
} }
...@@ -143,6 +147,9 @@ class MachineType { ...@@ -143,6 +147,9 @@ class MachineType {
static MachineType RepFloat64() { static MachineType RepFloat64() {
return MachineType(MachineRepresentation::kFloat64, MachineSemantic::kNone); return MachineType(MachineRepresentation::kFloat64, MachineSemantic::kNone);
} }
static MachineType RepSimd128() {
return MachineType(MachineRepresentation::kSimd128, MachineSemantic::kNone);
}
static MachineType RepTagged() { static MachineType RepTagged() {
return MachineType(MachineRepresentation::kTagged, MachineSemantic::kNone); return MachineType(MachineRepresentation::kTagged, MachineSemantic::kNone);
} }
...@@ -187,6 +194,8 @@ inline int ElementSizeLog2Of(MachineRepresentation rep) { ...@@ -187,6 +194,8 @@ inline int ElementSizeLog2Of(MachineRepresentation rep) {
case MachineRepresentation::kWord64: case MachineRepresentation::kWord64:
case MachineRepresentation::kFloat64: case MachineRepresentation::kFloat64:
return 3; return 3;
case MachineRepresentation::kSimd128:
return 4;
case MachineRepresentation::kTagged: case MachineRepresentation::kTagged:
return kPointerSizeLog2; return kPointerSizeLog2;
default: default:
......
src/mips/assembler-mips.h
View file @ 6b6b005f
...@@ -304,6 +304,8 @@ struct FPUControlRegister { ...@@ -304,6 +304,8 @@ struct FPUControlRegister {
const FPUControlRegister no_fpucreg = { kInvalidFPUControlRegister }; const FPUControlRegister no_fpucreg = { kInvalidFPUControlRegister };
const FPUControlRegister FCSR = { kFCSRRegister }; const FPUControlRegister FCSR = { kFCSRRegister };
// TODO(mips) Define SIMD registers.
typedef DoubleRegister Simd128Register;
// ----------------------------------------------------------------------------- // -----------------------------------------------------------------------------
// Machine instruction Operands. // Machine instruction Operands.
......
src/mips64/assembler-mips64.h
View file @ 6b6b005f
...@@ -306,6 +306,8 @@ struct FPUControlRegister { ...@@ -306,6 +306,8 @@ struct FPUControlRegister {
const FPUControlRegister no_fpucreg = { kInvalidFPUControlRegister }; const FPUControlRegister no_fpucreg = { kInvalidFPUControlRegister };
const FPUControlRegister FCSR = { kFCSRRegister }; const FPUControlRegister FCSR = { kFCSRRegister };
// TODO(mips64) Define SIMD registers.
typedef DoubleRegister Simd128Register;
// ----------------------------------------------------------------------------- // -----------------------------------------------------------------------------
// Machine instruction Operands. // Machine instruction Operands.
......
src/ppc/assembler-ppc.h
View file @ 6b6b005f
...@@ -291,6 +291,9 @@ const CRegister cr13 = {13}; ...@@ -291,6 +291,9 @@ const CRegister cr13 = {13};
const CRegister cr14 = {14}; const CRegister cr14 = {14};
const CRegister cr15 = {15}; const CRegister cr15 = {15};
// TODO(ppc) Define SIMD registers.
typedef DoubleRegister Simd128Register;
// ----------------------------------------------------------------------------- // -----------------------------------------------------------------------------
// Machine instruction Operands // Machine instruction Operands
......
src/types.h
View file @ 6b6b005f
...@@ -151,20 +151,21 @@ namespace internal { ...@@ -151,20 +151,21 @@ namespace internal {
// clang-format off // clang-format off
#define MASK_BITSET_TYPE_LIST(V) \ #define MASK_BITSET_TYPE_LIST(V) \
V(Representation, 0xff800000u) \ V(Representation, 0xffc00000u) \
V(Semantic, 0x007ffffeu) V(Semantic, 0x003ffffeu)
#define REPRESENTATION(k) ((k) & BitsetType::kRepresentation) #define REPRESENTATION(k) ((k) & BitsetType::kRepresentation)
#define SEMANTIC(k) ((k) & BitsetType::kSemantic) #define SEMANTIC(k) ((k) & BitsetType::kSemantic)
#define REPRESENTATION_BITSET_TYPE_LIST(V) \ #define REPRESENTATION_BITSET_TYPE_LIST(V) \
V(None, 0) \ V(None, 0) \
V(UntaggedBit, 1u << 23 | kSemantic) \ V(UntaggedBit, 1u << 22 | kSemantic) \
V(UntaggedIntegral8, 1u << 24 | kSemantic) \ V(UntaggedIntegral8, 1u << 23 | kSemantic) \
V(UntaggedIntegral16, 1u << 25 | kSemantic) \ V(UntaggedIntegral16, 1u << 24 | kSemantic) \
V(UntaggedIntegral32, 1u << 26 | kSemantic) \ V(UntaggedIntegral32, 1u << 25 | kSemantic) \
V(UntaggedFloat32, 1u << 27 | kSemantic) \ V(UntaggedFloat32, 1u << 26 | kSemantic) \
V(UntaggedFloat64, 1u << 28 | kSemantic) \ V(UntaggedFloat64, 1u << 27 | kSemantic) \
V(UntaggedSimd128, 1u << 28 | kSemantic) \
V(UntaggedPointer, 1u << 29 | kSemantic) \ V(UntaggedPointer, 1u << 29 | kSemantic) \
V(TaggedSigned, 1u << 30 | kSemantic) \ V(TaggedSigned, 1u << 30 | kSemantic) \
V(TaggedPointer, 1u << 31 | kSemantic) \ V(TaggedPointer, 1u << 31 | kSemantic) \
......
src/x64/assembler-x64.h
View file @ 6b6b005f
...@@ -248,6 +248,8 @@ const DoubleRegister no_double_reg = {DoubleRegister::kCode_no_reg}; ...@@ -248,6 +248,8 @@ const DoubleRegister no_double_reg = {DoubleRegister::kCode_no_reg};
typedef DoubleRegister XMMRegister; typedef DoubleRegister XMMRegister;
typedef DoubleRegister Simd128Register;
enum Condition { enum Condition {
// any value < 0 is considered no_condition // any value < 0 is considered no_condition
no_condition = -1, no_condition = -1,
......
src/x87/assembler-x87.h
View file @ 6b6b005f
...@@ -186,6 +186,9 @@ const DoubleRegister no_double_reg = {DoubleRegister::kCode_no_reg}; ...@@ -186,6 +186,9 @@ const DoubleRegister no_double_reg = {DoubleRegister::kCode_no_reg};
typedef DoubleRegister X87Register; typedef DoubleRegister X87Register;
// TODO(x87) Define SIMD registers.
typedef DoubleRegister Simd128Register;
enum Condition { enum Condition {
// any value < 0 is considered no_condition // any value < 0 is considered no_condition
no_condition = -1, no_condition = -1,
......
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