Skip to content

V
V8
Switch branch/tag
  1. 07 Sep, 2010 1 commit
  3. 27 Aug, 2010 1 commit
  5. 25 Aug, 2010 1 commit
  7. 13 Aug, 2010 1 commit
  9. 30 Jul, 2010 1 commit
  11. 29 Jul, 2010 2 commits
  13. 09 Jun, 2010 1 commit
  15. 08 Jun, 2010 1 commit
    • sgjesse@chromium.org's avatar
      More precise break points and stepping when debugging · 634fb915
      sgjesse@chromium.org authored 
      Added support for more precise break points when debugging and stepping. To achieve that additional nop instructions are inserted where breaking would otherwise be impossible. The number of nop instructions inserted are sufficient to make place for patching with a call to a debug break code stub. On Intel that is 5 nop's for 32-bit and 13 for 64-bit. Om ARM 3 nop instructions (12 bytes) are required.

In order to avoid inserting nop's in to many places a simple ast checker have been added to check whether there are breakable code in a statement or expression. If it is possible to break in an expression no additional break enabeling code is inserted.

Added break locations to the true and false part of a conditional expression.

Added stepping tests to cover more constructs.

These changes are only in the full compiler.

Changed the default value for the option --debugger in teh d8 shell from true to false. The reason for this is that with --debugger turned on the full compiler will be used for all code in when running d8, which can be unexpeceted.

Review URL: http://codereview.chromium.org/2693002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4820 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
      634fb915
  17. 18 May, 2010 1 commit
    • sgjesse@chromium.org's avatar
      ARM: Pass arguments to keyed store IC in registers · d25c36de
      sgjesse@chromium.org authored 
      The calling convention for keyed store IC on ARM is changed to receive the arguments value, key and receiver in registers r0, r1 and r2 instead of on the stack. When calling keyed store IC with a virtual frame the arguments are passed through the virtual frame and consumed by the call.

Changed the register usage in the IC code to postpone spilling the registers holding value, key and receiver to the stack until making  a call into the runtime system.

Runs all the tests with: 

  --special-command="@ --nofull-compiler"
  --special-command="@ --always-full-compiler"
  --special-command="@ --noenable-vfp3"
Review URL: http://codereview.chromium.org/2116003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4668 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
      d25c36de
  19. 17 May, 2010 1 commit
    • mark@chromium.org's avatar
      Allow build-time selection between ia32 and x86_64 in the GYP/Xcode Mac · e9b5d785
      mark@chromium.org authored 
      Chromium build.

v8.gyp no longer sets any V8_TARGET_ARCH_* macro on the Mac. Instead, the
proper V8_TARGET_ARCH_* macro will be set by src/globals.h in the same way as
the V8_HOST_ARCH_* macro when it detects that no target macro is currently
defined. The Mac build will attempt to compile all ia32 and x86_64 .cc files.
#ifdef guards in each of these target-specific source files prevent their
compilation when the associated target is not selected. For completeness,
these #ifdef guards are also provided for the arm and mips .cc files.

BUG=706
TEST=x86_64 Mac GYP/Xcode-based Chromium build (still depends on other changes)
Review URL: http://codereview.chromium.org/2133003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4666 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
      e9b5d785
  21. 05 May, 2010 1 commit
  23. 27 Apr, 2010 1 commit
  25. 06 Apr, 2010 1 commit
  27. 19 Mar, 2010 1 commit
  29. 10 Feb, 2010 1 commit
  31. 02 Feb, 2010 1 commit
  33. 29 Jan, 2010 1 commit
  35. 30 Nov, 2009 1 commit
  37. 04 Nov, 2009 1 commit
  39. 15 Oct, 2009 1 commit
  41. 14 Sep, 2009 1 commit
    • sgjesse@chromium.org's avatar
      Implemented missing pieces of the debugger for ARM. · 34d6ff76
      sgjesse@chromium.org authored 
      The main piece of this change was to add support for break on return for ARM. On ARM the normal js function return consist of the following code sequence.

  mov sp, fp
  ldmia sp!, {fp, lr}
  add sp, sp, #4
  bx lr

to a call to the debug break return entry code using the following code sequence

  mov lr, pc
  ldr pc, [pc, #-4]
  <debug break return entry code entry point address>
  bktp 0

The values of Assembler::kPatchReturnSequenceLength and Assembler::kPatchReturnSequenceLength are somewhat misleading, but they fit the current use in the debugger. Also Assembler::kPatchReturnSequenceLength is used in the IC code as well (for something which is not related to return sequences at all). I will change that in a separate changelist.

For the debugger to work also added recording of the return sequence in the relocation info and handling of source position recording when a function ends with a return statement.

Used the constant kInstrSize instead of sizeof(Instr).

Passes all debugger tests on both simulator and hardware (only release mode tested on hardware).
Review URL: http://codereview.chromium.org/199075

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2879 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
      34d6ff76
  43. 09 Sep, 2009 1 commit
  45. 25 May, 2009 1 commit
  47. 23 Apr, 2009 1 commit
  49. 21 Apr, 2009 1 commit
  51. 20 Apr, 2009 1 commit
  53. 16 Apr, 2009 1 commit
  55. 13 Feb, 2009 1 commit
  57. 09 Feb, 2009 1 commit
  59. 09 Dec, 2008 1 commit