Commit 4446355c authored by sgjesse@chromium.org's avatar sgjesse@chromium.org

ARM: Fix bug in r4820 related to code for additional break positions.

These issues where unly revealed in debug mode
Review URL: http://codereview.chromium.org/2733006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4827 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
parent e5bdf01d
......@@ -116,9 +116,10 @@ Address* RelocInfo::target_reference_address() {
Address RelocInfo::call_address() {
ASSERT(IsPatchedReturnSequence());
// The 2 instructions offset assumes patched return sequence.
ASSERT(IsJSReturn(rmode()));
// The 2 instructions offset assumes patched debug break slot or return
// sequence.
ASSERT((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
return Memory::Address_at(pc_ + 2 * Assembler::kInstrSize);
}
......
......@@ -263,7 +263,9 @@ void Debug::GenerateStubNoRegistersDebugBreak(MacroAssembler* masm) {
void Debug::GenerateSlot(MacroAssembler* masm) {
// Generate enough nop's to make space for a call instruction.
// Generate enough nop's to make space for a call instruction. Avoid emitting
// the constant pool in the debug break slot code.
Assembler::BlockConstPoolScope block_const_pool(masm);
Label check_codesize;
__ bind(&check_codesize);
__ RecordDebugBreakSlot();
......
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