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  1. 13 Jul, 2011 4 commits
    • mikhail.naganov@gmail.com's avatar
      Clean up conditionals in tests after r8622. · e4f7860a
      mikhail.naganov@gmail.com authored 
      R=sgjesse@chromium.org
BUG=
TEST=

Review URL: http://codereview.chromium.org/7353015

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8625 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
      e4f7860a
    • sgjesse@chromium.org's avatar
      Make fast tls the default · 8b684b9a
      sgjesse@chromium.org authored 
      Now V8_NO_FAST_TLS needs to be defined to switch off fast tls access on platform which supports it.

R=ager@chromium.org

BUG=none
TEST=none

Review URL: http://codereview.chromium.org//7350017

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8624 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
      8b684b9a
    • sgjesse@chromium.org's avatar
      Avoid patching code after the call to binary operation stub in optimized code · 620d50af
      sgjesse@chromium.org authored 
      This patch just adds a nop after the call to the binary operation stub in optimized code to avoid the patching for the inlined smi case used in the full code generator to kick in if the next instruction generated by the lithium code generator should accidentially enable that. For calls generated by CallCodeGeneric this was already handled on Intel platforms, but missing on ARM.

On IA-32 I did also try to check for whether the code containing the call was optimized (patch below), but that caused regressions on some benchmarks.

diff --git src/ia32/ic-ia32.cc src/ia32/ic-ia32.cc
index 5f143b1..f70e208 100644
--- src/ia32/ic-ia32.cc
+++ src/ia32/ic-ia32.cc
@@ -1603,12 +1603,18 @@ void CompareIC::UpdateCaches(Handle<Object> x, Handle<Object> y) {

   // Activate inlined smi code.
   if (previous_state == UNINITIALIZED) {
-    PatchInlinedSmiCode(address());
+    PatchInlinedSmiCode(address(), isolate());
   }
 }

-void PatchInlinedSmiCode(Address address) {
+void PatchInlinedSmiCode(Address address, Isolate* isolate) {
+  // Never patch in optimized code.
+  Code* code = isolate->pc_to_code_cache()->GetCacheEntry(address)->code;
+  if (code->kind() == Code::OPTIMIZED_FUNCTION) {
+    return;
+  }
+
   // The address of the instruction following the call.
   Address test_instruction_address =
       address + Assembler::kCallTargetAddressOffset;
diff --git src/ic.cc src/ic.cc
index f70f75a..62e79da 100644
--- src/ic.cc
+++ src/ic.cc
@@ -2384,7 +2384,7 @@ RUNTIME_FUNCTION(MaybeObject*, BinaryOp_Patch) {

     // Activate inlined smi code.
     if (previous_type == BinaryOpIC::UNINITIALIZED) {
-      PatchInlinedSmiCode(ic.address());
+      PatchInlinedSmiCode(ic.address(), isolate);
     }
   }

diff --git src/ic.h src/ic.h
index 11c2e3a..9ef4b20 100644
--- src/ic.h
+++ src/ic.h
@@ -721,7 +721,7 @@ class CompareIC: public IC {
 };

 // Helper for BinaryOpIC and CompareIC.
-void PatchInlinedSmiCode(Address address);
+void PatchInlinedSmiCode(Address address, Isolate* isolate);

 } }  // namespace v8::internal

R=danno@chromium.org

BUG=none
TEST=none

Review URL: http://codereview.chromium.org//7350015

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8623 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
      620d50af
    • sgjesse@chromium.org's avatar
      Remove the ability to compile without logging and profiling · 8a6108de
      sgjesse@chromium.org authored 
      The preprocessor defines ENABLE_LOGGING_AND_PROFILING and ENABLE_VMSTATE_TRACKING has been removed as these where required to be turned on for Crankshaft to work. To re-enable reducing the binary size by leaving out heap and CPU profiler a new set of defines needs to be created.

R=ager@chromium.org

BUG=v8:1271
TEST=all

Review URL: http://codereview.chromium.org//7350014

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8622 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
      8a6108de
  3. 12 Jul, 2011 3 commits
  5. 11 Jul, 2011 17 commits
  7. 09 Jul, 2011 1 commit
  9. 08 Jul, 2011 11 commits
  11. 07 Jul, 2011 4 commits