- 26 Jul, 2016 1 commit
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bmeurer authored
So far we didn't really recognize leaq, but only leal instructions in the x64 InstructionSelector. Now that we actually generate more of them, we should also pay more attention to those. R=epertoso@chromium.org Review-Url: https://codereview.chromium.org/2186573002 Cr-Commit-Position: refs/heads/master@{#38055}
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- 25 Jul, 2016 1 commit
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jarin authored
BUG=chromium:630611 Review-Url: https://codereview.chromium.org/2177483002 Cr-Commit-Position: refs/heads/master@{#37994}
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- 22 Jul, 2016 2 commits
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ivica.bogosavljevic authored
Implement UnalignedLoad and UnalignedStore optional turbofan operators and use them in WasmCompiler for unaligned memory access. BUG= Review-Url: https://codereview.chromium.org/2122853002 Cr-Commit-Position: refs/heads/master@{#37988}
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bmeurer authored
So far we don't have a useful way to inline Math.max or Math.min in TurboFan optimized code. This adds new operators NumberMax and NumberMin and changes the Float64Max/Float64Min operators to have JavaScript semantics instead of the C++ semantics that it had previously. This also removes support for recognizing the tenary case in the CommonOperatorReducer, since that doesn't seem to have any positive impact (and actually doesn't show up in regular JavaScript, where people use Math.max/Math.min instead). Drive-by-fix: Also nuke the unused Float32Max/Float32Min operators. R=jarin@chromium.org Review-Url: https://codereview.chromium.org/2170343002 Cr-Commit-Position: refs/heads/master@{#37971}
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- 18 Jul, 2016 1 commit
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bmeurer authored
So far TurboFan wasn't adding the deoptimization reasons for eager/soft deoptimization exits that can be used by either the DevTools profiler or the --trace-deopt flag. This adds basic support for deopt reasons on Deoptimize, DeoptimizeIf and DeoptimizeUnless nodes and threads through the reasons to the code generation. Also moves the DeoptReason to it's own file (to resolve include cycles) and drops unused reasons. R=jarin@chromium.org Review-Url: https://codereview.chromium.org/2161543002 Cr-Commit-Position: refs/heads/master@{#37823}
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- 15 Jul, 2016 1 commit
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ssanfilippo authored
This commit introduces support for writing unwinding tables in the .eh_frame format, to be inserted in the jitdump read by Linux perf and emitted with FLAG_perf_prof and FLAG_perf_prof_unwinding_info enabled. x64 is fully implemented and tested, arm and arm64 are untested and the unwinding information needs to be expanded, but the mechanism is ready. BUG=v8:4899 LOG=N Review-Url: https://codereview.chromium.org/2026313002 Cr-Commit-Position: refs/heads/master@{#37799}
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- 14 Jul, 2016 1 commit
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mvstanton authored
BUG= Review-Url: https://codereview.chromium.org/2101123005 Cr-Commit-Position: refs/heads/master@{#37748}
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- 13 Jul, 2016 2 commits
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bbudge authored
Revert of [Turbofan] Change AlignSavedCalleeRegisterSlots to AlignFrame. (patchset #2 id:20001 of https://codereview.chromium.org/2124983004/ ) Reason for revert: Speculative revert to fix perf regression: https://bugs.chromium.org/p/chromium/issues/detail?id=627803 Original issue's description: > [Turbofan] Change AlignSavedCalleeRegisterSlots to AlignFrame. > Clean up call sites. > > LOG=N > BUG=v8:4124 > > Committed: https://crrev.com/d8d75782fb90da21b92ca3dda59cfa3088ad3912 > Cr-Commit-Position: refs/heads/master@{#37650} TBR=bmeurer@chromium.org,mtrofin@chromium.org,danno@chromium.org # Not skipping CQ checks because original CL landed more than 1 days ago. BUG=v8:4124 Review-Url: https://codereview.chromium.org/2151563003 Cr-Commit-Position: refs/heads/master@{#37732}
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danno authored
Previously, the following schedule fragment: 1: Parameter[0](0) 2: Parameter[1](0) 7: Int32Constant[1] 8: Int32Sub(2, 7) 9: Load[kRepTagged|kTypeAny](1, 8) would generate the following code (on ia32): mov eax,[ebp+0x8] mov ecx,[ebp+0xc] sub eax,0x1 mov eax,[eax+ecx*1] Now it generates: mov eax,[ebp+0x8] mov ecx,[ebp+0xc] mov eax,[eax+ecx*1-1] Similar pattern matching also now works on x64. BUG=v8:5192 LOG=N Review-Url: https://codereview.chromium.org/2137323003 Cr-Commit-Position: refs/heads/master@{#37701}
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- 12 Jul, 2016 1 commit
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bbudge authored
LOG=N BUG=v8:4124 Review-Url: https://codereview.chromium.org/2144613002 Cr-Commit-Position: refs/heads/master@{#37684}
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- 11 Jul, 2016 3 commits
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bbudge authored
LOG=N BUG=v8:4124 Review-Url: https://codereview.chromium.org/2139513002 Cr-Commit-Position: refs/heads/master@{#37654}
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bbudge authored
Clean up call sites. LOG=N BUG=v8:4124 Review-Url: https://codereview.chromium.org/2124983004 Cr-Commit-Position: refs/heads/master@{#37650}
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danno authored
By adding MachineType to LinkageLocation, it is possible not only to reason about the location of a LinkageLocation on the stack, but also about it's size. This will be useful in follow-on CLs that attempt to merge some of the parameter passing logic of tail calls and normal (non-tail) calls. As a nice side-effect, it is no longer necessary to separately keep a MachineSignature in a CallDescriptor, because the MachineTypes contianed in LinkageLocation for all of the Descriptor's parameters and return types are sufficient. This CL therefore removes the MachineSignature from the CallDescriptor and adjusts all the calling code accordingly, simplifying and de-duplicating code in a bunch of places. R=titzer@chromium.org, bmeurer@chromium.org LOG=N Review-Url: https://codereview.chromium.org/2124023003 Cr-Commit-Position: refs/heads/master@{#37633}
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- 01 Jul, 2016 2 commits
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danno authored
This optimizes the passing of stack parameters in function calls. For some architectures (ia32/x64), using pushes when possible instead of bumping the stack and then storing parameters generates much smaller code, and in some cases is faster (e.g. when a push of a memory location can implement a memory-to-memory copy and thus elide an intermediate load. On others (e.g. ARM), the benefit is smaller, where it's only possible to elide direct stack pointer adjustment in certain cases or combine multiple register stores into a single instruction in other limited situations. On yet other platforms (ARM64, MIPS), there are no push instructions, and this optimization isn't used at all. Ideally, this mechanism would be used for both tail calls and normal calls, but "normal" calls are currently pretty efficient, and tail calls are very inefficient, so this CL sets the bar low for building a new mechanism to handle parameter pushing that only needs to raise the bar on tail calls for now. The key aspect of this change is that adjustment to the stack pointer for tail calls (and perhaps later real calls) is an explicit step separate from instruction selection and gap resolution, but aware of both, making it possible to safely recognize gap moves that are actually pushes. Review-Url: https://codereview.chromium.org/2082263002 Cr-Commit-Position: refs/heads/master@{#37477}
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bmeurer authored
Import fdlibm versions of acos, acosh, asin and asinh, which are more precise and produce the same result across platforms (we were using libm versions for asin and acos so far, where both speed and precision depended on the operating system so far). Introduce appropriate TurboFan operators for these functions and use them both for inlining and for the generic builtin. Also migrate the Math.imul and Math.fround builtins to TurboFan builtins to ensure that their behavior is always exactly the same as the inlined TurboFan version (i.e. C++ truncation semantics for double to float don't necessarily meet the JavaScript semantics). For completeness, also migrate Math.sign, which can even get some nice love in TurboFan. Drive-by-fix: Some alpha-sorting on the Math related functions, and cleanup the list of Math intrinsics that we have to export via the native context currently. BUG=v8:3266,v8:3496,v8:3509,v8:3952,v8:5169,v8:5170,v8:5171,v8:5172 TBR=rossberg@chromium.org R=franzih@chromium.org Review-Url: https://codereview.chromium.org/2116753002 Cr-Commit-Position: refs/heads/master@{#37476}
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- 30 Jun, 2016 1 commit
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mvstanton authored
BUG=v8:5086 Review-Url: https://codereview.chromium.org/2083573002 Cr-Commit-Position: refs/heads/master@{#37424}
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- 28 Jun, 2016 1 commit
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bmeurer authored
Introduce a new machine operator Float64Pow that for now is backed by the existing MathPowStub to start the unification of Math.pow, and at the same time address the main performance issue that TurboFan still has with the imaging-darkroom benchmark in Kraken. Also migrate the Math.pow builtin itself to a TurboFan builtin and remove a few hundred lines of hand-written platform code for special handling of the fullcodegen Math.pow version. BUG=v8:3599,v8:5086,v8:5157 Review-Url: https://codereview.chromium.org/2103733003 Cr-Commit-Position: refs/heads/master@{#37323}
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- 20 Jun, 2016 1 commit
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bmeurer authored
Import base::ieee754::tan() from fdlibm and introduce Float64Tan TurboFan operator based on that, similar to what we do for Float64Cos and Float64Sin. Rewrite Math.tan() as TurboFan builtin and use those operators to also inline Math.tan() into optimized TurboFan functions. Drive-by-fix: Kill the %_ConstructDouble intrinsics, and provide only the %ConstructDouble runtime entry for writing tests. BUG=v8:5086,v8:5126 R=yangguo@chromium.org Review-Url: https://codereview.chromium.org/2083453002 Cr-Commit-Position: refs/heads/master@{#37087}
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- 17 Jun, 2016 3 commits
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bmeurer authored
Import base::ieee754::cos() and base::ieee754::sin() from fdlibm and introduce Float64Cos and Float64Sin TurboFan operator based on that, similar to what we do for Float64Log. Rewrite Math.cos() and Math.sin() as TurboFan builtins and use those operators to also inline Math.cos() and Math.sin() into optimized TurboFan functions. CQ_INCLUDE_TRYBOTS=tryserver.chromium.linux:linux_chromium_rel_ng;tryserver.blink:linux_blink_rel R=mvstanton@chromium.org BUG=v8:5086,v8:5118 Review-Url: https://codereview.chromium.org/2073123002 Cr-Commit-Position: refs/heads/master@{#37072}
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mvstanton authored
BUG=v8:5103 Review-Url: https://codereview.chromium.org/2068743002 Cr-Commit-Position: refs/heads/master@{#37058}
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bmeurer authored
Import base::ieee754::exp() from FreeBSD msun and introduce a Float64Exp TurboFan operator based on that, similar to what we do for Float64Log. Rewrite Math.exp() as TurboFan builtin and use that operator to also inline Math.exp() into optimized TurboFan functions. CQ_INCLUDE_TRYBOTS=tryserver.chromium.linux:linux_chromium_rel_ng;tryserver.blink:linux_blink_rel BUG=v8:3266,v8:3468,v8:3493,v8:5086,v8:5108,chromium:620786 R=mvstanton@chromium.org Committed: https://crrev.com/93e26314afc9da9b5b8bd998688262444ed73260 Review-Url: https://codereview.chromium.org/2077533002 Cr-Original-Commit-Position: refs/heads/master@{#37037} Cr-Commit-Position: refs/heads/master@{#37047}
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- 16 Jun, 2016 3 commits
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machenbach authored
Revert of [builtins] Introduce proper Float64Exp operator. (patchset #5 id:80001 of https://codereview.chromium.org/2077533002/ ) Reason for revert: [Sheriff] Leads to some different rounding as it seems in some audio layout tests. Please rebase upstream first if intended: https://build.chromium.org/p/client.v8.fyi/builders/V8-Blink%20Linux%2064/builds/7508 Original issue's description: > [builtins] Introduce proper Float64Exp operator. > > Import base::ieee754::exp() from FreeBSD msun and introduce a Float64Exp > TurboFan operator based on that, similar to what we do for Float64Log. > Rewrite Math.exp() as TurboFan builtin and use that operator to also > inline Math.exp() into optimized TurboFan functions. > > BUG=v8:3266,v8:3468,v8:3493,v8:5086,v8:5108 > R=mvstanton@chromium.org > > Committed: https://crrev.com/93e26314afc9da9b5b8bd998688262444ed73260 > Cr-Commit-Position: refs/heads/master@{#37037} TBR=mvstanton@chromium.org,ahaas@chromium.org,bmeurer@chromium.org # Skipping CQ checks because original CL landed less than 1 days ago. NOPRESUBMIT=true NOTREECHECKS=true NOTRY=true BUG=v8:3266,v8:3468,v8:3493,v8:5086,v8:5108 Review-Url: https://codereview.chromium.org/2070813002 Cr-Commit-Position: refs/heads/master@{#37039}
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bmeurer authored
Import base::ieee754::exp() from FreeBSD msun and introduce a Float64Exp TurboFan operator based on that, similar to what we do for Float64Log. Rewrite Math.exp() as TurboFan builtin and use that operator to also inline Math.exp() into optimized TurboFan functions. BUG=v8:3266,v8:3468,v8:3493,v8:5086,v8:5108 R=mvstanton@chromium.org Review-Url: https://codereview.chromium.org/2077533002 Cr-Commit-Position: refs/heads/master@{#37037}
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mvstanton authored
BUG=v8:5095 Review-Url: https://codereview.chromium.org/2063693002 Cr-Commit-Position: refs/heads/master@{#37035}
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- 15 Jun, 2016 1 commit
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mtrofin authored
Only Intel needed changes, arm and mips work as expected. BUG= Review-Url: https://codereview.chromium.org/2061833003 Cr-Commit-Position: refs/heads/master@{#37011}
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- 14 Jun, 2016 2 commits
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mtrofin authored
Support for relocatable globals, to facilitate compilation before instantiation. BUG=v8:5072 Review-Url: https://codereview.chromium.org/2062003002 Cr-Commit-Position: refs/heads/master@{#36978}
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jarin authored
This introduces SilenceNaN operator, which makes sure that we only store quiet NaNs into holey arrays. We omit the NaN silencing code at instruction selection time if the input is an operation that cannot possibly produce signalling NaNs. BUG= Review-Url: https://codereview.chromium.org/2060233002 Cr-Commit-Position: refs/heads/master@{#36950}
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- 13 Jun, 2016 2 commits
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bmeurer authored
Import base::ieee754::atan() and base::ieee754::atan2() from fdlibm and introduce Float64Atan and Float64Atan2 TurboFan operators based on those, similar to what we already did for Float64Log and Float64Log1p. Rewrite Math.atan() and Math.atan2() as TurboFan builtin and use the operators to also inline Math.atan() and Math.atan2() into optimized TurboFan functions. R=yangguo@chromium.org BUG=v8:5086,v8:5095 Review-Url: https://codereview.chromium.org/2065503002 Cr-Commit-Position: refs/heads/master@{#36916}
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bmeurer authored
Import base::ieee754::log1p() from fdlibm and introduce a Float64Log1p TurboFan operator based on that, similar to what we do for Float64Log. Rewrite Math.log1p() as TurboFan builtin and use that operator to also inline Math.log1p() into optimized TurboFan functions. Also unify the handling of the special IEEE 754 functions somewhat in the TurboFan backends. At some point we can hopefully express this completely in the InstructionSelector (once we have an idea what to do with the ST(0) return issue on IA-32/X87). Drive-by-fix: Add some more test coverage for the log function. R=yangguo@chromium.org BUG=v8:5086,v8:5092 Review-Url: https://codereview.chromium.org/2060743002 Cr-Commit-Position: refs/heads/master@{#36914}
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- 10 Jun, 2016 1 commit
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bmeurer authored
This switches Math.log to use an fdlibm based version of log, imported as base::ieee754::log, and use that consistently everywhere, i.e. change the Float64Log TurboFan operators on Intel to use the C++ implementation as well (same for Crankshaft). R=yangguo@chromium.org BUG=v8:5065,v8:5086 Review-Url: https://codereview.chromium.org/2053893003 Cr-Commit-Position: refs/heads/master@{#36880}
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- 09 Jun, 2016 1 commit
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danno authored
Review-Url: https://codereview.chromium.org/2056503003 Cr-Commit-Position: refs/heads/master@{#36842}
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- 03 Jun, 2016 1 commit
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bmeurer authored
Introduce a dedicated Float64Log machine operator, that is either implemented by a direct C call or by platform specific code, i.e. using the FPU on x64 and ia32. This operator is used to implement Math.log as a proper TurboFan builtin on top of the CodeStubAssembler. Also introduce a NumberLog simplified operator on top of Float64Log and use that for the fast inline path of Math.log inside TurboFan optimized code. BUG=v8:5065 Review-Url: https://codereview.chromium.org/2029413005 Cr-Commit-Position: refs/heads/master@{#36703}
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- 01 Jun, 2016 1 commit
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bmeurer authored
The idea is to make it easier (cheaper) to call into C/C++ directly with C calling conventions, which require xmm0 to be used to pass and return floating point values in the future. R=jarin@chromium.org Review-Url: https://codereview.chromium.org/2023763010 Cr-Commit-Position: refs/heads/master@{#36646}
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- 27 May, 2016 2 commits
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bbudge authored
Rename some methods to reflect the fact that there are multiple FP machine representations. LOG=N BUG=v8:4124 Review-Url: https://codereview.chromium.org/2013193002 Cr-Commit-Position: refs/heads/master@{#36552}
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georgia.kouveli authored
Adding optional operators for FNeg for WebAssembly, as the current implementation was significantly suboptimal for ARM. Review-Url: https://codereview.chromium.org/2011303002 Cr-Commit-Position: refs/heads/master@{#36544}
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- 24 May, 2016 1 commit
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epertoso authored
[x64/ia32] Deal with the non-transitivity of InstructionSelector::CanCover() when folding loads into branches. Sequences like: 1: Load[kRepWord32|kTypeInt32](<address>, ...) 2: Word32And(1, <constant>) 3: Word32Equal(2, <another constant>) 4: Store[(kRepWord32 : NoWriteBarrier)](<address>, <value>) 5: Branch[None](3, ...) -> B1, B2 where #1 and #4 refer to the same memory location, are problematic because in VisitBranch we assume that 'InstructionSelector::CanCover()' is transitive. What happens is that CanCover(5, 3) is true (3 is a pure op), and so are CanCover(3, 2), CanCover(2, 1), but the effect level of 5 and 3 never gets checked because 3 is a pure op. Upon VisitBranch, we ended up materializing: mov [address], <value> test [address], <another constant> With this patch, it becomes: mov reg, [address] mov [address], <value> test reg, <another constant> BUG=chromium:611976 Review-Url: https://codereview.chromium.org/2008493002 Cr-Commit-Position: refs/heads/master@{#36482}
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- 20 May, 2016 2 commits
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ivica.bogosavljevic authored
combination of LoadByte/Shift/Or and StoreByte/Shift/And. BUG= Review-Url: https://codereview.chromium.org/1928513002 Cr-Commit-Position: refs/heads/master@{#36422}
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titzer authored
Revert of [turbofan] Take the immediate size in account when narrowing ia32/x64 word comparison operators. (patchset #1 id:1 of https://codereview.chromium.org/1968453002/ ) Reason for revert: Breaks a KCS demo: BUG=chromium:611976 Original issue's description: > [turbofan] Take the immediate size in account when narrowing ia32/x64 word comparison operators. > > Trying to re-land http://crrev.com/1948453002 after fixing assembler-x64.cc in http://crrev.com/1962563003. > > Before this patch, we would emit a cmp or test with a memory operand only if both of the operands in the IR were loads. Now if either of them is a load and the other one is an immediate, we can use a memory operand if the load representation machine size is wide enough to represent the latter. > > Committed: https://crrev.com/2da70f853d7f680d491c37c72d5ef04a85497ba9 > Cr-Commit-Position: refs/heads/master@{#36136} TBR=bmeurer@chromium.org,epertoso@chromium.org # Not skipping CQ checks because original CL landed more than 1 days ago. Review-Url: https://codereview.chromium.org/1995303003 Cr-Commit-Position: refs/heads/master@{#36413}
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- 19 May, 2016 1 commit
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danno authored
Review-Url: https://codereview.chromium.org/1995543003 Cr-Commit-Position: refs/heads/master@{#36355}
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- 12 May, 2016 1 commit
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ahaas authored
The operators are needed because the wasm spec requires that nan bits are preserved. R=titzer@chromium.org Review-Url: https://codereview.chromium.org/1973493003 Cr-Commit-Position: refs/heads/master@{#36212}
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