- 19 Jan, 2021 1 commit
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Junliang Yan authored
Change-Id: I42ff5501bec10ef5230ea06d5feb9adc5be0d875 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2633731Reviewed-by:
Milad Fa <mfarazma@redhat.com> Commit-Queue: Junliang Yan <junyan@redhat.com> Cr-Commit-Position: refs/heads/master@{#72157}
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- 18 Jan, 2021 1 commit
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Junliang Yan authored
Change-Id: Ia8e8600cabb7e317befca480e734915239e10f69 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2634828Reviewed-by:
Milad Fa <mfarazma@redhat.com> Commit-Queue: Junliang Yan <junyan@redhat.com> Cr-Commit-Position: refs/heads/master@{#72135}
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- 13 Jan, 2021 4 commits
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Junliang Yan authored
Change-Id: I46d7d6e876351ddd75224090d9645877d1cb244b Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2627868Reviewed-by:
Milad Fa <mfarazma@redhat.com> Commit-Queue: Junliang Yan <junyan@redhat.com> Cr-Commit-Position: refs/heads/master@{#72081}
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Junliang Yan authored
Change-Id: Iec2fdaf3f180e6e59e40a558bf85a41cd96826ee Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2626464Reviewed-by:
Milad Fa <mfarazma@redhat.com> Commit-Queue: Junliang Yan <junyan@redhat.com> Cr-Commit-Position: refs/heads/master@{#72071}
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Milad Fa authored
Port 8c52f66f Original Commit Message: Implement these 4 instructions for x64 Liftoff: - i64x2.widen_low_i32x4_s - i64x2.widen_high_i32x4_s - i64x2.widen_low_i32x4_u - i64x2.widen_high_i32x4_u We move the codegen for the *high* instructions into macro-assembler to allow sharing of the optimized code sequence between TurboFan and Liftoff. R=zhin@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com BUG= LOG=N Change-Id: I790860cbb0f9854c31959684712cde42254bde2b Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2625878Reviewed-by:
Junliang Yan <junyan@redhat.com> Commit-Queue: Milad Fa <mfarazma@redhat.com> Cr-Commit-Position: refs/heads/master@{#72070}
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Milad Fa authored
Port 6f521386 Original Commit Message: Create a macro-assembler helper function to enable code sharing between Liftoff and TurboFan. R=zhin@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com BUG= LOG=N Change-Id: I3e72ad3a2d7dfdd9737a5acd2416741c1d486306 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2625880Reviewed-by:
Junliang Yan <junyan@redhat.com> Commit-Queue: Milad Fa <mfarazma@redhat.com> Cr-Commit-Position: refs/heads/master@{#72069}
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- 12 Jan, 2021 1 commit
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Milad Fa authored
Port d6c4c884 R=zhin@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com BUG= LOG=N Change-Id: I99c91b49c1fda7e50fee7d9a204e9ade3e336220 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2623808Reviewed-by:
Junliang Yan <junyan@redhat.com> Commit-Queue: Milad Fa <mfarazma@redhat.com> Cr-Commit-Position: refs/heads/master@{#72047}
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- 11 Jan, 2021 1 commit
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Junliang Yan authored
Change-Id: Id077f3c85d0610d5da192a954c942208594f0377 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2622867Reviewed-by:
Milad Fa <mfarazma@redhat.com> Commit-Queue: Junliang Yan <junyan@redhat.com> Cr-Commit-Position: refs/heads/master@{#72017}
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- 08 Jan, 2021 2 commits
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Milad Fa authored
Port 5af79398 Original Commit Message: Prototype load lane instructions on Liftoff, only for x64. R=zhin@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com BUG= LOG=N Change-Id: If9429791139d08a3dd7548220b4eb28e99d6fc7e Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2618241Reviewed-by:
Junliang Yan <junyan@redhat.com> Commit-Queue: Milad Fa <mfarazma@redhat.com> Cr-Commit-Position: refs/heads/master@{#71986}
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Junliang Yan authored
Change-Id: I68ef1a97ac857106e014d561be3d7e845ec9fbdc Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2618280Reviewed-by:
Milad Fa <mfarazma@redhat.com> Commit-Queue: Junliang Yan <junyan@redhat.com> Cr-Commit-Position: refs/heads/master@{#71983}
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- 22 Dec, 2020 1 commit
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Milad Fa authored
Port 1215f2a8 Original Commit Message: The codegen is the same as on TurboFan, using Smull, Umull, Smull2, and Umull2. The rest of the changes are adding skeleton functions to the different archs, which bailout for now. Actual codegen will come in future patches. R=zhin@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com BUG= LOG=N Change-Id: I58bc84ede44a9c90e315d6dc3346ea09b31deaf7 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2600731Reviewed-by:
Junliang Yan <junyan@redhat.com> Commit-Queue: Milad Fa <mfarazma@redhat.com> Cr-Commit-Position: refs/heads/master@{#71863}
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- 21 Dec, 2020 1 commit
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Junliang Yan authored
Change-Id: Idb8948c3ff9209a6a41d0793cd2f5c1557b417df Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2598697Reviewed-by:
Milad Fa <mfarazma@redhat.com> Commit-Queue: Junliang Yan <junyan@redhat.com> Cr-Commit-Position: refs/heads/master@{#71851}
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- 16 Dec, 2020 2 commits
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Milad Fa authored
Port 3dffdf03 Original Commit Message: This adds support for the following instructions: ref.eq, array.new_with_rtt, array.new_default_with_rtt, array.get, array.set, array.len. R=jkummerow@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com BUG= LOG=N Change-Id: I5e517967648251f9babbabe4dc9148a5432aa58e Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2595927Reviewed-by:
Jakob Kummerow <jkummerow@chromium.org> Commit-Queue: Milad Fa <mfarazma@redhat.com> Cr-Commit-Position: refs/heads/master@{#71807}
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Andreas Haas authored
Registers are spilled differently on arm and intel platforms. Additionally, on arm64 registers are spilled with padding. Therefore the code for safepoint information for spilled registers is platform- dependent now. Additionally the alignment of the frame size is done before the out-of-line code now, so that the safepoint indices can be calculated correctly for spilled registers in out-of-line code. Finally, some code was unimplemented on ia32 and arm, which I added now. R=thibaudm@chromium.org Bug: v8:7581, v8:10929 Change-Id: Ia9b824dfc74cafa9ec3cc0d308fb18b485afd715 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2584952 Commit-Queue: Andreas Haas <ahaas@chromium.org> Reviewed-by:
Thibaud Michaud <thibaudm@chromium.org> Cr-Commit-Position: refs/heads/master@{#71786}
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- 15 Dec, 2020 1 commit
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Milad Fa authored
Port 5e18ab50 Original Commit Message: This adds support for the following instructions: br_on_null, ref.as_non_null, br_on_cast, i31.new R=jkummerow@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com BUG= LOG=N Change-Id: Ia234f2749e401feeaf68e6b7f0b1ba2403eaa77d Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2593648Reviewed-by:
Junliang Yan <junyan@redhat.com> Commit-Queue: Milad Fa <mfarazma@redhat.com> Cr-Commit-Position: refs/heads/master@{#71774}
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- 14 Dec, 2020 1 commit
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Junliang Yan authored
Change-Id: I232585076ecf6a824cdbe2e989eadaf96adcc1d8 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2587241Reviewed-by:
Milad Fa <mfarazma@redhat.com> Commit-Queue: Junliang Yan <junyan@redhat.com> Cr-Commit-Position: refs/heads/master@{#71737}
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- 10 Dec, 2020 1 commit
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Junliang Yan authored
a few unused functions Drive-By: Also clean up LoadSimd128 as LoadV128 and remove Change-Id: I4cdee0fcb1e153309492026b4334af27afba7ec1 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2584442 Commit-Queue: Junliang Yan <junyan@redhat.com> Reviewed-by:
Milad Fa <mfarazma@redhat.com> Cr-Commit-Position: refs/heads/master@{#71701}
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- 04 Dec, 2020 1 commit
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Junliang Yan authored
Change-Id: I982c0040b95a1495630034871389843e5248b221 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2572961 Commit-Queue: Junliang Yan <junyan@redhat.com> Reviewed-by:
Milad Fa <mfarazma@redhat.com> Cr-Commit-Position: refs/heads/master@{#71612}
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- 03 Dec, 2020 1 commit
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Junliang Yan authored
Change-Id: I611f5c7a41bc6d050ca36d1c011d47795bfc5abc Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2570033Reviewed-by:
Milad Fa <mfarazma@redhat.com> Commit-Queue: Junliang Yan <junyan@redhat.com> Cr-Commit-Position: refs/heads/master@{#71597}
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- 27 Nov, 2020 1 commit
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Junliang Yan authored
Change-Id: Idbcc6a0a261357e1680ece3e7946618b6577d78e Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2562125Reviewed-by:
Milad Fa <mfarazma@redhat.com> Commit-Queue: Junliang Yan <junyan@redhat.com> Cr-Commit-Position: refs/heads/master@{#71445}
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- 26 Nov, 2020 1 commit
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Junliang Yan authored
Because actual condition code used by s390/ppc does not distinguish between signed and unsigned, we need to use a generic enum class for liftoff which needs to deal with signed/unsigned case differently. Change-Id: Ia870dc30788037996dc1c65de0117eac7d941697 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2560603 Commit-Queue: Junliang Yan <junyan@redhat.com> Reviewed-by:
Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#71433}
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- 24 Nov, 2020 1 commit
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Milad Fa authored
Port 2180e20f Original Commit Message: The total frame size returned by GetTotalFrameSize includes the frame marker. However, the frame marker is pushed on the stack with a push instruction. Therefore it is not needed to allocate memory for it again on the stack. This CL therefore reduces the memory allocated on the stack by the size of the frame marker. R=ahaas@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com BUG= LOG=N Change-Id: I76e259d54703265fcf1a84857365997af008e16a Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2558257Reviewed-by:
Junliang Yan <junyan@redhat.com> Commit-Queue: Milad Fa <mfarazma@redhat.com> Cr-Commit-Position: refs/heads/master@{#71379}
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- 20 Nov, 2020 1 commit
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Milad Fa authored
Port 1da429fb Original Commit Message: This is a reland of 800307f6, with a minimal fix for arm64 (uint64_t -> uintptr_t). Original change's description: > [wasm][memory64] Prepare Liftoff for ptrsize offsets > > This CL prepares the LiftoffAssembler interface for uintptr_t offsets. > Many places can still only handle 32-bit values, but after this CL we can > start storing the offsets as uintptr_t in the memory access immediates. > Some TODOs are placed to extend code generation for 64-bit additions, if > memory64 is enabled. > All of this will be addressed in follow-up CLs. > > R=manoskouk@chromium.org > > Bug: v8:10949 > Change-Id: Id3b9b8aa555ab41f082ba012f4f8d80586c35b89 > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2529452 > Commit-Queue: Clemens Backes <clemensb@chromium.org> > Reviewed-by: Manos Koukoutos <manoskouk@chromium.org> > Cr-Commit-Position: refs/heads/master@{#71236} R=clemensb@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com BUG= LOG=N Change-Id: I87a421ab1fe6e4d0f2098c24ff34a3888631722e Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2552166Reviewed-by:
Junliang Yan <junyan@redhat.com> Commit-Queue: Milad Fa <mfarazma@redhat.com> Cr-Commit-Position: refs/heads/master@{#71317}
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- 22 Oct, 2020 1 commit
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Milad Fa authored
Port ba564604 Original Commit Message: The uint32_t type can easily be confused with the memory offsets that are currently 32 bit and will become 64 bit with the memory64 proposal. Since the offsets into the instance are always small anyway, the type of the integer does not really matter, and we should stick to the default 'int'. R=clemensb@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com BUG= LOG=N Change-Id: Icfc3b4172984c81355ca4b69b67433892cca7408 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2491107Reviewed-by:
Junliang Yan <junyan@redhat.com> Commit-Queue: Milad Fa <mfarazma@redhat.com> Cr-Commit-Position: refs/heads/master@{#70720}
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- 19 Oct, 2020 1 commit
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Milad Fa authored
Port 2bc52ff7 Original Commit Message: Implement i32x4.dot_i16x8_s for Liftoff on on ia32 and x64. ARM implementation will come later. R=zhin@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com BUG= LOG=N Change-Id: I2cc3afe63802aa00b8e5e7dcfb710c49d1486a90 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2484337Reviewed-by:
Junliang Yan <junyan@redhat.com> Commit-Queue: Milad Fa <mfarazma@redhat.com> Cr-Commit-Position: refs/heads/master@{#70611}
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- 15 Oct, 2020 1 commit
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Ng Zhi An authored
Rename AddSaturate and SubSaturate to the shorter version, AddSat and SubSat, following the spec. Bug: v8:10946,v8:10933 Change-Id: Idf74b3a1eb2e2f6d4e37d2b8e5fa6d96ea090db4 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2436615Reviewed-by:
Tobias Tebbi <tebbi@chromium.org> Reviewed-by:
Jakob Kummerow <jkummerow@chromium.org> Reviewed-by:
Bill Budge <bbudge@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#70549}
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- 25 Sep, 2020 1 commit
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Adam Klein authored
These instructions were changed from "s8x16" to "i8x16" prefixes in https://github.com/WebAssembly/simd/pull/321. This CL updates all V8 code, including arch-specific code, to match. Bug: v8:10946, v8:10933 Change-Id: I26ef9ad77571f94501d42c1d65f57380fd507f3d Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2432068Reviewed-by:
Zhi An Ng <zhin@chromium.org> Commit-Queue: Adam Klein <adamk@chromium.org> Cr-Commit-Position: refs/heads/master@{#70143}
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- 17 Sep, 2020 1 commit
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Milad Fa authored
Port 7f654693 Original Commit Message: Implement f32x4 and f64x2 nearest, trunc, ceil, and floor for ia32 and x64. arm and arm64 will follow in a future patch, now they just bail out into a runtime call. R=zhin@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com BUG= LOG=N Change-Id: Ida97cc498661a1f87dee95914fc4b7e75e55de80 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2416232Reviewed-by:
Junliang Yan <junyan@redhat.com> Commit-Queue: Milad Farazmand <mfarazma@redhat.com> Cr-Commit-Position: refs/heads/master@{#69972}
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- 16 Sep, 2020 1 commit
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Andreas Haas authored
The {offset_reg} parameter was introduced so that the signature of StoreTaggedPointer is the same as for Store, and also to prepare for potential later uses. However, handling the parameter would introduce additional complexity, and chances are low that it will ever be used. That's why this CL just removes it. R=thibaudm@chromium.org Bug: v8:7581 Change-Id: Ib419a72e1d9f36b8d9a3dbbce538ce57bb37d476 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2412182Reviewed-by:
Thibaud Michaud <thibaudm@chromium.org> Commit-Queue: Andreas Haas <ahaas@chromium.org> Cr-Commit-Position: refs/heads/master@{#69958}
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- 15 Sep, 2020 1 commit
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Andreas Haas authored
Global.set requires a write barrier. This write barrier was missing in the original CL. The reland only adds the write barrier for ia32, and bails out on the other platforms. Original message: With this CL we add support for all externref globals except for imported mutable globals. R=thibaudm@chromium.org, ulan@chromium.org Bug: v8:7581 Change-Id: I86328a17200d1edc505f4c4357bdf795d95cf0c8 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2404777Reviewed-by:
Ulan Degenbaev <ulan@chromium.org> Reviewed-by:
Thibaud Michaud <thibaudm@chromium.org> Commit-Queue: Andreas Haas <ahaas@chromium.org> Cr-Commit-Position: refs/heads/master@{#69912}
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- 14 Sep, 2020 1 commit
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Milad Fa authored
Port 863c2cb4 Original Commit Message: Implement f32x4.pmin, f32x4.pmax, f64x2.pmin, and f64x2.pmax. Due to the way minps/maxps/minpd/maxpd works [0], we swap lhs and rhs. This is similar to the way TurboFan does this [1]. [0] "If the values being compared are both 0.0s (of either sign), the value in the second operand (source operand) is returned." but pmin/pmax wants to return the lhs (which follows the definition of std::min<T> in C++ STL.) [1] https://source.chromium.org/search?q=instruction-selector-ia32.cc%20VisitPmin&ss=chromium%2Fchromium%2Fsrc:v8%2F R=zhin@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com BUG= LOG=N Change-Id: I3c894d203dffedee579236e3aec681e6206a8e7a Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2410474Reviewed-by:
Milad Farazmand <mfarazma@redhat.com> Reviewed-by:
Joran Siu <joransiu@ca.ibm.com> Commit-Queue: Milad Farazmand <mfarazma@redhat.com> Cr-Commit-Position: refs/heads/master@{#69895}
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- 08 Sep, 2020 3 commits
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Milad Farazmand authored
Port 10348e8e Original Commit Message: With this CL we emit safepoint maps for externref values on the Liftoff value stack. With that there is support for externref parameters and locals in Liftoff, as well as for intermediate values of type externref. R=ahaas@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com BUG= LOG=N Change-Id: I369c0e2e7fb1c4681101a149b01e1a9580051d45 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2398845Reviewed-by:
Junliang Yan <jyan@ca.ibm.com> Reviewed-by:
Joran Siu <joransiu@ca.ibm.com> Reviewed-by:
Andreas Haas <ahaas@chromium.org> Commit-Queue: Milad Farazmand <miladfar@ca.ibm.com> Cr-Commit-Position: refs/heads/master@{#69747}
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Sathya Gunasekaran authored
This reverts commit e43ec59b. Reason for revert: https://logs.chromium.org/logs/v8/buildbucket/cr-buildbucket.appspot.com/8869719317069732832/+/steps/Check_-_d8/0/logs/externref-globals-liftoff/0 Original change's description: > [wasm][liftoff] Support for most externref globals > > With this CL we add support for all externref globals except for > imported mutable globals. > > R=thibaudm@chromium.org > > Bug: v8:7581 > Change-Id: I63cb26f8ad6f4b8fc1c276e223c5d45745122ebf > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2396086 > Commit-Queue: Andreas Haas <ahaas@chromium.org> > Reviewed-by: Thibaud Michaud <thibaudm@chromium.org> > Cr-Commit-Position: refs/heads/master@{#69741} TBR=ahaas@chromium.org,thibaudm@chromium.org Change-Id: I19d191862aa91a116ea84a4a59a3a0a8036fcb49 No-Presubmit: true No-Tree-Checks: true No-Try: true Bug: v8:7581 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2398643 Commit-Queue: Sathya Gunasekaran <gsathya@chromium.org> Reviewed-by:
Sathya Gunasekaran <gsathya@chromium.org> Cr-Commit-Position: refs/heads/master@{#69744}
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Andreas Haas authored
With this CL we add support for all externref globals except for imported mutable globals. R=thibaudm@chromium.org Bug: v8:7581 Change-Id: I63cb26f8ad6f4b8fc1c276e223c5d45745122ebf Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2396086 Commit-Queue: Andreas Haas <ahaas@chromium.org> Reviewed-by:
Thibaud Michaud <thibaudm@chromium.org> Cr-Commit-Position: refs/heads/master@{#69741}
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- 18 Aug, 2020 1 commit
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Milad Farazmand authored
Port 4765c70f Original Commit Message: On arm, the root register points into the middle of the roots array to allow to use the full int12_t offset range. Therefore some offsets into the root array are negative. This CL changes the liftoff assembler for arm to allow loads from negative offsets. On arm64, offsets can also be negative when pointer compression is disabled. Additionally this CL changes the signature of LiftoffAssembler::LoadTaggedPointer from uint32_t to int32_t to allow the LiftoffCompiler to provide negative indices. This CL does not come with a separate test yet. However, this changes is needed for https://crrev.com/c/2352784. Where there will also be a test. R=ahaas@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com BUG= LOG=N Change-Id: Ie286b0169a5f7a1de90e0ec7002bfac83383ea6c Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2363127Reviewed-by:
Andreas Haas <ahaas@chromium.org> Commit-Queue: Milad Farazmand <miladfar@ca.ibm.com> Cr-Commit-Position: refs/heads/master@{#69456}
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- 04 Aug, 2020 1 commit
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Ng Zhi An authored
Swizzles are shuffles that only use values from 1 operand, e.g. v8x16.shuffle 0 1 2 3 0 0 0 0 4 5 6 7 0 0 0 0 (all the values are < 16). Match such patterns and emit an optimized codegen that uses less registers and instructions. Only implemented for x64 for now, the other backends will come in follow-up patches. Bug: v8:10696 Change-Id: Iffa694b04c97313eab7d138e4bdad7c0c85cda89 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2335419Reviewed-by:
Clemens Backes <clemensb@chromium.org> Reviewed-by:
Jakob Kummerow <jkummerow@chromium.org> Reviewed-by:
Bill Budge <bbudge@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#69231}
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- 27 Jul, 2020 1 commit
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Milad Farazmand authored
Port 06bdd8d6 R=thibaudm@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com BUG= LOG=N Change-Id: I35cf8d96c542da6db840f90d30b3a77a8925fafb Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2313316Reviewed-by:
Junliang Yan <jyan@ca.ibm.com> Commit-Queue: Milad Farazmand <miladfar@ca.ibm.com> Cr-Commit-Position: refs/heads/master@{#69071}
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- 23 Jul, 2020 1 commit
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Clemens Backes authored
cmov is often much faster than branches (in particular if the branches cannot be predicted). It also has a much more predictable performance, and is shorter. This CL uses cmov on x64 for now. Other platforms (maybe using other instructions than cmov) can be added later. R=thibaudm@chromium.org Bug: v8:10740 Change-Id: Ifab3d570b8eea784376e1f768d6ba3828efcc01a Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2315978Reviewed-by:
Thibaud Michaud <thibaudm@chromium.org> Commit-Queue: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#69027}
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- 22 Jul, 2020 1 commit
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Milad Farazmand authored
Port b64cede5 R=thibaudm@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com BUG= LOG=N Change-Id: I5aad17e2818d9d3ac6ab76b90c5242dd6593557c Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2312497Reviewed-by:
Thibaud Michaud <thibaudm@chromium.org> Commit-Queue: Milad Farazmand <miladfar@ca.ibm.com> Cr-Commit-Position: refs/heads/master@{#68998}
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- 10 Jul, 2020 1 commit
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Milad Farazmand authored
Port 34871edd Original Commit Message: Partial implementation of v128.const, only the optimized case for all 0s and all 1s. The other cases bailout to TurboFan for now, and will be added in subsequent patches. R=zhin@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com BUG= LOG=N Change-Id: I948380f0859b49bcc5a55d239b24a93b1cd5fd04 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2292113Reviewed-by:
Junliang Yan <jyan@ca.ibm.com> Commit-Queue: Milad Farazmand <miladfar@ca.ibm.com> Cr-Commit-Position: refs/heads/master@{#68793}
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