1. 06 Oct, 2021 1 commit
  2. 01 Oct, 2021 1 commit
    • Manos Koukoutos's avatar
      [turbofan] Optimize traps after Merge/IfTrue/IfFalse · 29afe1e5
      Manos Koukoutos authored
      We implement two optimizations for trap conditionals for patterns that
      come up in wasm-gc.
      In case of a Merge followed by a trap, where the path conditions of all
      branches of the Merge contain the trap condition, we lift the trap into
      the branches of the Merge.
      In case of a Branch whose IfTrue branch is followed by a TrapIf with the
      same condition, we replace it with the trap followed by the IfFalse
      branch. Symmetrically for IfFalse and TrapUnless.
      
      Bug: v8:7748
      Change-Id: I43040aebe60eab7b2230fc3130e3b8250e8b2f45
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3190109Reviewed-by: 's avatarNico Hartmann <nicohartmann@chromium.org>
      Commit-Queue: Manos Koukoutos <manoskouk@chromium.org>
      Cr-Commit-Position: refs/heads/main@{#77181}
      29afe1e5
  3. 30 Sep, 2021 1 commit
  4. 28 Sep, 2021 1 commit
  5. 27 Sep, 2021 1 commit
  6. 17 Sep, 2021 2 commits
  7. 15 Sep, 2021 2 commits
  8. 09 Sep, 2021 2 commits
  9. 08 Sep, 2021 1 commit
    • Ng Zhi An's avatar
      Reland "[wasm-simd][arm64] Fuse add and extmul" · c03354b4
      Ng Zhi An authored
      This is a reland of 65515ddd
      
      Fix is to use AddWithWraparound for signed additions to avoid UB.
      
      Original change's description:
      > [wasm-simd][arm64] Fuse add and extmul
      >
      > We can select a better instruction for add+extmul, using one of the
      > multiply-long-accumulate instruction.
      >
      > Define a helper struct to pattern match Add(x, OP(y, z)) and
      > Add(OP(x, y) z), and ensure that the matched OP is always on the
      > LHS, to simplify checking for matches.
      >
      > Bug: v8:11548
      > Change-Id: I7ab488b262aa9f749785f973549ccd9fad72f4c8
      > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2826725
      > Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
      > Commit-Queue: Zhi An Ng <zhin@chromium.org>
      > Cr-Commit-Position: refs/heads/main@{#76708}
      
      Bug: v8:11548
      Change-Id: I675ab8b78d9c6c30b82a8c96c8e7098a548c6a60
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3144379
      Commit-Queue: Zhi An Ng <zhin@chromium.org>
      Reviewed-by: 's avatarDeepti Gandluri <gdeepti@chromium.org>
      Cr-Commit-Position: refs/heads/main@{#76712}
      c03354b4
  10. 07 Sep, 2021 2 commits
  11. 27 Aug, 2021 2 commits
  12. 24 Aug, 2021 1 commit
  13. 23 Aug, 2021 2 commits
  14. 17 Aug, 2021 1 commit
  15. 16 Aug, 2021 2 commits
  16. 13 Aug, 2021 4 commits
    • Clemens Backes's avatar
      [wasm][arm64] Fix 16-bit to 32-bit sign extension · 4d073008
      Clemens Backes authored
      This is identical to https://crrev.com/c/3094011, but for 16-bit values.
      We introduce another instruction to differentiate between 16->32 bit
      sign extensions and 16->64 bit sign extensions.
      
      R=ahaas@chromium.org, mslekova@chromium.org
      
      Bug: chromium:1239116
      Change-Id: I2742e9d9c2b4a038fc7a0b1715faf8f25fa20b1f
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3094012
      Commit-Queue: Clemens Backes <clemensb@chromium.org>
      Reviewed-by: 's avatarMaya Lekova <mslekova@chromium.org>
      Reviewed-by: 's avatarAndreas Haas <ahaas@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#76284}
      4d073008
    • Clemens Backes's avatar
      [wasm][arm64] Fix zero-extention of i32.load8_s · 748ae7cb
      Clemens Backes authored
      InstructionSelector::ZeroExtendsWord32ToWord64 assumes that a
      Load[kRepWord8|kTypeInt32] generates a zero-extended value. This
      assumption makes sense, but was not fulfilled by the instruction
      selector which emitted an "ldrsb" instruction which sign-extended to the
      full 64-bit register.
      
      This CL fixes that by introducing a separate "LdrsbW" instruction which
      is selected if we are sign-extending an 8-bit value to 32-bit.
      
      R=ahaas@chromium.org, mslekova@chromium.org
      CC=v8-arm-ports@googlegroups.com
      
      Bug: chromium:1239116
      Change-Id: I2da1ad6062805acf5558f3e66b8db9a50e830302
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3094011
      Commit-Queue: Clemens Backes <clemensb@chromium.org>
      Reviewed-by: 's avatarMaya Lekova <mslekova@chromium.org>
      Reviewed-by: 's avatarAndreas Haas <ahaas@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#76283}
      748ae7cb
    • Clemens Backes's avatar
      Revert "[arm64][wasm] Use NEON S/Usra for Wasm SIMD add(shr(x, imm), y)" · 55e6a51f
      Clemens Backes authored
      This reverts commit 2261e053.
      
      Reason for revert: No issues with the CL, but it is taking the
      last two available opcodes on arm64 (we use 9 bits to encode it,
      so we are limited to 512 opcodes). We need to land a security fix
      which includes the addition of two opcodes. Before relanding this,
      we need to figure out a strategy to either reduce opcodes, or use
      one more bit to encode them.
      
      Original change's description:
      > [arm64][wasm] Use NEON S/Usra for Wasm SIMD add(shr(x, imm), y)
      >
      > A single AArch64 SIMD signed/unsigned Shift Right and Accumulate can be
      > used to implement Wasm SIMD add(shr(x, imm), y). This gives a 1-1.5%
      > improvement on some compute intensive Wasm benchmarks on Neoverse-N1.
      >
      > Mla and Adalp optimisations were refactored to match the style of the
      > added code.
      >
      > Change-Id: Id5959a31ca267e02b7d60e7ff6f942adb029b41e
      > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3089157
      > Reviewed-by: Zhi An Ng <zhin@chromium.org>
      > Commit-Queue: Martyn Capewell <martyn.capewell@arm.com>
      > Cr-Commit-Position: refs/heads/master@{#76280}
      
      Change-Id: Ifad0625ed8a6b66e7a7a74da11ad7d60941207e5
      No-Presubmit: true
      No-Tree-Checks: true
      No-Try: true
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3094014
      Auto-Submit: Clemens Backes <clemensb@chromium.org>
      Commit-Queue: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
      Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
      Cr-Commit-Position: refs/heads/master@{#76282}
      55e6a51f
    • Ilja Iskovs's avatar
      [arm64][wasm] Use NEON S/Usra for Wasm SIMD add(shr(x, imm), y) · 2261e053
      Ilja Iskovs authored
      A single AArch64 SIMD signed/unsigned Shift Right and Accumulate can be
      used to implement Wasm SIMD add(shr(x, imm), y). This gives a 1-1.5%
      improvement on some compute intensive Wasm benchmarks on Neoverse-N1.
      
      Mla and Adalp optimisations were refactored to match the style of the
      added code.
      
      Change-Id: Id5959a31ca267e02b7d60e7ff6f942adb029b41e
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3089157Reviewed-by: 's avatarZhi An Ng <zhin@chromium.org>
      Commit-Queue: Martyn Capewell <martyn.capewell@arm.com>
      Cr-Commit-Position: refs/heads/master@{#76280}
      2261e053
  17. 12 Aug, 2021 1 commit
  18. 05 Aug, 2021 1 commit
  19. 03 Aug, 2021 1 commit
  20. 19 Jul, 2021 1 commit
    • Jakob Gruber's avatar
      [compiler] Make JSFunction bg-serialized · 0dba97f8
      Jakob Gruber authored
      This wraps up the transition away from kSerialized ref kinds.
      
      Since JSFunctionRef is a complex type, we don't attempt full
      consistency on the background thread. Instead, we serialize functions
      on the background in a partially-racy manner, in which consistency
      between different JSFunction fields is *not* guaranteed. Consistency
      is later verified through a new compilation dependency kind during
      finalization.
      
      Bug: v8:7790, v8:12004
      Change-Id: Ic2b78af9c9fe183c8769d323132bb304b151dc75
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2968404
      Commit-Queue: Jakob Gruber <jgruber@chromium.org>
      Reviewed-by: 's avatarIgor Sheludko <ishell@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#75789}
      0dba97f8
  21. 05 Jul, 2021 1 commit
    • Georg Neis's avatar
      [compiler] Fix a (harmless) DCHECK failure · ce08dec0
      Georg Neis authored
      A frame state's outer frame state input can be kDeadValue. A DCHECK
      did not take that into account. In release builds there was no issue
      because we branch on the opcode anyways.
      
      While fixing this bug, I'm strengthening the FrameState class such that
      a FrameState node must have a kFrameState operator. I'm also
      - changing the result type of outer_frame_state() from FrameState to
        Node* since it may in fact not be a kFrameState;
      - removing has_outer_frame_state() because I find it unintuitive to
        have outer_frame_state() return non-NULL even when
        has_outer_frame_state() would return true.
      
      Bug: chromium:1224758
      Change-Id: I8ebed75c62e31f7eef71e2941fd18869d8a56af3
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3001356Reviewed-by: 's avatarNico Hartmann <nicohartmann@chromium.org>
      Commit-Queue: Georg Neis <neis@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#75553}
      ce08dec0
  22. 30 Jun, 2021 1 commit
  23. 28 Jun, 2021 1 commit
  24. 25 Jun, 2021 1 commit
  25. 24 Jun, 2021 3 commits
  26. 17 Jun, 2021 1 commit
  27. 11 Jun, 2021 1 commit
  28. 07 Jun, 2021 1 commit