[wasm][arm64] Fix 16-bit to 32-bit sign extension

This is identical to https://crrev.com/c/3094011, but for 16-bit values.
We introduce another instruction to differentiate between 16->32 bit
sign extensions and 16->64 bit sign extensions.

R=ahaas@chromium.org, mslekova@chromium.org

Bug: chromium:1239116
Change-Id: I2742e9d9c2b4a038fc7a0b1715faf8f25fa20b1f
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3094012
Commit-Queue: Clemens Backes <clemensb@chromium.org>
Reviewed-by: Maya Lekova <mslekova@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Cr-Commit-Position: refs/heads/master@{#76284}

src/compiler/backend/arm64/code-generator-arm64.cc

@@ -1779,6 +1779,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset());
       __ Ldrsh(i.OutputRegister(), i.MemoryOperand());
       break;
+    case kArm64LdrshW:
+      EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset());
+      __ Ldrsh(i.OutputRegister32(), i.MemoryOperand());
+      break;
     case kArm64Strh:
       EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset());
       __ Strh(i.InputOrZeroRegister64(0), i.MemoryOperand(1));

src/compiler/backend/arm64/instruction-codes-arm64.h

@@ -168,6 +168,7 @@ namespace compiler {
   V(Arm64Strb)                              \
   V(Arm64Ldrh)                              \
   V(Arm64Ldrsh)                             \
+  V(Arm64LdrshW)                            \
   V(Arm64Strh)                              \
   V(Arm64Ldrsw)                             \
   V(Arm64LdrW)                              \

src/compiler/backend/arm64/instruction-scheduler-arm64.cc

@@ -368,6 +368,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kArm64LdrsbW:
     case kArm64Ldrh:
     case kArm64Ldrsh:
+    case kArm64LdrshW:
     case kArm64Ldrsw:
     case kArm64LdrW:
     case kArm64Ldr:

src/compiler/backend/arm64/instruction-selector-arm64.cc

@@ -795,7 +795,11 @@ void InstructionSelector::VisitLoad(Node* node) {
       immediate_mode = kLoadStoreImm8;
       break;
     case MachineRepresentation::kWord16:
-      opcode = load_rep.IsSigned() ? kArm64Ldrsh : kArm64Ldrh;
+      opcode = load_rep.IsUnsigned()
+                   ? kArm64Ldrh
+                   : load_rep.semantic() == MachineSemantic::kInt32
+                         ? kArm64LdrshW
+                         : kArm64Ldrsh;
       immediate_mode = kLoadStoreImm16;
       break;
     case MachineRepresentation::kWord32:

test/unittests/compiler/arm64/instruction-selector-arm64-unittest.cc

@@ -3015,7 +3015,7 @@ static const MemoryAccess kMemoryAccesses[] = {
      {-256, -255, -3,  -2,   -1,   0,    1,    2,    3,    255,
       256,  257,  258, 1000, 1001, 2121, 2442, 4093, 4094, 4095}},
     {MachineType::Int16(),
-     kArm64Ldrsh,
+     kArm64LdrshW,
      kArm64Strh,
      {-256, -255, -3,  -2,   -1,   0,    1,    2,    3,    255,
       256,  258,  260, 4096, 4098, 4100, 4242, 6786, 8188, 8190}},