- 17 Feb, 2016 1 commit
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bbudge authored
Adds kSimd128 to MachineRepresentation. Adds a Simd128Register concept that's platform independent. Adds UntaggedSimd128 to types.h. LOG=N BUG=v8:4124 Review URL: https://codereview.chromium.org/1693963004 Cr-Commit-Position: refs/heads/master@{#34089}
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- 18 Jan, 2016 1 commit
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balazs.kilvady authored
BUG= Review URL: https://codereview.chromium.org/1593713002 Cr-Commit-Position: refs/heads/master@{#33361}
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- 15 Jan, 2016 1 commit
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mstarzinger authored
This splits out the SourcePosition class into a separate header file. Reason for this refactoring is that said class is mostly used by the Crankshaft compiler and not needed for all compilers. Also having the assembler depend on the class creates a dependency cycle. R=bmeurer@chromium.org Review URL: https://codereview.chromium.org/1581083009 Cr-Commit-Position: refs/heads/master@{#33325}
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- 12 Jan, 2016 1 commit
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balazs.kilvady authored
BUG= Review URL: https://codereview.chromium.org/1573953002 Cr-Commit-Position: refs/heads/master@{#33249}
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- 06 Jan, 2016 2 commits
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dusan.m.milosavljevic authored
Utilise Dextu, Dextm on mips64 for widths and positions larger than 32. TEST= BUG= Review URL: https://codereview.chromium.org/1552483002 Cr-Commit-Position: refs/heads/master@{#33138}
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ivica.bogosavljevic authored
Several ports to enable r6 compact branch optimizations on MIPS64 Port 3573d3cb Original commit message: MIPS: r6 compact branch optimization. Port bddf8c9e Original commit message: MIPS: Fix trampoline pool handling in MacroAssembler::BranchShort() Port 6993cd0d Original commit message: MIPS: Fix 'MIPS:r6 compact branch optimization.' Jic and jialc compact branch ops are fixed as they does not have 'forbidden slot' restriction. Also COP1 branches (CTI instructions) added to IsForbiddenAfterBranchInstr(). Port bb332195 Original commit message: MIPS: Fix trampoline pool handling in MacroAssembler::BranchShort() Port c91bcf71 Original commit message: MIPS: Fix trampoline pool handling in MacroAssembler::BranchShort() for r6. BUG= Review URL: https://codereview.chromium.org/1534183002 Cr-Commit-Position: refs/heads/master@{#33136}
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- 05 Jan, 2016 1 commit
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balazs.kilvady authored
BUG= Review URL: https://codereview.chromium.org/1545013002 Cr-Commit-Position: refs/heads/master@{#33127}
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- 02 Dec, 2015 1 commit
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yangguo authored
The new step-in implementation no longer tries to predict the step-in target, so we don't need the arguments count nor call type anymore. R=verwaest@chromium.org Review URL: https://codereview.chromium.org/1484893003 Cr-Commit-Position: refs/heads/master@{#32516}
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- 01 Dec, 2015 1 commit
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dusan.m.milosavljevic authored
TEST=unittests/InstructionSelectorTest.Word(32|64)AndToClearBits BUG= Review URL: https://codereview.chromium.org/1485023004 Cr-Commit-Position: refs/heads/master@{#32479}
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- 30 Nov, 2015 1 commit
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alan.li authored
BUG= Review URL: https://codereview.chromium.org/1481493002 Cr-Commit-Position: refs/heads/master@{#32417}
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- 27 Nov, 2015 1 commit
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jochen authored
Requires passing an explicit Isolate* to a bunch of static Assembler methods. BUG=v8:2487 R=yangguo@chromium.org,jkummerow@chromium.org LOG=n Review URL: https://codereview.chromium.org/1474323002 Cr-Commit-Position: refs/heads/master@{#32376}
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- 06 Nov, 2015 1 commit
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ahaas authored
R=titzer@chromium.org Review URL: https://codereview.chromium.org/1413463009 Cr-Commit-Position: refs/heads/master@{#31858}
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- 04 Nov, 2015 1 commit
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dusan.m.milosavljevic authored
TEST=cctest/test-run-machops/Float(64|32)MaxP, Float(64|32)MinP, unittests/InstructionSelectorTest.Float64Min|Max BUG=v8:4206 LOG=N Review URL: https://codereview.chromium.org/1419753008 Cr-Commit-Position: refs/heads/master@{#31806}
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- 07 Oct, 2015 1 commit
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mstarzinger authored
This removes the include of compiler.h from all our assemblers, which was only needed for the SourcePosition class. R=jkummerow@chromium.org Review URL: https://codereview.chromium.org/1397493002 Cr-Commit-Position: refs/heads/master@{#31157}
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- 02 Oct, 2015 3 commits
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danno authored
Previous to this patch, both the lithium and TurboFan register allocators tracked allocated registers by "indices", rather than the register codes used elsewhere in the runtime. This patch ensures that codes are used everywhere, and in the process cleans up a bunch of redundant code and adds more structure to how the set of allocatable registers is defined. Some highlights of changes: * TurboFan's RegisterConfiguration class moved to V8's top level so that it can be shared with Crankshaft. * Various "ToAllocationIndex" and related methods removed. * Code that can be easily shared between Register classes on different platforms is now shared. * The list of allocatable registers on each platform is declared as a list rather than implicitly via the register index <-> code mapping. Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2 Cr-Commit-Position: refs/heads/master@{#30913} Committed: https://crrev.com/7b7a8205d9a00c678fb7a6e032a55fecbc1509cf Cr-Commit-Position: refs/heads/master@{#31075} Review URL: https://codereview.chromium.org/1287383003 Cr-Commit-Position: refs/heads/master@{#31087}
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danno authored
Revert of Reland: Remove register index/code indirection (patchset #20 id:380001 of https://codereview.chromium.org/1287383003/ ) Reason for revert: Failures on MIPS Original issue's description: > Remove register index/code indirection > > Previous to this patch, both the lithium and TurboFan register > allocators tracked allocated registers by "indices", rather than > the register codes used elsewhere in the runtime. This patch > ensures that codes are used everywhere, and in the process cleans > up a bunch of redundant code and adds more structure to how the > set of allocatable registers is defined. > > Some highlights of changes: > > * TurboFan's RegisterConfiguration class moved to V8's top level > so that it can be shared with Crankshaft. > * Various "ToAllocationIndex" and related methods removed. > * Code that can be easily shared between Register classes on > different platforms is now shared. > * The list of allocatable registers on each platform is declared > as a list rather than implicitly via the register index <-> > code mapping. > > Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2 > Cr-Commit-Position: refs/heads/master@{#30913} > > Committed: https://crrev.com/7b7a8205d9a00c678fb7a6e032a55fecbc1509cf > Cr-Commit-Position: refs/heads/master@{#31075} TBR=akos.palfi@imgtec.com,bmeurer@chromium.org,jarin@chromium.org,paul.lind@imgtec.com,titzer@chromium.org NOPRESUBMIT=true NOTREECHECKS=true NOTRY=true Review URL: https://codereview.chromium.org/1380863004 Cr-Commit-Position: refs/heads/master@{#31083}
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danno authored
Previous to this patch, both the lithium and TurboFan register allocators tracked allocated registers by "indices", rather than the register codes used elsewhere in the runtime. This patch ensures that codes are used everywhere, and in the process cleans up a bunch of redundant code and adds more structure to how the set of allocatable registers is defined. Some highlights of changes: * TurboFan's RegisterConfiguration class moved to V8's top level so that it can be shared with Crankshaft. * Various "ToAllocationIndex" and related methods removed. * Code that can be easily shared between Register classes on different platforms is now shared. * The list of allocatable registers on each platform is declared as a list rather than implicitly via the register index <-> code mapping. Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2 Cr-Commit-Position: refs/heads/master@{#30913} Review URL: https://codereview.chromium.org/1287383003 Cr-Commit-Position: refs/heads/master@{#31075}
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- 30 Sep, 2015 1 commit
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mstarzinger authored
This enables linter checking for "readability/namespace" violations during presubmit and instead marks the few known exceptions that we allow explicitly. R=bmeurer@chromium.org Review URL: https://codereview.chromium.org/1371083003 Cr-Commit-Position: refs/heads/master@{#31019}
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- 29 Sep, 2015 1 commit
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dusan.m.milosavljevic authored
TEST= BUG= Review URL: https://codereview.chromium.org/1334793004 Cr-Commit-Position: refs/heads/master@{#31011}
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- 24 Sep, 2015 2 commits
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danno authored
Revert of Remove register index/code indirection (patchset #17 id:320001 of https://codereview.chromium.org/1287383003/ ) Reason for revert: Failures on greedy RegAlloc, Fuzzer Original issue's description: > Remove register index/code indirection > > Previous to this patch, both the lithium and TurboFan register > allocators tracked allocated registers by "indices", rather than > the register codes used elsewhere in the runtime. This patch > ensures that codes are used everywhere, and in the process cleans > up a bunch of redundant code and adds more structure to how the > set of allocatable registers is defined. > > Some highlights of changes: > > * TurboFan's RegisterConfiguration class moved to V8's top level > so that it can be shared with Crankshaft. > * Various "ToAllocationIndex" and related methods removed. > * Code that can be easily shared between Register classes on > different platforms is now shared. > * The list of allocatable registers on each platform is declared > as a list rather than implicitly via the register index <-> > code mapping. > > Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2 > Cr-Commit-Position: refs/heads/master@{#30913} TBR=akos.palfi@imgtec.com,bmeurer@chromium.org,jarin@chromium.org,paul.lind@imgtec.com,titzer@chromium.org NOPRESUBMIT=true NOTREECHECKS=true NOTRY=true Review URL: https://codereview.chromium.org/1365073002 Cr-Commit-Position: refs/heads/master@{#30914}
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danno authored
Previous to this patch, both the lithium and TurboFan register allocators tracked allocated registers by "indices", rather than the register codes used elsewhere in the runtime. This patch ensures that codes are used everywhere, and in the process cleans up a bunch of redundant code and adds more structure to how the set of allocatable registers is defined. Some highlights of changes: * TurboFan's RegisterConfiguration class moved to V8's top level so that it can be shared with Crankshaft. * Various "ToAllocationIndex" and related methods removed. * Code that can be easily shared between Register classes on different platforms is now shared. * The list of allocatable registers on each platform is declared as a list rather than implicitly via the register index <-> code mapping. Review URL: https://codereview.chromium.org/1287383003 Cr-Commit-Position: refs/heads/master@{#30913}
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- 16 Sep, 2015 1 commit
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ivica.bogosavljevic authored
Fixing floating point register clobbering for MIPSr6 (32 and 64) due to using of f31 floating point register as double compare register, without saving the value of the register before using it. TEST=cctest/test-debug/* BUG= Review URL: https://codereview.chromium.org/1346623002 Cr-Commit-Position: refs/heads/master@{#30765}
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- 18 Aug, 2015 1 commit
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rmcilroy authored
Makes the following modifications to the interpreter builtins and InterpreterAssembler: - Adds an accumulator register and initializes it to undefined() - Adds a register file pointer register and use it instead of FramePointer to access registers - Modifies builtin to support functions with 0 regiters in the register file - Modifies builtin to Call rather than TailCall to first bytecode handler. BUG=v8:4280 LOG=N Review URL: https://codereview.chromium.org/1289863003 Cr-Commit-Position: refs/heads/master@{#30219}
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- 07 Aug, 2015 1 commit
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titzer authored
[turbofan] Remove architecture-specific linkage files and LinkageTraits. Use macro-assembler-defined constants. R=mstarzinger@chromium.org BUG= Review URL: https://codereview.chromium.org/1272883003 Cr-Commit-Position: refs/heads/master@{#30063}
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- 01 Aug, 2015 1 commit
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dusan.milosavljevic authored
Introduce new mechanism for relocating j/jal. Resolves flaky failures of mozilla regress tests. Additionally: - internal encoded references are not relocated during code generation phase. - remove asserts from j and jal which are not valid because addresses are not final and valid in code generation phase. TEST=mozilla/js1_5/Regress/regress-280769-2, regress-367561-01, mozilla/ecma_3/Statements/regress-444979 BUG= R=paul.lind@imgtec.com Review URL: https://codereview.chromium.org/1216823003 . Patch from dusan.milosavljevic <dusan.milosavljevic@imgtec.com>. Cr-Commit-Position: refs/heads/master@{#29962}
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- 30 Jul, 2015 1 commit
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rmcilroy authored
Adds interpreter entry and exit trampoline builtins. Also implements the Return bytecode handler and fixes a few bugs in InterpreterAssembler highlighted by running on other architectures. MIPS and MIPS64 port contributed by Paul Lind (paul.lind@imgtec.com) BUG=v8:4280 LOG=N Review URL: https://codereview.chromium.org/1245133002 Cr-Commit-Position: refs/heads/master@{#29929}
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- 15 Jul, 2015 1 commit
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yangguo authored
By not having to patch the return sequence (we patch the debug break slot right before it), we don't overwrite it and therefore don't have to keep the original copy of the code around. R=ulan@chromium.org BUG=v8:4269 LOG=N Review URL: https://codereview.chromium.org/1234833003 Cr-Commit-Position: refs/heads/master@{#29672}
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- 14 Jul, 2015 1 commit
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yangguo authored
The new implemtation counts the number of calls (or continuations) before the PC to find the corresponding PC in the new code. R=mstarzinger@chromium.org BUG=chromium:507070 LOG=N Review URL: https://codereview.chromium.org/1235603002 Cr-Commit-Position: refs/heads/master@{#29636}
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- 13 Jul, 2015 1 commit
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balazs.kilvady authored
Port f0d1106a Fixes possible failure in AssembleArchTableSwitch(). BUG=v8:4294 LOG=y Review URL: https://codereview.chromium.org/1235883004 Cr-Commit-Position: refs/heads/master@{#29621}
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- 10 Jul, 2015 1 commit
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yangguo authored
Break point at calls are currently set via IC. To change this, we need to set debug break slots instead. We also need to distinguish those debug break slots as calls to support step-in. To implement this, we add a data field to debug break reloc info to indicate non-call debug breaks or in case of call debug breaks, the number of arguments. We can later use this to find the callee on the evaluation stack in Debug::PrepareStep. BUG=v8:4269 R=ulan@chromium.org LOG=N Review URL: https://codereview.chromium.org/1222093007 Cr-Commit-Position: refs/heads/master@{#29561}
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- 19 Jun, 2015 1 commit
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Ilija.Pavlovic authored
Added: JIC, BEQZC, JIALC, LDPC, LWPC, ALUIPC, ADDIUPC, ALIGN/DAILGN, LWUPC, AUIPC, BC, BALC. Additional fixed compact branch offset. TEST=test-assembler-mips[64]/r6_align, r6_dalign, r6_aluipc, r6_lwpc, r6_jic, r6_beqzc, r6_jialc, r6_addiupc, r6_ldpc, r6_lwupc, r6_auipc, r6_bc, r6_balc BUG= Review URL: https://codereview.chromium.org/1195793002 Cr-Commit-Position: refs/heads/master@{#29143}
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- 15 Jun, 2015 1 commit
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balazs.kilvady authored
Port cdc43bc5 Original review: https://codereview.chromium.org/1133163005/ Original commit message: Enable clang's shorten-64-to-32 warning flag on ARM64, and fix the warnings that arise. BUG= Review URL: https://codereview.chromium.org/1182193004 Cr-Commit-Position: refs/heads/master@{#29024}
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- 12 Jun, 2015 2 commits
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yangguo authored
Revert of MIPS64: Enable shorten-64-to-32 warning. (patchset #12 id:240001 of https://codereview.chromium.org/1133163005/) Reason for revert: Compile failure: https://chromegw.corp.google.com/i/client.v8/builders/V8%20Mac64%20-%20debug/builds/3070/steps/compile/logs/stdio Original issue's description: > MIPS64: Enable shorten-64-to-32 warning. > > Port cdc43bc5 > > Original commit message: > Enable clang's shorten-64-to-32 warning flag on ARM64, and fix the warnings > that arise. > > BUG= > > Committed: https://crrev.com/9af578a7c83b58a0ce25345998d9287cbf2030cb > Cr-Commit-Position: refs/heads/master@{#28990} TBR=danno@chromium.org,martyn.capewell@arm.com,paul.lind@imgtec.com,akos.palfi@imgtec.com,dusan.milosavljevic@imgtec.com,jkummerow@chromium.org,machenbach@chromium.org,svenpanne@chromium.org,balazs.kilvady@imgtec.com NOPRESUBMIT=true NOTREECHECKS=true NOTRY=true BUG= Review URL: https://codereview.chromium.org/1182493007 Cr-Commit-Position: refs/heads/master@{#28991}
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balazs.kilvady authored
Port cdc43bc5 Original commit message: Enable clang's shorten-64-to-32 warning flag on ARM64, and fix the warnings that arise. BUG= Review URL: https://codereview.chromium.org/1133163005 Cr-Commit-Position: refs/heads/master@{#28990}
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- 09 Jun, 2015 2 commits
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mbrandy authored
- Introduce Assembler::DataAlign for table alignment in code object - Fix several misuses of r8 (alias of the pool pointer register, pp) - Fix calculation of pp in OSR/handler entry invocation - Enable missing cases in deserializer - Fix references to ool constant pools in comments. R=rmcilroy@chromium.org, michael_dawson@ca.ibm.com BUG=chromium:497180 LOG=N Review URL: https://codereview.chromium.org/1155673005 Cr-Commit-Position: refs/heads/master@{#28873}
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dusan.milosavljevic authored
Improves code size of generated regexp in TestSizeOfRegExpCode test by 33%. Execution time of the same test improved by ~10%. Utilizing code range for mips64 enable us to use J/JAL instructions for long branches. TEST=cctest/test-heap/TestSizeOfRegExpCode BUG= Review URL: https://codereview.chromium.org/1147503002 Cr-Commit-Position: refs/heads/master@{#28867}
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- 04 Jun, 2015 1 commit
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mbrandy authored
Embed constant pools within their corresponding Code objects. This removes support for out-of-line constant pools in favor of the new approach -- the main advantage being that it eliminates the need to allocate and manage separate constant pool array objects. Currently supported on PPC and ARM. Enabled by default on PPC only. This yields a 6% improvment in Octane on PPC64. R=bmeurer@chromium.org, rmcilroy@chromium.org, michael_dawson@ca.ibm.com BUG=chromium:478811 LOG=Y Review URL: https://codereview.chromium.org/1162993006 Cr-Commit-Position: refs/heads/master@{#28801}
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- 03 Jun, 2015 1 commit
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bmeurer authored
Revert of Embedded constant pools. (patchset #12 id:220001 of https://codereview.chromium.org/1131783003/) Reason for revert: Breaks Linux nosnap cctest/test-api/FastReturnValuesWithProfiler, see http://build.chromium.org/p/client.v8/builders/V8%20Linux%20-%20nosnap%20-%20debug%20-%202/builds/609/steps/Check/logs/FastReturnValuesWithP.. Original issue's description: > Add support for Embedded Constant Pools for PPC and Arm > > Embed constant pools within their corresponding Code > objects. > > This removes support for out-of-line constant pools in favor > of the new approach -- the main advantage being that it > eliminates the need to allocate and manage separate constant > pool array objects. > > Currently supported on PPC and ARM. Enabled by default on > PPC only. > > This yields a 6% improvment in Octane on PPC64. > > R=danno@chromium.org, svenpanne@chromium.org, bmeurer@chromium.org, rmcilroy@chromium.org, dstence@us.ibm.com, michael_dawson@ca.ibm.com > BUG=chromium:478811 > LOG=Y > > Committed: https://crrev.com/a9404029343d65f146e3443f5280c40a97e736af > Cr-Commit-Position: refs/heads/master@{#28770} TBR=rmcilroy@chromium.org,ishell@chromium.org,rodolph.perfetta@arm.com,mbrandy@us.ibm.com NOPRESUBMIT=true NOTREECHECKS=true NOTRY=true BUG=chromium:478811 Review URL: https://codereview.chromium.org/1155703006 Cr-Commit-Position: refs/heads/master@{#28772}
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- 02 Jun, 2015 1 commit
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mbrandy authored
Embed constant pools within their corresponding Code objects. This removes support for out-of-line constant pools in favor of the new approach -- the main advantage being that it eliminates the need to allocate and manage separate constant pool array objects. Currently supported on PPC and ARM. Enabled by default on PPC only. This yields a 6% improvment in Octane on PPC64. R=danno@chromium.org, svenpanne@chromium.org, bmeurer@chromium.org, rmcilroy@chromium.org, dstence@us.ibm.com, michael_dawson@ca.ibm.com BUG=chromium:478811 LOG=Y Review URL: https://codereview.chromium.org/1131783003 Cr-Commit-Position: refs/heads/master@{#28770}
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- 22 May, 2015 1 commit
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Djordje.Pesic authored
Implement assembler, disassembler tests for all instructions for mips32 and mips64. Additionally, add missing single precision float instructions for r2 and r6 architecture variants in assembler, simulator and disassembler with corresponding tests. Review URL: https://codereview.chromium.org/1145223002 Cr-Commit-Position: refs/heads/master@{#28595}
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