- 21 Aug, 2014 1 commit
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rmcilroy@chromium.org authored
R=ulan@chromium.org Review URL: https://codereview.chromium.org/496443003 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23278 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 04 Aug, 2014 1 commit
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bmeurer@chromium.org authored
This way we don't clash with the ASSERT* macros defined by GoogleTest, and we are one step closer to being able to replace our homegrown base/ with base/ from Chrome. R=jochen@chromium.org, svenpanne@chromium.org Review URL: https://codereview.chromium.org/430503007 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22812 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 03 Jul, 2014 1 commit
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rmcilroy@chromium.org authored
- Adds support to the Arm assembler to use extended constant pools. - Update (set_)target_address_at to support extended constant pool load updates. - Replace Operand::is_single_instruction with Operand::instructions_required Due to the fact that different constant pool load types require different numbers of instructions. - Various cleanups of ConstantPoolBuilder to cleaner integration of the extended constant pool building. - Update GetRelocatedValue such that offsets to both map_check and bool_load are explicitly provided, rather than location of bool_load being inferred based on map_check, since the code inbetween is no longer of a predictable size. - Update MacroAssembler::GetRelocatedValueLocation() to add support for getting a value from an extended constant pool entry. - Update Debug::SetAfterBreakTarget() to use target_address_from_return_address when checking for debug breaks at constant pool load points. - Change ConstantPoolIterateBody to iterate over both heap and code pointer in the small section before moving onto the extended section, to work around the requirement of the serializer that pointers are iterated in-order. - Increase old_pointer_space SizeOfFirstPage() to offset the fact that constant pools are now in the old pointer space (rather than code). R=ulan@chromium.org Review URL: https://codereview.chromium.org/356393003 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22209 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 27 Jun, 2014 1 commit
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marja@chromium.org authored
This reverts r 22017 Reason: broke Nexus 7 GPU bots (see crbug.com/389198) BUG=389198 LOG=n TBR=machenbach@chromium.org, ulan@chromium.org Review URL: https://codereview.chromium.org/359713004 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22050 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 25 Jun, 2014 1 commit
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alexandre.rames@arm.com authored
When possible, we transform sequences of code of the form lsl r1, r2, #imm add r0, r5, r1 into add r0, r5, r2 LSL #imm This is an adaptation of r21161. R=ulan@chromium.org Review URL: https://codereview.chromium.org/312173002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22017 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 23 Jun, 2014 1 commit
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rmcilroy@chromium.org authored
A couple of cleanups to the Arm backend to enable support of extended OOL constant pools in a following CL. - Remove instruction pattern extern const's and replace their use with IsXXX() functions. - Do calculation of the target address of a load from constant pool in one place. - A couple of other small cleanups. R=ulan@chromium.org Review URL: https://codereview.chromium.org/317653003 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21932 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 05 Jun, 2014 1 commit
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titzer@chromium.org authored
R=jkummerow@google.com, jkummerow@chromium.org BUG= Review URL: https://codereview.chromium.org/313283003 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21685 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 04 Jun, 2014 1 commit
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titzer@chromium.org authored
R=dcarney@chromium.org, dcarney BUG= Review URL: https://codereview.chromium.org/313083006 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21677 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 09 May, 2014 1 commit
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ishell@chromium.org authored
1) runtime/references checks temporarily disabled (56 items left) 2) other errors fixed R=jkummerow@chromium.org Review URL: https://codereview.chromium.org/277913002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21222 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 29 Apr, 2014 1 commit
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bmeurer@chromium.org authored
R=svenpanne@chromium.org Review URL: https://codereview.chromium.org/259183002 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@21035 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 24 Apr, 2014 2 commits
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bmeurer@chromium.org authored
This reverts commit r20938 for breaking the windows build. TBR=ulan@chromium.org Review URL: https://codereview.chromium.org/254463003 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20939 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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bmeurer@chromium.org authored
R=svenpanne@chromium.org Review URL: https://codereview.chromium.org/257453003 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20938 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 21 Mar, 2014 1 commit
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m.m.capewell@googlemail.com authored
Fix Q register encoding for registers other than Q0. Also, fix value in NeonSize enumeration. BUG= R=ulan@chromium.org Review URL: https://codereview.chromium.org/207523005 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20163 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 27 Nov, 2013 1 commit
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rmcilroy@chromium.org authored
BUG=v8:3007 LOG=N R=bmeurer@chromium.org Review URL: https://codereview.chromium.org/88303003 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@18097 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 12 Sep, 2013 1 commit
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rodolph.perfetta@gmail.com authored
It is replaced by a mov_label_offset(Register, Label*) instruction. BUG=none TEST=test/cctest/test-assembler-arm.cc R=bmeurer@chromium.org Review URL: https://codereview.chromium.org/23515007 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@16676 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 10 Jul, 2013 1 commit
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rodolph.perfetta@gmail.com authored
Add support for a few NEON and ARM SIMD instructions and use them for various memcpy operations. BUG=none TEST=none Review URL: https://chromiumcodereview.appspot.com/17858002 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@15602 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 18 Apr, 2013 1 commit
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rodolph.perfetta@gmail.com authored
BUG=none TEST=none Review URL: https://chromiumcodereview.appspot.com/14188016 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14325 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 16 Apr, 2013 2 commits
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jkummerow@chromium.org authored
Review URL: https://codereview.chromium.org/14208011 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14291 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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rodolph.perfetta@gmail.com authored
This patch defines new makefile command line paramaters to better control the ARM specific options. The new paramters are * armfpu = vfp, vfpv3-d16, vfpv3, neon. * armfloatabi = softfp, hard * armneon = on * armthumb = on, off * armtest = on One existing paratemer has been modified: * armv7 = true, false A number of parameters have been deprecated (but are still working): * hardfp = on, off * vfp2 = off * vfp3 = off the armtest paratmer when set to "on" will lock the options used during compile time at runtime. This allows for example to easily test the ARMv6 build on an ARMv7 platform without having to worry about features detected at runtime. When not specified the compiler default will be used meaning it is not necessary anymore to specify hardfp=on when natively building on an hardfp platform. The shell help now prints the target options and features detected. BUG=none TEST=none Review URL: https://chromiumcodereview.appspot.com/14263018 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14288 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 15 Apr, 2013 1 commit
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m.m.capewell@googlemail.com authored
BUG=none TEST=Default NaN tests added to test-assembler-arm. Review URL: https://codereview.chromium.org/14109010 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14268 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 23 Jan, 2013 1 commit
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ulan@chromium.org authored
Review URL: https://chromiumcodereview.appspot.com/11428137 Patch from Hans Wennborg <hans@chromium.org>. git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13484 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 28 Dec, 2012 1 commit
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ulan@chromium.org authored
This requires constant blinding before it can be enabled. There are other interesting optimizations that can be added later, detailed in a TODO. BUG=optimization R=ulan@chromium.org,mstarzinger@chromium.org, hwennborg@google.com Review URL: https://chromiumcodereview.appspot.com/11191029 Patch from JF Bastien <jfb@chromium.org>. git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13286 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 22 Oct, 2012 1 commit
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ulan@chromium.org authored
The previously-used instruction isn't guaranteed to always be undefined, and the encoding used was conditional (failing the condition on an undefined instruction is itself undefined and not guaranteed to fault!). I would have like to use a more clever encoding (see bug 2963), but we need the extra bits to encode the size of the constant pool. BUG=security R=ulan@chromium.org Review URL: https://chromiumcodereview.appspot.com/11242002 Patch from JF Bastien <jfb@chromium.org>. git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12791 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 15 Oct, 2012 2 commits
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ulan@chromium.org authored
R=ulan@chromium.org Review URL: https://chromiumcodereview.appspot.com/11116011 Patch from JF Bastien <jfb@chromium.org>. git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12737 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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ulan@chromium.org authored
R=mstarzinger@chromium.org,jfb@chromium.org Review URL: https://chromiumcodereview.appspot.com/11087047 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12735 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 19 Jul, 2012 1 commit
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svenpanne@chromium.org authored
BUG= TEST=Compiling for ARMv5TEJ Review URL: https://chromiumcodereview.appspot.com/10784013 Patch from Remi Duraffort <remi.duraffort@st.com>. git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12140 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 16 Jan, 2012 1 commit
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erik.corry@gmail.com authored
Review URL: http://codereview.chromium.org/9231009 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@10407 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 29 Nov, 2011 1 commit
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kmillikin@chromium.org authored
This shaves 416+ KB, just under 1% off the size of the debug d8 executable on Linux (mostly because the CheckHelper functions for assertions were getting separate copies for each compilation unit). The difference in release builds is negligible---a size reduction of 0.1%. Also, change namespace-level 'static const' variables to remove the static storage class as it's the default. R=danno@chromium.org BUG= TEST= Review URL: http://codereview.chromium.org/8680013 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@10083 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 11 Apr, 2011 1 commit
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sgjesse@chromium.org authored
The support for the old ABI is known to be broken and has been deprecated for some time now. Removed the instructions for loading and storing co-processor registers as they where only used to support the old ABI. R=karlklose@chromium.org BUG=v8:1316 TEST= Review URL: http://codereview.chromium.org//6822025 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7565 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 06 Apr, 2011 1 commit
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sgjesse@chromium.org authored
Enter/exit frames with save doubles use these instructions instead of generating 16 load/store instructions. R=karlklose@chromium.org, rodolph.perfetta@gmail.com BUG= TEST= Review URL: http://codereview.chromium.org//6691057 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7509 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 21 Mar, 2011 1 commit
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karlklose@chromium.org authored
This patch - removes the unimplemented code crash when rendering invalid/unknown instructions and prints "unknown" instead. - prints the beginning of the constant pool marker. - adds "da" as a shortcut for "disasm". - print hexadecimal representation of double and single registers. This makes it easier to debug move/conversion code that uses temporary int32 values in floating point registers. - annotates the stack with short prints of the values (HeapObjects and smis), - makes disasm take an address or a register as second argument without a third argument, which defaults to printing ten instructions. Review URL: http://codereview.chromium.org/6676042 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7279 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 15 Mar, 2011 1 commit
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karlklose@chromium.org authored
Patch from ARM Ltd. BUG=none TEST=Added to cctest/test-assembler-arm.cc and cctest/test-disasm-arm.cc Review URL: http://codereview.chromium.org/6625084 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7174 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 02 Mar, 2011 1 commit
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sgjesse@chromium.org authored
TEST=none BUG=none Patch by Rodolph Perfetta from ARM Ltd. Review URL: http://codereview.chromium.org/6594009 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7014 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 09 Feb, 2011 1 commit
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sgjesse@chromium.org authored
Change the comparison in the full code generator to use CompareIC instead of the CompareStub to record the types. This also implements the patching in the full code generator where the inlined smi code is de-activated by default to call the CompareIC once and then activating the inlined smi code by patching the code. Fixed the smi comparison in the ICCompareStub. Fixed ToBooleanStub to ensure that the scratch register used is not the input. Use r9 as default as that will never be input with Crankshaft. Implemented lithium instruction CmpTAndBranch. Make sure that the lithium instruction CmpID have operands in registrers as the current optimized code expects that. Review URL: http://codereview.chromium.org/6461017 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6704 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 04 Feb, 2011 1 commit
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sgjesse@chromium.org authored
fix the simulator behaviour. BUG=none TEST=added to cctest/test-assembler-arm.cc Patch by Rodolph Perfetta from ARM Ltd. Review URL: http://codereview.chromium.org/6368053 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6629 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 26 Jan, 2011 1 commit
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ager@chromium.org authored
First stab at a general ARM cleanup patch. It merges ARM constants so that they can be used across simulator, assembler and disassembler, and tidies up some syntax and ambiguities. BUG=none TEST=none Review URL: http://codereview.chromium.org/6274009 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6483 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 19 Jan, 2011 1 commit
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ager@chromium.org authored
BUG=none TEST=none Review URL: http://codereview.chromium.org/6346009 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6405 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 09 Nov, 2010 1 commit
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erik.corry@gmail.com authored
ARM: The Simulator will now handle different VFP rounding modes. RZ and RM are implemented. This is a commit of http://codereview.chromium.org/4295003/show for Alexander Rames of ARM. git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5790 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 28 Oct, 2010 1 commit
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ager@chromium.org authored
Fix the ARM simulator, the ARM disassembler and extend the stop feature. The stop feature in the simulator now support enabling, disabling and counting. BUG=None TEST=None git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5723 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 26 Aug, 2010 1 commit
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erik.corry@gmail.com authored
Fix incorrect encoding of single and double precision registers for some VFP instructions. Also fix incorrect disassembling of vldr/vstr. This is a commit of http://codereview.chromium.org/3107027 for Rodolph Perfetta. git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5352 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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