1. 19 May, 2016 1 commit
  2. 13 May, 2016 1 commit
  3. 11 May, 2016 1 commit
    • mstarzinger's avatar
      [compiler] Pass inlining_id via relocation info. · 32049620
      mstarzinger authored
      This passes the inlining_id of deoptimization points via the relocation
      info instead of via a side-channel to the CPU profiler. This is one step
      towards deprecating the side-channel in question and avoid the need for
      performing a lookup of the return address of the deopt point.
      
      R=jarin@chromium.org
      
      Review-Url: https://codereview.chromium.org/1956693002
      Cr-Commit-Position: refs/heads/master@{#36177}
      32049620
  4. 09 May, 2016 1 commit
  5. 02 Mar, 2016 1 commit
    • rmcilroy's avatar
      [Interpreter] Log source positions for bytecode arrays. · d5820158
      rmcilroy authored
      Add support to log source position offsets to the profiler. As part of
      this change PositionsRecorder is split into two, with the subset needed
      by log.cc moved into log.h and the remainder kept in assembler.h as
      AssemblerPositionsRecorder. The interpreter's source position table
      builder is updated to log positions when the profiler is active.
      
      BUG=v8:4766
      LOG=N
      
      Review URL: https://codereview.chromium.org/1737043002
      
      Cr-Commit-Position: refs/heads/master@{#34416}
      d5820158
  6. 17 Feb, 2016 1 commit
  7. 15 Jan, 2016 1 commit
  8. 02 Dec, 2015 1 commit
  9. 27 Nov, 2015 2 commits
  10. 08 Oct, 2015 1 commit
  11. 07 Oct, 2015 1 commit
  12. 02 Oct, 2015 3 commits
    • danno's avatar
      Re-reland: Remove register index/code indirection · 5cf1c0bc
      danno authored
      Previous to this patch, both the lithium and TurboFan register
      allocators tracked allocated registers by "indices", rather than
      the register codes used elsewhere in the runtime. This patch
      ensures that codes are used everywhere, and in the process cleans
      up a bunch of redundant code and adds more structure to how the
      set of allocatable registers is defined.
      
      Some highlights of changes:
      
      * TurboFan's RegisterConfiguration class moved to V8's top level
        so that it can be shared with Crankshaft.
      * Various "ToAllocationIndex" and related methods removed.
      * Code that can be easily shared between Register classes on
        different platforms is now shared.
      * The list of allocatable registers on each platform is declared
        as a list rather than implicitly via the register index <->
        code mapping.
      
      Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2
      Cr-Commit-Position: refs/heads/master@{#30913}
      
      Committed: https://crrev.com/7b7a8205d9a00c678fb7a6e032a55fecbc1509cf
      Cr-Commit-Position: refs/heads/master@{#31075}
      
      Review URL: https://codereview.chromium.org/1287383003
      
      Cr-Commit-Position: refs/heads/master@{#31087}
      5cf1c0bc
    • danno's avatar
      Revert of Reland: Remove register index/code indirection (patchset #20... · 00e07b00
      danno authored
      Revert of Reland: Remove register index/code indirection (patchset #20 id:380001 of https://codereview.chromium.org/1287383003/ )
      
      Reason for revert:
      Failures on MIPS
      
      Original issue's description:
      > Remove register index/code indirection
      >
      > Previous to this patch, both the lithium and TurboFan register
      > allocators tracked allocated registers by "indices", rather than
      > the register codes used elsewhere in the runtime. This patch
      > ensures that codes are used everywhere, and in the process cleans
      > up a bunch of redundant code and adds more structure to how the
      > set of allocatable registers is defined.
      >
      > Some highlights of changes:
      >
      > * TurboFan's RegisterConfiguration class moved to V8's top level
      >   so that it can be shared with Crankshaft.
      > * Various "ToAllocationIndex" and related methods removed.
      > * Code that can be easily shared between Register classes on
      >   different platforms is now shared.
      > * The list of allocatable registers on each platform is declared
      >   as a list rather than implicitly via the register index <->
      >   code mapping.
      >
      > Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2
      > Cr-Commit-Position: refs/heads/master@{#30913}
      >
      > Committed: https://crrev.com/7b7a8205d9a00c678fb7a6e032a55fecbc1509cf
      > Cr-Commit-Position: refs/heads/master@{#31075}
      
      TBR=akos.palfi@imgtec.com,bmeurer@chromium.org,jarin@chromium.org,paul.lind@imgtec.com,titzer@chromium.org
      NOPRESUBMIT=true
      NOTREECHECKS=true
      NOTRY=true
      
      Review URL: https://codereview.chromium.org/1380863004
      
      Cr-Commit-Position: refs/heads/master@{#31083}
      00e07b00
    • danno's avatar
      Remove register index/code indirection · 7b7a8205
      danno authored
      Previous to this patch, both the lithium and TurboFan register
      allocators tracked allocated registers by "indices", rather than
      the register codes used elsewhere in the runtime. This patch
      ensures that codes are used everywhere, and in the process cleans
      up a bunch of redundant code and adds more structure to how the
      set of allocatable registers is defined.
      
      Some highlights of changes:
      
      * TurboFan's RegisterConfiguration class moved to V8's top level
        so that it can be shared with Crankshaft.
      * Various "ToAllocationIndex" and related methods removed.
      * Code that can be easily shared between Register classes on
        different platforms is now shared.
      * The list of allocatable registers on each platform is declared
        as a list rather than implicitly via the register index <->
        code mapping.
      
      Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2
      Cr-Commit-Position: refs/heads/master@{#30913}
      
      Review URL: https://codereview.chromium.org/1287383003
      
      Cr-Commit-Position: refs/heads/master@{#31075}
      7b7a8205
  13. 30 Sep, 2015 1 commit
  14. 24 Sep, 2015 2 commits
    • danno's avatar
      Revert of Remove register index/code indirection (patchset #17 id:320001 of... · 3ac27431
      danno authored
      Revert of Remove register index/code indirection (patchset #17 id:320001 of https://codereview.chromium.org/1287383003/ )
      
      Reason for revert:
      Failures on greedy RegAlloc, Fuzzer
      
      Original issue's description:
      > Remove register index/code indirection
      >
      > Previous to this patch, both the lithium and TurboFan register
      > allocators tracked allocated registers by "indices", rather than
      > the register codes used elsewhere in the runtime. This patch
      > ensures that codes are used everywhere, and in the process cleans
      > up a bunch of redundant code and adds more structure to how the
      > set of allocatable registers is defined.
      >
      > Some highlights of changes:
      >
      > * TurboFan's RegisterConfiguration class moved to V8's top level
      >   so that it can be shared with Crankshaft.
      > * Various "ToAllocationIndex" and related methods removed.
      > * Code that can be easily shared between Register classes on
      >   different platforms is now shared.
      > * The list of allocatable registers on each platform is declared
      >   as a list rather than implicitly via the register index <->
      >   code mapping.
      >
      > Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2
      > Cr-Commit-Position: refs/heads/master@{#30913}
      
      TBR=akos.palfi@imgtec.com,bmeurer@chromium.org,jarin@chromium.org,paul.lind@imgtec.com,titzer@chromium.org
      NOPRESUBMIT=true
      NOTREECHECKS=true
      NOTRY=true
      
      Review URL: https://codereview.chromium.org/1365073002
      
      Cr-Commit-Position: refs/heads/master@{#30914}
      3ac27431
    • danno's avatar
      Remove register index/code indirection · 80bc6f6e
      danno authored
      Previous to this patch, both the lithium and TurboFan register
      allocators tracked allocated registers by "indices", rather than
      the register codes used elsewhere in the runtime. This patch
      ensures that codes are used everywhere, and in the process cleans
      up a bunch of redundant code and adds more structure to how the
      set of allocatable registers is defined.
      
      Some highlights of changes:
      
      * TurboFan's RegisterConfiguration class moved to V8's top level
        so that it can be shared with Crankshaft.
      * Various "ToAllocationIndex" and related methods removed.
      * Code that can be easily shared between Register classes on
        different platforms is now shared.
      * The list of allocatable registers on each platform is declared
        as a list rather than implicitly via the register index <->
        code mapping.
      
      Review URL: https://codereview.chromium.org/1287383003
      
      Cr-Commit-Position: refs/heads/master@{#30913}
      80bc6f6e
  15. 11 Sep, 2015 1 commit
  16. 12 Aug, 2015 1 commit
    • jfb's avatar
      Security: disable nontemporals. · a904b569
      jfb authored
      The operations were available on ARM64 and x86-32 but were unused.
      
      It has been conjectured that nontemporals can be used for rowhammer-like bitflips more easily than regular load/store operations. It is therefore desirable to avoid generating these instructions in the future.
      
      R= titzer, jochen, jln, Mark Seaborn, ruiq
      
      Review URL: https://codereview.chromium.org/1276113002
      
      Cr-Commit-Position: refs/heads/master@{#30139}
      a904b569
  17. 07 Aug, 2015 1 commit
  18. 30 Jul, 2015 1 commit
  19. 15 Jul, 2015 1 commit
  20. 14 Jul, 2015 1 commit
  21. 10 Jul, 2015 1 commit
    • yangguo's avatar
      Debugger: use debug break slot to break on call. · 8965b683
      yangguo authored
      Break point at calls are currently set via IC. To change this, we
      need to set debug break slots instead. We also need to distinguish
      those debug break slots as calls to support step-in.
      
      To implement this, we add a data field to debug break reloc info to
      indicate non-call debug breaks or in case of call debug breaks, the
      number of arguments. We can later use this to find the callee on the
      evaluation stack in Debug::PrepareStep.
      
      BUG=v8:4269
      R=ulan@chromium.org
      LOG=N
      
      Review URL: https://codereview.chromium.org/1222093007
      
      Cr-Commit-Position: refs/heads/master@{#29561}
      8965b683
  22. 09 Jun, 2015 1 commit
    • mbrandy's avatar
      Fix issues with Arm's use of embedded constant pools · e3d76269
      mbrandy authored
      - Introduce Assembler::DataAlign for table alignment in code object
      - Fix several misuses of r8 (alias of the pool pointer register, pp)
      - Fix calculation of pp in OSR/handler entry invocation
      - Enable missing cases in deserializer
      - Fix references to ool constant pools in comments.
      
      R=rmcilroy@chromium.org, michael_dawson@ca.ibm.com
      BUG=chromium:497180
      LOG=N
      
      Review URL: https://codereview.chromium.org/1155673005
      
      Cr-Commit-Position: refs/heads/master@{#28873}
      e3d76269
  23. 04 Jun, 2015 1 commit
    • mbrandy's avatar
      Add support for Embedded Constant Pools for PPC and Arm · eac7f046
      mbrandy authored
      Embed constant pools within their corresponding Code
      objects.
      
      This removes support for out-of-line constant pools in favor
      of the new approach -- the main advantage being that it
      eliminates the need to allocate and manage separate constant
      pool array objects.
      
      Currently supported on PPC and ARM.  Enabled by default on
      PPC only.
      
      This yields a 6% improvment in Octane on PPC64.
      
      R=bmeurer@chromium.org, rmcilroy@chromium.org, michael_dawson@ca.ibm.com
      BUG=chromium:478811
      LOG=Y
      
      Review URL: https://codereview.chromium.org/1162993006
      
      Cr-Commit-Position: refs/heads/master@{#28801}
      eac7f046
  24. 03 Jun, 2015 1 commit
  25. 02 Jun, 2015 1 commit
    • mbrandy's avatar
      Add support for Embedded Constant Pools for PPC and Arm · a9404029
      mbrandy authored
      Embed constant pools within their corresponding Code
      objects.
      
      This removes support for out-of-line constant pools in favor
      of the new approach -- the main advantage being that it
      eliminates the need to allocate and manage separate constant
      pool array objects.
      
      Currently supported on PPC and ARM.  Enabled by default on
      PPC only.
      
      This yields a 6% improvment in Octane on PPC64.
      
      R=danno@chromium.org, svenpanne@chromium.org, bmeurer@chromium.org, rmcilroy@chromium.org, dstence@us.ibm.com, michael_dawson@ca.ibm.com
      BUG=chromium:478811
      LOG=Y
      
      Review URL: https://codereview.chromium.org/1131783003
      
      Cr-Commit-Position: refs/heads/master@{#28770}
      a9404029
  26. 15 May, 2015 1 commit
  27. 27 Mar, 2015 1 commit
  28. 23 Mar, 2015 1 commit
  29. 19 Mar, 2015 1 commit
  30. 18 Mar, 2015 1 commit
  31. 04 Mar, 2015 1 commit
    • yangguo's avatar
      Refactor BreakLocationIterator. · 1a608493
      yangguo authored
      We now have BreakLocation::Iterator to iterate via RelocIterator, and
      create a BreakLocation when we are done iterating. The reloc info is
      stored in BreakLocation in a GC-safe way and instantiated on demand.
      
      R=ulan@chromium.org
      BUG=v8:3924
      LOG=N
      
      Review URL: https://codereview.chromium.org/967323002
      
      Cr-Commit-Position: refs/heads/master@{#26983}
      1a608493
  32. 27 Feb, 2015 1 commit
  33. 05 Feb, 2015 3 commits
  34. 04 Feb, 2015 1 commit