1. 03 Sep, 2019 1 commit
  2. 12 Aug, 2019 1 commit
    • Jakob Gruber's avatar
      [compiler] Remove LoadStackPointer and related machinery · 5b2ab2f6
      Jakob Gruber authored
      Now that all uses of LoadStackPointer have been removed, this CL cleans
      up related code:
      
      - Removed LoadStackPointer.
      - Removed ArchStackPointer.
      - Removed IA32StackCheck.
      - Removed X64StackCheck.
      - Removed StackCheckMatcher.
      
      All stack checks now follow a simple path without matchers or special
      register constraints: they load the limit and pass it to
      StackPointerGreaterThan, which is finally handled by code generation.
      
      Bug: v8:9534
      Change-Id: Ib1d7be1502a471541d6441f3261aac0c949525fb
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1748737
      Commit-Queue: Jakob Gruber <jgruber@chromium.org>
      Reviewed-by: 's avatarGeorg Neis <neis@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#63166}
      5b2ab2f6
  3. 19 Jul, 2019 1 commit
  4. 12 Nov, 2018 1 commit
  5. 29 Aug, 2018 1 commit
    • Deepti Gandluri's avatar
      [compiler] Remove AtomicNarrow machine operators, macroize tests · 9a0f2546
      Deepti Gandluri authored
      The AtomicNarrow operations are currently used for wider 64-bit
      operations, that only operate on 32-bits of data or less
      (Ex:I64AtomicAdd8U). Removing these because this can be handled
      in int64-lowering by zeroing the higher order node.
      Explicitly zeroing these in code-gen is not
      required because -
      
       - The spec requires only the data exchange to be atomic, for narrow
         ops this uses only the low word.
       - The return values are not in memory, so are not visible to other
         workers/threads
      
      BUG:v8:6532
      
      Change-Id: I90a795ab6c21c70cb096f59a137de653c9c6a178
      Reviewed-on: https://chromium-review.googlesource.com/1194428Reviewed-by: 's avatarBen Titzer <titzer@chromium.org>
      Reviewed-by: 's avatarBen Smith <binji@chromium.org>
      Commit-Queue: Deepti Gandluri <gdeepti@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#55499}
      9a0f2546
  6. 14 Aug, 2018 2 commits
    • Benedikt Meurer's avatar
      [turbofan] Further optimize DataView accesses. · 5fecd146
      Benedikt Meurer authored
      This adds support for unaligned load/store access to the DataView
      backing store and uses byteswap operations to fix up the endianess
      when necessary. This changes the Word32ReverseBytes operator to be
      a required operator and adds the missing support on the Intel and
      ARM platforms (on 64-bit platforms the Word64ReverseBytes operator
      is also mandatory now).
      
      This further improves the performance on the dataviewperf.js test
      mentioned in the tracking bug by up to 40%, and at the same time
      reduces the code complexity in the EffectControlLinearizer.
      
      Bug: chromium:225811
      Change-Id: I7c1ec826faf46a144a5a9068f8f815a5fd040997
      Reviewed-on: https://chromium-review.googlesource.com/1174252Reviewed-by: 's avatarSigurd Schneider <sigurds@chromium.org>
      Commit-Queue: Benedikt Meurer <bmeurer@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#55111}
      5fecd146
    • Leszek Swirski's avatar
      Revert "[turbofan] Further optimize DataView accesses." · 6a62d88e
      Leszek Swirski authored
      This reverts commit c46915b9.
      
      Reason for revert: Disasm failures https://ci.chromium.org/p/v8/builders/luci.v8.ci/V8%20Linux%20-%20debug/21727 
      
      Original change's description:
      > [turbofan] Further optimize DataView accesses.
      > 
      > This adds support for unaligned load/store access to the DataView
      > backing store and uses byteswap operations to fix up the endianess
      > when necessary. This changes the Word32ReverseBytes operator to be
      > a required operator and adds the missing support on the Intel and
      > ARM platforms (on 64-bit platforms the Word64ReverseBytes operator
      > is also mandatory now).
      > 
      > This further improves the performance on the dataviewperf.js test
      > mentioned in the tracking bug by up to 40%, and at the same time
      > reduces the code complexity in the EffectControlLinearizer.
      > 
      > Bug: chromium:225811
      > Change-Id: I296170b828c2ccc1c317ed37840b564aa14cdec2
      > Reviewed-on: https://chromium-review.googlesource.com/1172777
      > Commit-Queue: Benedikt Meurer <bmeurer@chromium.org>
      > Reviewed-by: Sigurd Schneider <sigurds@chromium.org>
      > Cr-Commit-Position: refs/heads/master@{#55099}
      
      TBR=sigurds@chromium.org,bmeurer@chromium.org
      
      Change-Id: If7a62e3a1a4ad26823fcbd2ab6eb4c053ad11c49
      No-Presubmit: true
      No-Tree-Checks: true
      No-Try: true
      Bug: chromium:225811
      Reviewed-on: https://chromium-review.googlesource.com/1174171Reviewed-by: 's avatarLeszek Swirski <leszeks@chromium.org>
      Commit-Queue: Leszek Swirski <leszeks@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#55107}
      6a62d88e
  7. 13 Aug, 2018 1 commit
    • Benedikt Meurer's avatar
      [turbofan] Further optimize DataView accesses. · c46915b9
      Benedikt Meurer authored
      This adds support for unaligned load/store access to the DataView
      backing store and uses byteswap operations to fix up the endianess
      when necessary. This changes the Word32ReverseBytes operator to be
      a required operator and adds the missing support on the Intel and
      ARM platforms (on 64-bit platforms the Word64ReverseBytes operator
      is also mandatory now).
      
      This further improves the performance on the dataviewperf.js test
      mentioned in the tracking bug by up to 40%, and at the same time
      reduces the code complexity in the EffectControlLinearizer.
      
      Bug: chromium:225811
      Change-Id: I296170b828c2ccc1c317ed37840b564aa14cdec2
      Reviewed-on: https://chromium-review.googlesource.com/1172777
      Commit-Queue: Benedikt Meurer <bmeurer@chromium.org>
      Reviewed-by: 's avatarSigurd Schneider <sigurds@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#55099}
      c46915b9
  8. 09 Aug, 2018 1 commit
  9. 02 Aug, 2018 1 commit
  10. 30 Jul, 2018 1 commit
  11. 10 Jul, 2018 1 commit
    • Bill Budge's avatar
      [wasm simd] Generate better code for Dup shuffles · 17568b91
      Bill Budge authored
      - Dup shuffles broadcast a single lane from a source
        operand to all lanes of the destination. Conceptually
        similar to a splat, they require special handling since
        the splatted value must be extracted from a source. The
        32x4 case is already well handled (pshufd) but 16x8 and
        8x16 currently generate the general shuffle code sequence.
      - Adds IA32S16x8Dup, IA32S8x16Dup  opcodes.
      
      Bug: v8:6020
      Change-Id: Ia4f044aa7e25cae30e8f9007c2488db738ca6cfc
      Reviewed-on: https://chromium-review.googlesource.com/1128513Reviewed-by: 's avatarJing Bao <jing.bao@intel.com>
      Commit-Queue: Bill Budge <bbudge@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#54362}
      17568b91
  12. 09 Jul, 2018 1 commit
  13. 06 Jul, 2018 2 commits
  14. 25 Jun, 2018 1 commit
  15. 21 Jun, 2018 1 commit
  16. 11 Jun, 2018 1 commit
  17. 31 May, 2018 1 commit
  18. 28 Apr, 2018 1 commit
  19. 19 Apr, 2018 1 commit
  20. 10 Apr, 2018 1 commit
  21. 29 Mar, 2018 1 commit
  22. 28 Mar, 2018 1 commit
  23. 26 Mar, 2018 2 commits
  24. 23 Mar, 2018 1 commit
  25. 05 Feb, 2018 1 commit
  26. 30 Jan, 2018 1 commit
  27. 17 Jan, 2018 1 commit
  28. 15 Jan, 2018 1 commit
  29. 10 Jan, 2018 1 commit
  30. 02 Jan, 2018 2 commits
    • Pierre Langlois's avatar
      [cctest] Support testing Simd128 moves and swaps · 0761b55d
      Pierre Langlois authored
      Extend the code-generator tests to cover AssembleMove and AssembleSwap with
      Simd128 registers and stack slots, for targets that support them.
      
      For this to work however, we need support for passing Simd128 stack parameters
      in TurboFan which this patch implements for Arm and x86. PPC and S390 both do
      not support the Simd128 representation and it appears MIPS and MIPS64's
      implementation of AssembleMove and AssembleSwap do not support it either.
      
      As per the design of the tests, the set of values to perform moves on are
      represented in a FixedArray of Smis (for kTagged) and HeapNumbers (for kFloat32
      and kFloat64). They are converted to raw values for the moves to be performed
      on, to be then converted back into a FixedArray. For the kSimd128
      representation, we represent values as a FixedArray of 4 Smis, each representing
      a lane. They are converted to a raw Simd128 vector using the `I32x4ReplaceLane`
      and `I32x4ExtractLane` operations.
      
      Finally, these tests need Simd128 variables mixed with the CodeStubAssembler
      which is not a use-case officially supported. And as a result, the `RecordWrite`
      stub does not guarantee to preserve Simd128 registers. To get around this, we
      have to be careful to skip write barriers when dealing with Simd128 parameters
      inside the "teardown" function, and we've had to move all allocations to the
      "setup" function.
      
      Thanks to this, we are able to catch bugs such as this one
      https://bugs.chromium.org/p/v8/issues/detail?id=6843.
      
      Bug: v8:6848
      Change-Id: I8787d6339cdbfcd9356c5e8995925f0b45c562fa
      Reviewed-on: https://chromium-review.googlesource.com/728599
      Commit-Queue: Pierre Langlois <pierre.langlois@arm.com>
      Reviewed-by: 's avatarBenedikt Meurer <bmeurer@chromium.org>
      Reviewed-by: 's avatarBill Budge <bbudge@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#50326}
      0761b55d
    • Clemens Hammacher's avatar
      [turbofan] Remove CheckedLoad operation · 0f5328a3
      Clemens Hammacher authored
      After https://crrev.com/c/832457, CheckedLoad is not being used any
      more. Thus, remove it from the TurboFan backend and from all tests.
      CheckedStore was already removed in https://crrev.com/c/822570.
      
      R=jarin@chromium.org
      CC=titzer@chromium.org, mstarzinger@chromium.org
      
      Change-Id: I2eeec2f4a9d0a10067db5cc25ec41366ae85e917
      Reviewed-on: https://chromium-review.googlesource.com/832459
      Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
      Reviewed-by: 's avatarJaroslav Sevcik <jarin@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#50323}
      0f5328a3
  31. 22 Dec, 2017 1 commit
  32. 12 Dec, 2017 2 commits
    • Ben L. Titzer's avatar
      [turbofan] Remove CheckedStore from TurboFan backend. · 65ac8ca0
      Ben L. Titzer authored
      This operation was used to implement asm.js stores, but is obsolete
      with asm.js stores now being lowered to normal graph nodes.
      
      R=mstarzinger@chromium.org
      CC=jarin@chromium.org
      
      Bug: 
      Change-Id: Iea90b1a62be2e273c0562058642adc5b63ae2cf8
      Reviewed-on: https://chromium-review.googlesource.com/822570
      Commit-Queue: Ben Titzer <titzer@chromium.org>
      Reviewed-by: 's avatarMichael Starzinger <mstarzinger@chromium.org>
      Reviewed-by: 's avatarJaroslav Sevcik <jarin@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#50046}
      65ac8ca0
    • Andreas Haas's avatar
      Reland [turbofan] Implement on-stack returns (Intel) · bd732f7d
      Andreas Haas authored
      The original CL introduced a test which uses a random number generator.
      I disable the test for now, which is okay because this CL adds to a
      work-in-progress feature anyways, and I will fix the problem in another
      CL.
      
      Original description:
      Add the ability to return (multiple) return values on the stack:
      
      - Extend stack frames with a new buffer region for return slots.
        This region is located at the end of a caller's frame such that
        its slots can be indexed as caller frame slots in a callee
        (located beyond its parameters) and assigned return values.
      - Adjust stack frame constructon and deconstruction accordingly.
      - Extend linkage computation to support register plus stack returns.
      - Reserve return slots in caller frame when respective calls occur.
      - Introduce and generate architecture instructions ('peek') for
        reading back results from return slots in the caller.
      - Aggressive tests.
      - Some minor clean-up.
      
      So far, only ia32 and x64 are implemented.
      
      Change-Id: I8b03fc4e53946daaa0e14a34603f4824a04fad7e
      Reviewed-on: https://chromium-review.googlesource.com/819557Reviewed-by: 's avatarBen Titzer <titzer@chromium.org>
      Commit-Queue: Andreas Haas <ahaas@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#50031}
      bd732f7d
  33. 11 Dec, 2017 3 commits
    • Andreas Haas's avatar
      Revert "[turbofan] Implement on-stack returns (Intel)" · 943ccb98
      Andreas Haas authored
      This reverts commit 1e49864f.
      
      Reason for revert: Crashing test on the waterfall https://logs.chromium.org/v/?s=chromium%2Fbb%2Fclient.v8%2FV8_Linux_gcc_4.8%2F16871%2F%2B%2Frecipes%2Fsteps%2FCheck%2F0%2Flogs%2FReturnMultipleRandom%2F0
      
      Original change's description:
      > [turbofan] Implement on-stack returns (Intel)
      > 
      > Add the ability to return (multiple) return values on the stack:
      > 
      > - Extend stack frames with a new buffer region for return slots.
      >   This region is located at the end of a caller's frame such that
      >   its slots can be indexed as caller frame slots in a callee
      >   (located beyond its parameters) and assigned return values.
      > - Adjust stack frame constructon and deconstruction accordingly.
      > - Extend linkage computation to support register plus stack returns.
      > - Reserve return slots in caller frame when respective calls occur.
      > - Introduce and generate architecture instructions ('peek') for
      >   reading back results from return slots in the caller.
      > - Aggressive tests.
      > - Some minor clean-up.
      > 
      > So far, only ia32 and x64 are implemented.
      > 
      > Change-Id: I9532ad13aa307c1dec40548c5b84600fe2f762ce
      > Reviewed-on: https://chromium-review.googlesource.com/766371
      > Commit-Queue: Andreas Haas <ahaas@chromium.org>
      > Reviewed-by: Ben Titzer <titzer@chromium.org>
      > Cr-Commit-Position: refs/heads/master@{#49994}
      
      TBR=titzer@chromium.org,rossberg@chromium.org,ahaas@chromium.org
      
      Change-Id: Ib257e92448942f8ef07d5ef246f9381f4784f014
      No-Presubmit: true
      No-Tree-Checks: true
      No-Try: true
      Reviewed-on: https://chromium-review.googlesource.com/819637Reviewed-by: 's avatarAndreas Haas <ahaas@chromium.org>
      Commit-Queue: Andreas Haas <ahaas@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#50000}
      943ccb98
    • Andreas Haas's avatar
      [turbofan] Implement on-stack returns (Intel) · 1e49864f
      Andreas Haas authored
      Add the ability to return (multiple) return values on the stack:
      
      - Extend stack frames with a new buffer region for return slots.
        This region is located at the end of a caller's frame such that
        its slots can be indexed as caller frame slots in a callee
        (located beyond its parameters) and assigned return values.
      - Adjust stack frame constructon and deconstruction accordingly.
      - Extend linkage computation to support register plus stack returns.
      - Reserve return slots in caller frame when respective calls occur.
      - Introduce and generate architecture instructions ('peek') for
        reading back results from return slots in the caller.
      - Aggressive tests.
      - Some minor clean-up.
      
      So far, only ia32 and x64 are implemented.
      
      Change-Id: I9532ad13aa307c1dec40548c5b84600fe2f762ce
      Reviewed-on: https://chromium-review.googlesource.com/766371
      Commit-Queue: Andreas Haas <ahaas@chromium.org>
      Reviewed-by: 's avatarBen Titzer <titzer@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#49994}
      1e49864f
    • jing.bao's avatar
      [ia32][wasm] Enable more SIMD tests on IA32 · 6ed2690e
      jing.bao authored
      Implement IA32Movdqu
      Add vmovdqu and Movdqu macro
      
      Bug: 
      Change-Id: Idc2b5c99adf38d6120ff451bde40d4ad8f2046de
      Reviewed-on: https://chromium-review.googlesource.com/815944Reviewed-by: 's avatarBenedikt Meurer <bmeurer@chromium.org>
      Reviewed-by: 's avatarBill Budge <bbudge@chromium.org>
      Commit-Queue: Jing Bao <jing.bao@intel.com>
      Cr-Commit-Position: refs/heads/master@{#49981}
      6ed2690e